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1. 发明申请

US20110157093A1 ILLUMINATION DEVICE WITH METALIZED LIGHT-TURNING FEATURES 有权
标题翻译：具有金属化光亮特性的照明装置
公开(公告)号：US20110157093A1
公开(公告)日：2011-06-30
申请号：US12979196
申请日：2010-12-27
申请人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
发明人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
IPC分类号： G06F3/042 , G02B26/00
CPC分类号： G06F3/044 , G02B6/0045 , G02B6/0055 , G02B6/0083 , G02B26/001 , G02F1/225 , G06F3/0421 , G06F2203/04103 , G06F2203/04112 , Y10T29/49117
摘要： This disclosure provides systems, methods and apparatus for a front illumination device with metalized light-turning features. In one aspect, an illumination device with integrated touch sensor capability includes a light guide having a metalized light-turning feature and an electrode system for sensing changes to the capacitance between electrodes in the electrode system induced by the proximity of an electrically conductive body, such as a human finger. The metalized light-turning features may be electrically connected to and/or part of the electrode system.
摘要翻译：本公开提供了具有金属化的光转向特征的前照明装置的系统，方法和装置。一方面，具有集成的触摸传感器能力的照明装置包括具有金属化的光转向特征的光导和用于感测由导电体附近引起的电极系中的电极之间的电容的变化的电极系统，作为人的手指。金属化的光转向特征可以电连接到电极系统和/或电极系统的一部分。

2. 发明授权

US08810528B2 Illumination device with metalized light-turning features 有权
标题翻译：具有金属化转向灯的照明装置
公开(公告)号：US08810528B2
公开(公告)日：2014-08-19
申请号：US12979196
申请日：2010-12-27
申请人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
发明人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
IPC分类号： G06F3/041
CPC分类号： G06F3/044 , G02B6/0045 , G02B6/0055 , G02B6/0083 , G02B26/001 , G02F1/225 , G06F3/0421 , G06F2203/04103 , G06F2203/04112 , Y10T29/49117
摘要： This disclosure provides systems, methods and apparatus for a front illumination device with metalized light-turning features. In one aspect, an illumination device with integrated touch sensor capability includes a light guide having a metalized light-turning feature and an electrode system for sensing changes to the capacitance between electrodes in the electrode system induced by the proximity of an electrically conductive body, such as a human finger. The metalized light-turning features may be electrically connected to and/or part of the electrode system.
摘要翻译：本公开提供了具有金属化的光转向特征的前照明装置的系统，方法和装置。一方面，具有集成的触摸传感器能力的照明装置包括具有金属化的光转向特征的光导和用于感测由导电体附近引起的电极系中的电极之间的电容的变化的电极系统，作为人的手指。金属化的光转向特征可以电连接到电极系统和/或电极系统的一部分。

3. 发明授权

US08866757B2 Coated light-turning feature with auxiliary structure 有权
标题翻译：涂层光转功能，辅助结构
公开(公告)号：US08866757B2
公开(公告)日：2014-10-21
申请号：US12979148
申请日：2010-12-27
申请人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
发明人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
IPC分类号： G06F3/041 , G06F3/044 , G02B26/00 , F21V8/00
CPC分类号： G06F3/044 , G02B6/0045 , G02B6/0055 , G02B6/0083 , G02B26/001 , G02F1/225 , G06F3/0421 , G06F2203/04103 , G06F2203/04112 , Y10T29/49117
摘要： This disclosure provides systems, methods and apparatus for a front illumination device with metalized light-turning features. In one aspect, an illumination device includes a light guide having light-turning features that include recesses formed on the light guide and that extend down into the light guide. The recesses may be coated with a material where the material also forms an auxiliary structure outside of the recesses on the light guide. The auxiliary structure may be conductive and may form, for example, an electrode.
摘要翻译：本公开提供了具有金属化的光转向特征的前照明装置的系统，方法和装置。一方面，照明装置包括具有光转动特征的导光体，其具有形成在光导上并且向下延伸到光导中的凹陷。凹部可以涂覆有材料，其中材料也在导光体上的凹部外部形成辅助结构。辅助结构可以是导电的并且可以形成例如电极。

4. 发明申请

US20110157058A1 COATED LIGHT-TURNING FEATURE WITH AUXILIARY STRUCTURE 有权
标题翻译：具有辅助结构的涂层轻型旋转特征
公开(公告)号：US20110157058A1
公开(公告)日：2011-06-30
申请号：US12979148
申请日：2010-12-27
申请人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
发明人： Ion Bita , Stephen P. Dhanens , Evgeni P. Gousev , Kollengode S. Narayanan
IPC分类号： G06F3/041
CPC分类号： G06F3/044 , G02B6/0045 , G02B6/0055 , G02B6/0083 , G02B26/001 , G02F1/225 , G06F3/0421 , G06F2203/04103 , G06F2203/04112 , Y10T29/49117
摘要： This disclosure provides systems, methods and apparatus for a front illumination device with metalized light-turning features. In one aspect, an illumination device includes a light guide having light-turning features that include recesses formed on the light guide and that extend down into the light guide. The recesses may be coated with a material where the material also forms an auxiliary structure outside of the recesses on the light guide. The auxiliary structure may be conductive and may form, for example, an electrode.
摘要翻译：本公开提供了具有金属化的光转向特征的前照明装置的系统，方法和装置。一方面，照明装置包括具有光转动特征的导光体，其具有形成在光导上并且向下延伸到光导中的凹部。凹部可以涂覆有材料，其中材料也在导光体上的凹部外部形成辅助结构。辅助结构可以是导电的并且可以形成例如电极。

5. 发明授权

US08492874B2 High density metal-insulator-metal trench capacitor 有权
标题翻译：高密度金属 - 绝缘体 - 金属沟槽电容器
公开(公告)号：US08492874B2
公开(公告)日：2013-07-23
申请号：US13021151
申请日：2011-02-04
申请人： Je-Hsiung Lan , Matthew Michael Nowak , Evgeni P. Gousev , Jonghae Kim , Clarence Chui
发明人： Je-Hsiung Lan , Matthew Michael Nowak , Evgeni P. Gousev , Jonghae Kim , Clarence Chui
IPC分类号： H01G4/10 , H01G4/12 , H01L23/5222 , H01L28/82 , H01L29/945 , H01L23/642
CPC分类号： H01L28/82 , H01G4/012 , H01G4/10 , H01L23/5223 , H01L23/642 , H01L28/87 , H01L29/945 , H01L2224/16225 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311
摘要： Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous-silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous-silicon layers through isotropic etching to form concave surfaces. Conducting, insulating, and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.
摘要翻译：通过增加电容器的表面积来实现更高的电容密度。可以通过在半导体管芯上的沟槽中形成各向同性球形（凹面）来获得更大的表面积。通过沉积非晶硅和氧化硅的双层来制造凹面。在用于沟槽的氧化硅硬掩模中图案化开口。通过各向同性蚀刻将开口转移到非晶硅层以形成凹面。导电，绝缘和导电层通过原子层沉积沉积在沟槽的凹面上。

6. 发明授权

US08193051B2 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics 有权
标题翻译：在具有高k电介质的CMOS器件制造中实现势垒层的选择性实现以实现阈值电压控制
公开(公告)号：US08193051B2
公开(公告)日：2012-06-05
申请号：US13047172
申请日：2011-03-14
申请人： Nestor A. Bojarczuk, Jr. , Cyril Cabral, Jr. , Eduard A. Cartier , Matthew W. Copel , Martin M. Frank , Evgeni P. Gousev , Supratik Guha , Rajarao Jammy , Vijay Narayanan , Vamsi K. Paruchuri
发明人： Nestor A. Bojarczuk, Jr. , Cyril Cabral, Jr. , Eduard A. Cartier , Matthew W. Copel , Martin M. Frank , Evgeni P. Gousev , Supratik Guha , Rajarao Jammy , Vijay Narayanan , Vamsi K. Paruchuri
IPC分类号： H01L21/8238
CPC分类号： H01L29/513 , H01L21/28079 , H01L21/28088 , H01L21/823857 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： The present invention provides a semiconductor structure including a semiconductor substrate having a plurality of source and drain diffusion regions located therein, each pair of source and drain diffusion regions are separated by a device channel. The structure further includes a first gate stack of pFET device located on top of some of the device channels, the first gate stack including a high-k gate dielectric, an insulating interlayer abutting the gate dielectric and a fully silicided metal gate electrode abutting the insulating interlayer, the insulating interlayer includes an insulating metal nitride that stabilizes threshold voltage and flatband voltage of the p-FET device to a targeted value and is one of aluminum oxynitride, boron nitride, boron oxynitride, gallium nitride, gallium oxynitride, indium nitride and indium oxynitride. A second gate stack of an nFET devices is located on top remaining device channels, the second gate stack including a high-k gate dielectric and a fully silicided gate electrode located directly atop the high-k gate dielectric.
摘要翻译：本发明提供一种半导体结构，其包括具有位于其中的多个源极和漏极扩散区域的半导体衬底，每对源极和漏极扩散区域由器件沟道分离。该结构还包括位于一些器件通道顶部的pFET器件的第一栅极堆叠，第一栅极堆叠包括高k栅极电介质，邻接栅极电介质的绝缘夹层和邻接绝缘体的完全硅化金属栅电极中间层，绝缘中间层包括将p-FET器件的阈值电压和扁平带电压稳定到目标值的绝缘金属氮化物，并且是氮氧化铝，氮化硼，氮氧化硼，氮化镓，氮氧化镓，氮化铟和铟中的一种氮氧化物。 nFET器件的第二栅极堆叠位于顶部剩余器件沟道上，第二栅极堆叠包括高k栅极电介质和直接位于高k栅极电介质顶部的完全硅化栅电极。

7. 发明授权

US07326610B2 Process options of forming silicided metal gates for advanced CMOS devices 有权
标题翻译：为先进的CMOS器件形成硅化金属栅的工艺选择
公开(公告)号：US07326610B2
公开(公告)日：2008-02-05
申请号：US11271032
申请日：2005-11-10
申请人： Ricky S. Amos , Douglas A. Buchanan , Cyril Cabral, Jr. , Evgeni P. Gousev , Victor Ku , An Steegen
发明人： Ricky S. Amos , Douglas A. Buchanan , Cyril Cabral, Jr. , Evgeni P. Gousev , Victor Ku , An Steegen
IPC分类号： H01L21/31
CPC分类号： H01L21/823842 , H01L21/76895 , H01L21/823835
摘要： Silicide is introduced into the gate region of a CMOS device through different process options for both conventional and replacement gate types processes. Placement of silicide in the gate itself, introduction of the silicide directly in contact with the gate dielectric, introduction of the silicide as a fill on top of a metal gate all ready in place, and introduction the silicide as a capping layer on polysilicon or on the existing metal gate, are presented. Silicide is used as an option to connect between PFET and NFET devices of a CMOS structure. The processes protect the metal gate while allowing for the source and drain silicide to be of a different silicide than the gate silicide. A semiconducting substrate is provided having a gate with a source and a drain region. A gate dielectric layer is deposited on the substrate, along with a metal gate layer. The metal gate layer is then capped with a silicide formed on top of the gate, and conventional formation of the device then proceeds. A second silicide may be employed within the gate. A replacement gate is made from two different metals (dual metal gate replacement) prior to capping with a silicide.
摘要翻译：硅化物通过不同的工艺选择被引入到CMOS器件的栅极区域，用于常规和替代栅极类型工艺。将硅化物放置在栅极本身中，引入硅化物直接与栅极电介质接触，将硅化物作为填充物引入金属栅极顶部，并准备就绪，并将硅化物作为覆盖层引入到多晶硅上或现有的金属门。硅化物用作连接CMOS结构的PFET和NFET器件的选项。该过程保护金属栅极，同时允许源极和漏极硅化物与栅极硅化物不同的硅化物。提供了具有栅极和源极和漏极区域的半导体衬底。栅极电介质层与金属栅极层一起沉积在衬底上。然后用形成在栅极顶部上的硅化物对金属栅极层进行封装，然后继续进行常规的器件形成。可以在栅极内使用第二硅化物。在使用硅化物封盖之前，更换栅极由两种不同的金属（双金属栅极替代）制成。

8. 发明授权

US07029966B2 Process options of forming silicided metal gates for advanced CMOS devices 失效
标题翻译：为先进的CMOS器件形成硅化金属栅的工艺选择
公开(公告)号：US07029966B2
公开(公告)日：2006-04-18
申请号：US10605261
申请日：2003-09-18
申请人： Ricky S. Amos , Douglas A. Buchanan , Cyril Cabral, Jr. , Evgeni P. Gousev , Victor Ku , An Steegen
发明人： Ricky S. Amos , Douglas A. Buchanan , Cyril Cabral, Jr. , Evgeni P. Gousev , Victor Ku , An Steegen
IPC分类号： H01L21/8238 , H01L21/3205 , H01L21/4763
CPC分类号： H01L21/823842 , H01L21/76895 , H01L21/823835
摘要： Silicide is introduced into the gate region of a CMOS device through different process options for both conventional and replacement gate types processes. Placement of silicide in the gate itself, introduction of the silicide directly in contact with the gate dielectric, introduction of the silicide as a fill on top of a metal gate all ready in place, and introduction the silicide as a capping layer on polysilicon or on the existing metal gate, are presented. Silicide is used as an option to connect between PFET and NFET devices of a CMOS structure. The processes protect the metal gate while allowing for the source and drain silicide to be of a different silicide than the gate silicide. A semiconducting substrate is provided having a gate with a source and a drain region. A gate dielectric layer is deposited on the substrate, along with a metal gate layer. The metal gate layer is then capped with a silicide formed on top of the gate, and conventional formation of the device then proceeds. A second silicide may be employed within the gate. A replacement gate is made from two different metals (dual metal gate replacement) prior to capping with a silicide.
摘要翻译：硅化物通过不同的工艺选择被引入到CMOS器件的栅极区域，用于常规和替代栅极类型工艺。将硅化物放置在栅极本身中，引入硅化物直接与栅极电介质接触，将硅化物作为填充物引入金属栅极顶部，并准备就绪，并将硅化物作为覆盖层引入到多晶硅上或现有的金属门。硅化物用作连接CMOS结构的PFET和NFET器件的选项。该过程保护金属栅极，同时允许源极和漏极硅化物与栅极硅化物不同的硅化物。提供了具有栅极和源极和漏极区域的半导体衬底。栅极电介质层与金属栅极层一起沉积在衬底上。然后用形成在栅极顶部上的硅化物对金属栅极层进行封装，然后继续进行常规的器件形成。可以在栅极内使用第二硅化物。在使用硅化物封盖之前，更换栅极由两种不同的金属（双金属栅极替代）制成。

9. 发明授权

US06436196B1 Apparatus and method for forming an oxynitride insulating layer on a semiconductor wafer 失效
公开(公告)号：US06436196B1
公开(公告)日：2002-08-20
申请号：US09887505
申请日：2001-06-22
申请人： Douglas A. Buchanan , Evgeni P. Gousev , Carol J. Heenan , Wade J. Hodge , Steven M. Shank , Patrick R. Varekamp
发明人： Douglas A. Buchanan , Evgeni P. Gousev , Carol J. Heenan , Wade J. Hodge , Steven M. Shank , Patrick R. Varekamp
IPC分类号： H01L2131
CPC分类号： H01L21/28185 , C23C16/308 , C23C16/401 , C23C16/452 , C23C16/453 , H01L21/28202 , H01L21/28211 , H01L21/2822 , H01L21/3115 , H01L21/3144 , H01L29/518
摘要： An apparatus and method of forming an oxynitride insulating layer on a substrate performed by putting the substrate at a first temperature within the main chamber of a furnace, exposing the substrate to a nitrogen containing gas at a second temperature which is higher than the first temperature, and growing the oxynitride layer on the substrate within the main chamber in the presence of post-combusted gases. The higher temperature nitrogen containing gases are combusted in a chamber outside the main chamber. The higher temperature is in the range of 800 to 1200° C., and preferably 950° C. In a second embodiment, distributed N2O gas injectors within the main chamber deliver the nitrogen containing gas. The nitrogen containing gas is pre-heated outside the chamber. The nitrogen containing gas is then delivered to a gas manifold that splits the gas flow and directs the gas to a number of gas injectors, preferably two to four injectors within the main process tube. Gas injection orifices on the order of several millimeters then distribute the pre-decomposed gas to the wafers, producing a more uniformly N-doped wafer load in a batch furnace.

10. 发明授权

US08363380B2 MEMS varactors 有权
标题翻译： MEMS变容二极管
公开(公告)号：US08363380B2
公开(公告)日：2013-01-29
申请号：US12473882
申请日：2009-05-28
申请人： Je-Hsiung Lan , Evgeni P. Gousev , Wenyue Zhang , Manish Kothari , Sang-June Park
发明人： Je-Hsiung Lan , Evgeni P. Gousev , Wenyue Zhang , Manish Kothari , Sang-June Park
IPC分类号： H01G7/00 , H01G7/06
CPC分类号： H01G7/00 , H01G5/16 , H01P1/127 , Y10T29/435
摘要： MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals.
摘要翻译：描述能够处理大信号和/或实现高电容调谐范围的MEMS变容二极管。在示例性设计中，MEMS变容二极管包括（i）电耦合到接收输入信号的第一端子的第一底板，（ii）电耦合到接收DC电压的第二端子的第二底板，以及（iii）顶板形成在第一和第二底板上并电耦合到第三端子。直流电压使顶板机械地移动并改变由输入信号观察到的电容。在另一示例性设计中，MEMS变容二极管包括彼此形成并分别电耦合到第一，第二和第三端子的第一，第二和第三板。第一和第二直流电压可以分别施加到第一和第三端子。输入信号可以在第一和第二端子之间通过。

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