专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08344439B2 Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions and methods of forming same 有权
标题翻译：集成电路电容器，其中包含结晶抑制区域的复合电介质层及其形成方法
公开(公告)号：US08344439B2
公开(公告)日：2013-01-01
申请号：US13171163
申请日：2011-06-28
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
IPC分类号： H01L29/94
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
摘要翻译：集成电路电容器在其中具有复合电介质层。这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

2. 发明申请

US20100187655A1 Integrated Circuit Capacitors Having Composite Dielectric Layers Therein Containing Crystallization Inhibiting Regions and Methods of Forming Same 有权
标题翻译：具有复合介质层的集成电路电容器，其中包含结晶抑制区域和形成方法
公开(公告)号：US20100187655A1
公开(公告)日：2010-07-29
申请号：US12754713
申请日：2010-04-06
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
IPC分类号： H01L29/92
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
摘要翻译：集成电路电容器在其中具有复合电介质层。这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

3. 发明授权

US07973352B2 Capacitors having composite dielectric layers containing crystallization inhibiting regions 有权
标题翻译：具有包含结晶抑制区域的复合电介质层的电容器
公开(公告)号：US07973352B2
公开(公告)日：2011-07-05
申请号：US12754713
申请日：2010-04-06
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
IPC分类号： H01L29/94
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
摘要翻译：集成电路电容器在其中具有复合电介质层。这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

4. 发明授权

US07723770B2 Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions 有权
标题翻译：集成电路电容器，其中包含结晶抑制区的复合介电层
公开(公告)号：US07723770B2
公开(公告)日：2010-05-25
申请号：US11210332
申请日：2005-08-24
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
IPC分类号： H01L27/108
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
摘要翻译：集成电路电容器在其中具有复合电介质层。这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

5. 发明申请

US20060046380A1 Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions and methods of forming same 有权
公开(公告)号：US20060046380A1
公开(公告)日：2006-03-02
申请号：US11210332
申请日：2005-08-24
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Young-sun Kim , Se-hoon Oh
IPC分类号： H01L21/8244
CPC分类号： H01L29/92 , H01L27/10852 , H01L28/40
摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.

6. 发明授权

US07304367B2 Metal-insulator-metal capacitors including transition metal silicide films on doped polysilicon contact plugs 有权
标题翻译：金属绝缘体金属电容器，包括掺杂多晶硅接触插头上的过渡金属硅化物膜
公开(公告)号：US07304367B2
公开(公告)日：2007-12-04
申请号：US10870745
申请日：2004-06-17
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Nam-myun Cho , Jeong-sik Choi , Se-hoon Oh , Dong-kyun Park
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Nam-myun Cho , Jeong-sik Choi , Se-hoon Oh , Dong-kyun Park
IPC分类号： H01L29/00
CPC分类号： H01L28/91
摘要： A MIM capacitor can include a doped polysilicon contact plug in an interlayer insulating film. A lower electrode of the MIM capacitor includes a transition metal nitride film is on the doped polysilicon contact plug. A transition metal silicide film is between the doped polysilicon contact plug and the transition metal nitride film.
摘要翻译： MIM电容器可以包括层间绝缘膜中的掺杂多晶硅接触插塞。 MIM电容器的下电极包括在掺杂多晶硅接触插塞上的过渡金属氮化物膜。过渡金属硅化物膜位于掺杂多晶硅接触插塞和过渡金属氮化物膜之间。

7. 发明授权

US06995071B2 Methods of forming MIM type capacitor structures using low temperature plasma processing 有权
标题翻译：使用低温等离子体处理形成MIM型电容器结构的方法
公开(公告)号：US06995071B2
公开(公告)日：2006-02-07
申请号：US10830214
申请日：2004-04-22
申请人： Se-hoon Oh , Jung-hee Chung , Jae-hyoung Choi , Jeong-sik Choi , Sung-tae Kim , Cha-young Yoo
发明人： Se-hoon Oh , Jung-hee Chung , Jae-hyoung Choi , Jeong-sik Choi , Sung-tae Kim , Cha-young Yoo
IPC分类号： H10L21/8242
CPC分类号： H01L27/10852 , C23C16/405 , C23C16/56 , H01L21/02181 , H01L21/0228 , H01L21/0234 , H01L21/02356 , H01L21/31645 , H01L27/10817 , H01L27/10855 , H01L28/91 , Y10S438/957
摘要： Methods of forming metal-insulator-metal type capacitors in integrated circuit memory devices can include crystallizing an HfO2 dielectric layer on a lower electrode of a capacitor structure in a low temperature plasma treatment at a temperature in range between about 250 degrees Centigrade and about 450 degrees Centigrade. An upper electrode can be formed on the HfO2 dielectric layer.
摘要翻译：在集成电路存储器件中形成金属 - 绝缘体 - 金属型电容器的方法可以包括在低温等离子体处理中在电容器结构的下部电极上结晶HfO 2/2电介质层，温度范围为约250摄氏度和约450摄氏度。上电极可以形成在HfO 2 2电介质层上。

8. 发明申请

US20050023640A1 Metal-insulator-metal capacitors including transition metal silicide films on doped polysilicon contact plugs and methods of forming the same 有权
标题翻译：包括掺杂多晶硅接触插塞上的过渡金属硅化物膜的金属 - 绝缘体 - 金属电容器及其形成方法
公开(公告)号：US20050023640A1
公开(公告)日：2005-02-03
申请号：US10870745
申请日：2004-06-17
申请人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Nam-myun Cho , Jeong-sik Choi , Se-hoon Oh , Dong-kyun Park
发明人： Jae-hyoung Choi , Jung-hee Chung , Cha-young Yoo , Nam-myun Cho , Jeong-sik Choi , Se-hoon Oh , Dong-kyun Park
IPC分类号： H01L27/108 , H01L21/02 , G02F1/136 , H01L21/20 , H01L29/00
CPC分类号： H01L28/91
摘要： A MIM capacitor can include a doped polysilicon contact plug in an interlayer insulating film. A lower electrode of the MIM capacitor includes a transition metal nitride film is on the doped polysilicon contact plug. A transition metal silicide film is between the doped polysilicon contact plug and the transition metal nitride film.
摘要翻译： MIM电容器可以包括层间绝缘膜中的掺杂多晶硅接触插塞。 MIM电容器的下电极包括在掺杂多晶硅接触插塞上的过渡金属氮化物膜。过渡金属硅化物膜位于掺杂多晶硅接触插塞和过渡金属氮化物膜之间。

9. 发明授权

US07422943B2 Semiconductor device capacitors with oxide-nitride layers and methods of fabricating such capacitors 有权
标题翻译：具有氧化物氮化物层的半导体器件电容器和制造这种电容器的方法
公开(公告)号：US07422943B2
公开(公告)日：2008-09-09
申请号：US11386660
申请日：2006-03-22
申请人： Jong-cheol Lee , Young-sun Kim , Jung-hee Chung , Jae-hyoung Choi , Se-hoon Oh , Hong-bum Park
发明人： Jong-cheol Lee , Young-sun Kim , Jung-hee Chung , Jae-hyoung Choi , Se-hoon Oh , Hong-bum Park
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852 , H01L28/75
摘要： Capacitors having upper electrodes that include a lower electrode, a dielectric layer and an upper electrode that includes a conductive metal nitride layer and a doped polysilicon germanium layer are provided. At least part of the conductive metal nitride layer is oxidized and/or at least part of the dielectric layer is nitridized.
摘要翻译：提供具有包括下电极，电介质层和包括导电金属氮化物层和掺杂多晶硅锗层的上电极的上电极的电容器。导电金属氮化物层的至少一部分被氧化和/或至少部分介电层被氮化。

10. 发明申请

US20070040203A1 Semiconductor device capacitors with oxide-nitride layers and methods of fabricating such capacitors 有权
标题翻译：具有氧化物氮化物层的半导体器件电容器和制造这种电容器的方法
公开(公告)号：US20070040203A1
公开(公告)日：2007-02-22
申请号：US11386660
申请日：2006-03-22
申请人： Jong-cheol Lee , Young-sun Kim , Jung-hee Chung , Jae-hyoung Choi , Se-hoon Oh , Hong-bum Park
发明人： Jong-cheol Lee , Young-sun Kim , Jung-hee Chung , Jae-hyoung Choi , Se-hoon Oh , Hong-bum Park
IPC分类号： H01L27/108
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852 , H01L28/75
摘要： Capacitors having upper electrodes that include a lower electrode, a dielectric layer and an upper electrode that includes a conductive metal nitride layer and a doped polysilicon germanium layer are provided. At least part of the conductive metal nitride layer is oxidized and/or at least part of the dielectric layer is nitridized.
摘要翻译：提供具有包括下电极，电介质层和包括导电金属氮化物层和掺杂多晶硅锗层的上电极的上电极的电容器。导电金属氮化物层的至少一部分被氧化和/或至少部分介电层被氮化。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式