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1. 发明申请

US20120191946A1 FAST REMOTE COMMUNICATION AND COMPUTATION BETWEEN PROCESSORS 有权
标题翻译：处理器之间的快速远程通信和计算
公开(公告)号：US20120191946A1
公开(公告)日：2012-07-26
申请号：US13413787
申请日：2012-03-07
申请人： John Bruce Carter , Elmootazbellah Nabil Elnozahy , Ahmed Gheith , Eric Van Hensbergen , Karthick Rajamani , William Evan Speight , Lixin Zhang
发明人： John Bruce Carter , Elmootazbellah Nabil Elnozahy , Ahmed Gheith , Eric Van Hensbergen , Karthick Rajamani , William Evan Speight , Lixin Zhang
IPC分类号： G06F15/76 , G06F9/312
CPC分类号： G06F9/544
摘要： A method for fast remote communication and computation between processors is provided in the illustrative embodiments. A direct core to core communication unit (DCC) is configured to operate with a first processor, the first processor being a remote processor. A memory associated with the DCC receives a set of bytes, the set of bytes being sent from a second processor. An operation specified in the set of bytes is executed at the remote processor such that the operation is invoked without causing a software thread to execute.
摘要翻译：在说明性实施例中提供了用于处理器之间的快速远程通信和计算的方法。核心通信单元（DCC）的直接核心被配置为与第一处理器一起操作，第一处理器是远程处理器。与DCC相关联的存储器接收一组字节，该字节集合是从第二处理器发送的。在远程处理器中执行在该组字节中指定的操作，使得调用操作而不使软件线程执行。

2. 发明授权

US08799625B2 Fast remote communication and computation between processors using store and load operations on direct core-to-core memory 有权
标题翻译：在直接核心到内核存储器之间使用存储和加载操作的处理器之间的快速远程通信和计算
公开(公告)号：US08799625B2
公开(公告)日：2014-08-05
申请号：US13413787
申请日：2012-03-07
申请人： John Bruce Carter , Elmootazbellah Nabil Elnozahy , Ahmed Gheith , Eric Van Hansbergen , Karthick Rajamani , William Evan Speight , Lixin Zhang
发明人： John Bruce Carter , Elmootazbellah Nabil Elnozahy , Ahmed Gheith , Eric Van Hansbergen , Karthick Rajamani , William Evan Speight , Lixin Zhang
IPC分类号： G06F9/30
CPC分类号： G06F9/544
摘要： A method for fast remote communication and computation between processors is provided in the illustrative embodiments. A direct core to core communication unit (DCC) is configured to operate with a first processor, the first processor being a remote processor. A memory associated with the DCC receives a set of bytes, the set of bytes being sent from a second processor. An operation specified in the set of bytes is executed at the remote processor such that the operation is invoked without causing a software thread to execute.
摘要翻译：在说明性实施例中提供了用于处理器之间的快速远程通信和计算的方法。核心通信单元（DCC）的直接核心被配置为与第一处理器一起操作，第一处理器是远程处理器。与DCC相关联的存储器接收一组字节，该字节集合是从第二处理器发送的。在远程处理器中执行在该组字节中指定的操作，使得调用操作而不使软件线程执行。

3. 发明授权

US09934079B2 Fast remote communication and computation between processors using store and load operations on direct core-to-core memory 有权
公开(公告)号：US09934079B2
公开(公告)日：2018-04-03
申请号：US12789082
申请日：2010-05-27
申请人： John Bruce Carter , Elmootazbellah Nabil Elnozahy , Ahmed Gheith , Eric Van Hansbergen , Karthick Rajamani , William Evan Speight , Lixin Zhang
发明人： John Bruce Carter , Elmootazbellah Nabil Elnozahy , Ahmed Gheith , Eric Van Hansbergen , Karthick Rajamani , William Evan Speight , Lixin Zhang
IPC分类号： G06F15/00 , G06F15/76 , G06F9/54
CPC分类号： G06F9/544
摘要： A system, and computer usable program product for fast remote communication and computation between processors are provided in the illustrative embodiments. A direct core to core communication unit (DCC) is configured to operate with a first processor, the first processor being a remote processor. A memory associated with the DCC receives a set of bytes, the set of bytes being sent from a second processor. An operation specified in the set of bytes is executed at the remote processor such that the operation is invoked without causing a software thread to execute.

4. 发明授权

US10049957B2 On-chip control of thermal cycling 有权
公开(公告)号：US10049957B2
公开(公告)日：2018-08-14
申请号：US13040094
申请日：2011-03-03
申请人： Malcolm Scott Allen-Ware , John Bruce Carter , Elmootazbellah Nabil Elnozahy , Wei Huang
发明人： Malcolm Scott Allen-Ware , John Bruce Carter , Elmootazbellah Nabil Elnozahy , Wei Huang
IPC分类号： H01L23/34
摘要： A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.

5. 发明申请

US20120223764A1 ON-CHIP CONTROL OF THERMAL CYCLING 审中-公开
标题翻译：热循环的片上控制
公开(公告)号：US20120223764A1
公开(公告)日：2012-09-06
申请号：US13040094
申请日：2011-03-03
申请人： Malcolm Scott Allen-Ware , John Bruce Carter , Elmootazbellah Nabil Elnozahy , Wei Huang
发明人： Malcolm Scott Allen-Ware , John Bruce Carter , Elmootazbellah Nabil Elnozahy , Wei Huang
IPC分类号： H03K3/36
CPC分类号： H01L23/34 , H01L2924/0002 , H01L2924/00
摘要： A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.
摘要翻译：在说明性实施例中提供了用于集成电路（IC）中的热循环的片上控制的方法，系统和计算机程序产品。在IC上配置第一电路，用于调整施加到IC的第一部分的第一电压。在第一时间测量第一部分的第一温度。确定第一温度在由较高温度阈值和较低温度阈值所限定的温度范围之外。当第一温度超过上限温度阈值时，通过降低第一电压并且当第一温度低于低温阈值时增加第一电压，从而使第一部分的第一温度达到第一电压值温度范围。

6. 发明申请

US20080263284A1 Methods and Arrangements to Manage On-Chip Memory to Reduce Memory Latency 有权
标题翻译：管理片上存储器以减少内存延迟的方法和布置
公开(公告)号：US20080263284A1
公开(公告)日：2008-10-23
申请号：US12145034
申请日：2008-06-24
申请人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
发明人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
IPC分类号： G06F12/08
CPC分类号： G06F12/08 , G06F12/0893 , G06F2212/251 , G06F2212/253
摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
摘要翻译：考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。

7. 发明授权

US07437517B2 Methods and arrangements to manage on-chip memory to reduce memory latency 有权
标题翻译：管理片上存储器以减少内存延迟的方法和安排
公开(公告)号：US07437517B2
公开(公告)日：2008-10-14
申请号：US11032876
申请日：2005-01-11
申请人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
发明人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
IPC分类号： G06F12/00 , G06F13/00 , G06F3/00
CPC分类号： G06F12/08 , G06F12/0893 , G06F2212/251 , G06F2212/253
摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
摘要翻译：考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。

8. 发明授权

US06701421B1 Application-level memory affinity control 失效
标题翻译：应用级内存亲和度控制
公开(公告)号：US06701421B1
公开(公告)日：2004-03-02
申请号：US09640541
申请日：2000-08-17
申请人： Elmootazbellah Nabil Elnozahy , Ramakrishnan Rajamony
发明人： Elmootazbellah Nabil Elnozahy , Ramakrishnan Rajamony
IPC分类号： G06F1208
CPC分类号： G06F9/5016 , G06F9/4401 , G06F12/0813
摘要： A method for allocating memory in a data processing system in which a configuration table indicative of the system's physical memory is generated following a boot event. The configuration table is then modified to identify a portion of the system's physical memory thereby hiding the remaining portion from the operating system. Subsequently, a memory allocation request is initiated by an application program. A device driver invoked by the application program then maps physical memory from the hidden portion to the application's virtual address space to satisfy the application request. The application program may be executing on a first node of a multi-node system in which each node is associated with its own local memory, In this embodiment, the node on which the allocated physical memory is located may be derived from the allocation request thereby facilitating application level, allocation of specified portions of physical memory.
摘要翻译：一种用于在数据处理系统中分配存储器的方法，其中在引导事件之后生成指示系统的物理存储器的配置表。然后修改配置表以识别系统的物理存储器的一部分，从而隐藏来自操作系统的剩余部分。随后，应用程序启动存储器分配请求。应用程序调用的设备驱动程序然后将物理内存从隐藏部分映射到应用程序的虚拟地址空间，以满足应用程序请求。应用程序可以在其中每个节点与其自己的本地存储器相关联的多节点系统的第一节点上执行。在该实施例中，可以从分配请求导出分配的物理存储器所在的节点促进应用程序级别，物理内存的指定部分的分配。

9. 发明授权

US06178441B1 Method and system in a computer network for the reliable and consistent ordering of client requests 失效
标题翻译：计算机网络中的方法和系统可靠和一致地排序客户端请求
公开(公告)号：US06178441B1
公开(公告)日：2001-01-23
申请号：US09157425
申请日：1998-09-21
申请人： Elmootazbellah Nabil Elnozahy
发明人： Elmootazbellah Nabil Elnozahy
IPC分类号： G06F1516
CPC分类号： G06F11/2097 , G06F11/2035 , G06F11/2048 , H04L67/1002 , H04L67/1034
摘要： A method and system for reliably and consistently delivering client requests in a computer network having at least one client connectable to one or more servers among a group of servers, wherein each server among the group of servers replicates a particular network service to ensure that the particular network service remains uninterrupted in the event of a server failure. A particular server is designated among the group of servers to manage client requests which seek to update a particular network service state, prior to any receipt of a client request which seeks to update the particular network service state by any remaining servers among the group of servers. Thereafter, an executable order is specified in which client requests which seek to update the particular network service state are processed among the remaining servers, such that the executable order, upon execution, sequences the client request which seeks to update the particular network service state with respect to all prior and subsequent client requests. The executable order and the client request which seeks to update the particular network service state are automatically transferred to the remaining servers from the particular server, in response to initiating the client request. Thereafter, the client request which seeks to update the particular network service state is processed in a tentative mode at the particular server without waiting for the executable order to be executed through to completion among the remaining servers.
摘要翻译：一种用于在具有可连接到一组服务器中的一个或多个服务器的至少一个客户端的计算机网络中可靠且一致地递送客户端请求的方法和系统，其中所述服务器组中的每个服务器复制特定网络服务以确保特定的网络服务在服务器发生故障时保持不间断。在一组服务器之间指定特定服务器以管理客户端请求，以在任何接收到客户端请求之前寻求更新特定网络服务状态，该客户端请求试图通过服务器组中的任何剩余服务器来更新特定网络服务状态。此后，指定可执行顺序，其中在剩余服务器中处理寻求更新特定网络服务状态的客户端请求，使得执行时的可执行顺序将寻求更新特定网络服务状态的客户端请求排序，尊重所有之前和之后的客户端请求。响应于发起客户端请求，寻求更新特定网络服务状态的可执行顺序和客户机请求被自动地从特定服务器传送到剩余的服务器。此后，寻求更新特定网络服务状态的客户端请求在特定服务器处于暂时模式，而不用等待在其余服务器之间完成的可执行顺序。

10. 发明授权

US08990831B2 Framework for scheduling multicore processors 有权
标题翻译：多核处理器调度框架
公开(公告)号：US08990831B2
公开(公告)日：2015-03-24
申请号：US13413768
申请日：2012-03-07
申请人： Elmootazbellah Nabil Elnozahy , Heather Lynn Hanson , James Lyle Peterson , Freeman Leigh Rawson, III , Malcolm Scott Ware
发明人： Elmootazbellah Nabil Elnozahy , Heather Lynn Hanson , James Lyle Peterson , Freeman Leigh Rawson, III , Malcolm Scott Ware
IPC分类号： G06F3/00 , G06F9/46 , G06F9/48 , G06F9/54 , G06F9/50
CPC分类号： G06F9/4893 , G06F9/4881 , G06F9/5027 , G06F9/54 , Y02D10/22 , Y02D10/24
摘要： A method for a framework for scheduling tasks in a multi-core processor or multiprocessor system is provided in the illustrative embodiments. A thread is selected according to an order in a scheduling discipline, the thread being a thread of an application executing in the data processing system, the thread forming the leader thread in a bundle of threads. A value of a core attribute in a set of core attributes is determined according to a corresponding thread attribute in a set of thread attributes associated with the leader thread. A determination is made whether a second thread can be added to the bundle such that the bundle including the second thread will satisfy a policy. If the determining is affirmative, the second thread is added to the bundle. The bundle is scheduled for execution using a core of the multi-core processor.
摘要翻译：在说明性实施例中提供了用于在多核处理器或多处理器系统中调度任务的框架的方法。根据调度规则中的顺序选择线程，该线程是在数据处理系统中执行的应用程序的线程，线程形成一束线程中的引导线程。一组核心属性中的核心属性的值根据与引导线程相关联的一组线程属性中的相应线程属性来确定。确定是否可以将第二线程添加到捆绑包，使得包括第二线程的包将满足策略。如果确定是肯定的，则将第二个线程添加到捆绑包中。该捆绑计划使用多核处理器的核心进行执行。

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