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1. 发明授权

US08498344B2 Frequency responsive bus coding 有权
标题翻译：频率响应总线编码
公开(公告)号：US08498344B2
公开(公告)日：2013-07-30
申请号：US12999495
申请日：2009-06-18
申请人： John M. Wilson , Aliazam Abbasfar , John Eble, III , Lei Luo , Jade M. Kizer , Carl William Werner , Wayne Dettloff
发明人： John M. Wilson , Aliazam Abbasfar , John Eble, III , Lei Luo , Jade M. Kizer , Carl William Werner , Wayne Dettloff
IPC分类号： H04B3/00 , H04L25/00
CPC分类号： H04L25/49 , H04L25/4915
摘要： A data system 102 permits bus encoding based on frequency of the bus; an encoding scheme may be implemented to avoid undesirable frequency conditions such as a resonant condition that may lead to degradation in system performance. The device or integrated circuit will typically include an encoder; in one embodiment, the encoder is a data bus inversion (DBI) circuit that selectively inverts all lines of a data bus. A detector that may include a band-pass or stop-band filter that, for example, evaluates data for transmission on the bus to detect frequency, for example, a predetermined frequency or a frequency range. The detector provides a control signal for the encoder to selectively apply an encoding scheme as a function of frequency.
摘要翻译：数据系统102允许基于总线频率的总线编码; 可以实现编码方案以避免不期望的频率条件，例如可能导致系统性能下降的共振条件。设备或集成电路通常将包括编码器; 在一个实施例中，编码器是选择性地反转数据总线的所有行的数据总线反相（DBI）电路。可以包括带通或阻带滤波器的检测器，其例如评估用于在总线上传输的数据以检测频率，例如预定频率或频率范围。检测器为编码器提供控制信号，以选择性地应用作为频率的函数的编码方案。

2. 发明申请

US20110127990A1 FREQUENCY RESPONSIVE BUS CODING 有权
标题翻译：频率响应总线编码
公开(公告)号：US20110127990A1
公开(公告)日：2011-06-02
申请号：US12999495
申请日：2009-06-18
申请人： John M. Wilson , Aliazam Abbasfar , John Eble, III , Lei Luo , Jade M. Kizer , Carl William Werner , Wayne Dettloff
发明人： John M. Wilson , Aliazam Abbasfar , John Eble, III , Lei Luo , Jade M. Kizer , Carl William Werner , Wayne Dettloff
IPC分类号： G01R23/165
CPC分类号： H04L25/49 , H04L25/4915
摘要： A data system 102 permits bus encoding based on frequency of the bus; an encoding scheme may be implemented to avoid undesirable frequency conditions such as a resonant condition that may lead to degradation in system performance. The device or integrated circuit will typically include an encoder; in one embodiment, the encoder is a data bus inversion (DBI) circuit that selectively inverts all lines of a data bus. A detector that may include a band-pass or stop-band filter that, for example, evaluates data for transmission on the bus to detect frequency, for example, a predetermined frequency or a frequency range. The detector provides a control signal for the encoder to selectively apply an encoding scheme as a function of frequency.
摘要翻译：数据系统102允许基于总线频率的总线编码; 可以实现编码方案以避免不期望的频率条件，例如可能导致系统性能下降的共振条件。设备或集成电路通常将包括编码器; 在一个实施例中，编码器是选择性地反转数据总线的所有行的数据总线反相（DBI）电路。可以包括带通或阻带滤波器的检测器，其例如评估用于在总线上传输的数据以检测频率，例如预定频率或频率范围。检测器为编码器提供控制信号，以选择性地应用作为频率的函数的编码方案。

3. 发明授权

US08451674B2 Clock synchronization in a memory system 有权
标题翻译：存储器系统中的时钟同步
公开(公告)号：US08451674B2
公开(公告)日：2013-05-28
申请号：US13446703
申请日：2012-04-13
申请人： Jade M. Kizer , John M. Wilson , John Eble, III , Frederick A. Ware
发明人： Jade M. Kizer , John M. Wilson , John Eble, III , Frederick A. Ware
IPC分类号： G11C7/00
CPC分类号： G11C7/1066 , G11C7/1051 , G11C7/1078 , G11C7/1093 , G11C7/22 , G11C7/222 , G11C2207/2254
摘要： Synchronization is provided in a memory system. During memory write operations a timing reference signal is transmitted with control signals to a memory device, and a calibration signal is received from the memory device. An internal clock signal is adjusted based on the calibration signal, and a data signal is then transmitted according to the internal clock. In this manner, the data is synchronized such that the data is accurately sampled according to the local clock signal.
摘要翻译：在存储器系统中提供同步。在存储器写入操作期间，通过控制信号将定时参考信号发送到存储器件，并且从存储器件接收校准信号。根据校准信号调整内部时钟信号，然后根据内部时钟发送数据信号。以这种方式，数据被同步，使得数据根据本地时钟信号被精确地采样。

4. 发明申请

US20120262998A1 CLOCK SYNCHRONIZATION IN A MEMORY SYSTEM 有权
标题翻译：记忆系统中的时钟同步
公开(公告)号：US20120262998A1
公开(公告)日：2012-10-18
申请号：US13446703
申请日：2012-04-13
申请人： Jade M. Kizer , John M. Wilson , John Eble, III , Frederick A. Ware
发明人： Jade M. Kizer , John M. Wilson , John Eble, III , Frederick A. Ware
IPC分类号： G11C7/00
CPC分类号： G11C7/1066 , G11C7/1051 , G11C7/1078 , G11C7/1093 , G11C7/22 , G11C7/222 , G11C2207/2254
摘要： Synchronization is provided in a memory system. During memory write operations a timing reference signal is transmitted with control signals to a memory device, and a calibration signal is received from the memory device. An internal clock signal is adjusted based on the calibration signal, and a data signal is then transmitted according to the internal clock. In this manner, the data is synchronized such that the data is accurately sampled according to the local clock signal.
摘要翻译：在存储器系统中提供同步。在存储器写入操作期间，通过控制信号将定时参考信号发送到存储器件，并且从存储器件接收校准信号。根据校准信号调整内部时钟信号，然后根据内部时钟发送数据信号。以这种方式，数据被同步，使得数据根据本地时钟信号被精确地采样。

5. 发明申请

US20100188910A1 CLOCK SYNCHRONIZATION IN A MEMORY SYSTEM 有权
标题翻译：记忆系统中的时钟同步
公开(公告)号：US20100188910A1
公开(公告)日：2010-07-29
申请号：US12596535
申请日：2008-04-18
申请人： Jade M. Kizer , John M. Wilson , John Eble III , Frederick A. Ware
发明人： Jade M. Kizer , John M. Wilson , John Eble III , Frederick A. Ware
IPC分类号： G11C7/22 , G11C8/18
CPC分类号： G11C7/1066 , G11C7/1051 , G11C7/1078 , G11C7/1093 , G11C7/22 , G11C7/222 , G11C2207/2254
摘要： A system and method for synchronizing a strobed memory system 10. During memory read and/or memory write operations the corresponding data strobe is sampled at the data destination 50/55 according to a local clock signal 71/73. Based on the results of the sampling, the data strobe and local clock signal are synchronized. In this manner, the data is synchronized to the local clock signal so that sampling of data at the data destination can be performed according to the local clock signal rather than the data strobe.
摘要翻译：用于同步选通存储器系统10的系统和方法。在存储器读取和/或存储器写入操作期间，根据本地时钟信号71/73在数据目的地50/55处对相应的数据选通进行采样。基于采样结果，数据选通和本地时钟信号同步。以这种方式，数据与本地时钟信号同步，使得可以根据本地时钟信号而不是数据选通来执行数据目的地的数据采样。

6. 发明授权

US08159887B2 Clock synchronization in a memory system 有权
标题翻译：存储器系统中的时钟同步
公开(公告)号：US08159887B2
公开(公告)日：2012-04-17
申请号：US12596535
申请日：2008-04-18
申请人： Jade M. Kizer , John M. Wilson , John Eble, III , Frederick A. Ware
发明人： Jade M. Kizer , John M. Wilson , John Eble, III , Frederick A. Ware
IPC分类号： G11C7/00
CPC分类号： G11C7/1066 , G11C7/1051 , G11C7/1078 , G11C7/1093 , G11C7/22 , G11C7/222 , G11C2207/2254
摘要： A system and method for synchronizing a strobed memory system 10. During memory read and/or memory write operations the corresponding data strobe is sampled at the data destination 50/55 according to a local clock signal 71/73. Based on the results of the sampling, the data strobe and local clock signal are synchronized. In this manner, the data is synchronized to the local clock signal so that sampling of data at the data destination can be performed according to the local clock signal rather than the data strobe.
摘要翻译：用于同步选通存储器系统10的系统和方法。在存储器读取和/或存储器写入操作期间，根据本地时钟信号71/73在数据目的地50/55处对相应的数据选通进行采样。基于采样结果，数据选通和本地时钟信号同步。以这种方式，数据与本地时钟信号同步，使得可以根据本地时钟信号而不是数据选通来执行数据目的地的数据采样。

7. 发明申请

US20140088906A1 Inertial Sensor Bias Estimation by Flipping 审中-公开
标题翻译：惯性传感器偏置估计通过翻转
公开(公告)号：US20140088906A1
公开(公告)日：2014-03-27
申请号：US13681591
申请日：2012-11-20
申请人： John M. Wilson
发明人： John M. Wilson
IPC分类号： G01P21/00 , G06F15/00 , G01P15/18 , G01P15/02
CPC分类号： G01P21/00 , G01C25/005 , G01P15/02 , G01P15/18 , G06F15/00
摘要： First and second inertial sensors are arranged in such a manner that their sensitive axes may be made alternately parallel and anti-parallel to one another. Measurements from both inertial sensors are taken during parallel and anti-parallel periods. Measurements from these two periods are used to calculate sensor biases for both sensors. Sensor biases so obtained are used to correct the outputs of the first and second inertial sensors.
摘要翻译：第一和第二惯性传感器被布置成使得它们的敏感轴线可以彼此交替平行和反平行。两个惯性传感器的测量是在平行和反平行时段进行的。这两个周期的测量用于计算两个传感器的传感器偏差。如此获得的传感器偏压用于校正第一和第二惯性传感器的输出。

8. 发明授权

US07578453B1 Handshower assembly 有权
标题翻译：手洗组件
公开(公告)号：US07578453B1
公开(公告)日：2009-08-25
申请号：US12032131
申请日：2008-02-15
申请人： John M. Wilson
发明人： John M. Wilson
IPC分类号： B05B1/18 , B05B1/16 , B05B1/12 , B05B1/14
CPC分类号： B05B1/1672 , B05B1/18 , B05B1/20
摘要： A handshower is disclosed providing two different radial spray patterns that can be selectively operated. There is a handle adapted for connection to a water supply, a nozzle head having an outer sleeve and an inner chamber connected to the handle, and an axially extending waterway positioned in an inner chamber of the nozzle head. On the sleeve there is an array of outlets running from the inner chamber to an outer radial face. The waterway has an axially extending channel and multiple sets of radially extending orifices. The sleeve is rotatable relative to the waterway from a first position where the channel is in communication with a first group of outlets to a second position where the channel is in communication with at least some of the outlets that are not in the first group.
摘要翻译：公开了一种提供可以选择性地操作的两种不同的径向喷雾图案的洗手间。存在适于连接到供水的手柄，具有外套筒和连接到手柄的内室的喷嘴头以及位于喷嘴头的内腔中的轴向延伸水道。在套筒上有一排出口，从内腔延伸到外径向面。水道具有轴向延伸的通道和多组径向延伸的孔。所述套筒可相对于所述水路从第一位置旋转，其中所述通道与第一组出口连通，至所述通道与不在所述第一组中的至少一些出口连通的第二位置。

9. 发明授权

US06313788B1 Method and apparatus for reliable inter-antenna baseline determination 有权
标题翻译：可靠的天线间基线测定方法和装置
公开(公告)号：US06313788B1
公开(公告)日：2001-11-06
申请号：US09134228
申请日：1998-08-14
申请人： John M. Wilson
发明人： John M. Wilson
IPC分类号： G01S502
CPC分类号： G01S5/0247 , G01S19/55
摘要： Disclosed is a method for inter-antenna baseline determination that uses an antenna configuration comprising a pair of relatively closely spaced antennas and other pairs of distant antennas. The closely spaced pair provides a short baseline having an integer ambiguity that may be searched exhaustively to identify the correct set of integers. This baseline is then used as a priori information to aid the determination of longer baselines that, once determined, may be used for accurate run time attitude determination.
摘要翻译：公开了一种用于天线间基线确定的方法，其使用包括一对相对紧密间隔的天线和其他对的远距离天线的天线配置。紧密排列的对提供具有整数模糊度的短基线，其可以被穷举地搜索以识别正确的整数集合。然后将该基线用作先验信息以帮助确定更长的基线，一旦确定，可以将其用于准确的运行时姿态确定。

10. 发明授权

US5759567A Method of altering the contents of eggs 失效
标题翻译：改变鸡蛋含量的方法
公开(公告)号：US5759567A
公开(公告)日：1998-06-02
申请号：US777463
申请日：1996-12-30
申请人： Albert H. Meier , John M. Wilson
发明人： Albert H. Meier , John M. Wilson
IPC分类号： A23K1/16 , A23K1/18 , A23L1/32 , A61K31/195 , A61K31/198 , A61P43/00 , A61K9/14
CPC分类号： A61K31/198 , A23K20/142 , A23K50/75 , A23L15/00
摘要： A method for reducing the total fat and cholesterol contents and the ratio of saturated to unsaturated fatty acids and for increasing total protein content in eggs produced by animals is described. The level of L-Dihydroxyphenylalanine (L-DOPA) in the bloodstream of the poultry is elevated so as to cause the animals to produce eggs which have a reduced cholesterol content and eggs which have a lower ratio of saturated to unsaturated fatty acids. In a preferred embodiment the L-DOPA is orally administered to poultry by incorporation in the food for said poultry.
摘要翻译：描述了一种降低总脂肪和胆固醇含量以及饱和与不饱和脂肪酸的比例以及增加由动物产生的蛋中的总蛋白质含量的方法。家禽血液中的L-二羟基苯丙氨酸（L-DOPA）水平升高，从而使动物产生具有降低的胆固醇含量的卵和具有较低的饱和脂肪酸比例的卵。在优选的实施方案中，通过将所述家禽的食物并入，将L-DOPA口服给予家禽。

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