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    • 1. 发明申请
    • LOW NOISE AND LOW INPUT CAPACITANCE DIFFERENTIAL MDS LNA
    • 低噪声和低输入电容差分MDS LNA
    • US20090153244A1
    • 2009-06-18
    • US11959196
    • 2007-12-18
    • Jose CabanillasPrasad S. GudemNamsoo KimCristian MarcuAnup Savla
    • Jose CabanillasPrasad S. GudemNamsoo KimCristian MarcuAnup Savla
    • H03F3/45
    • H03F3/45188H03F1/3205H03F1/3211H03F2203/45318H03F2203/45396
    • A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.
    • 差分低噪声放大器(LNA)涉及两个偏置饱和的主放大晶体管,两个取消晶体管偏置为次阈值。 在一个示例中,取消晶体管的栅极以对称和交叉耦合的方式耦合到主晶体管的漏极。 主晶体管是源极退化的。 因为取消晶体管的栅极没有耦合到LNA的差分输入引线,所以LNA的输入电容减小。 由于存在两个阶段,由于在子阈值区域偏置的取消晶体管而导入到LNA输出中的噪声被减小。 第一级涉及主晶体管,第二级涉及取消晶体管。 通过增加第一级的增益并降低第二级的增益,保持整体LNA增益,同时降低子阈值偏置晶体管对LNA输出有贡献的噪声。
    • 2. 发明授权
    • Low noise and low input capacitance differential MDS LNA
    • 低噪声和低输入电容差分MDS LNA
    • US07944298B2
    • 2011-05-17
    • US11959196
    • 2007-12-18
    • Jose CabanillasPrasad S. GudemNamsoo KimCristian MarcuAnup Savla
    • Jose CabanillasPrasad S. GudemNamsoo KimCristian MarcuAnup Savla
    • H03F3/45
    • H03F3/45188H03F1/3205H03F1/3211H03F2203/45318H03F2203/45396
    • A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.
    • 差分低噪声放大器(LNA)涉及两个偏置饱和的主放大晶体管,两个取消晶体管偏置为次阈值。 在一个示例中,取消晶体管的栅极以对称和交叉耦合的方式耦合到主晶体管的漏极。 主晶体管是源极退化的。 因为取消晶体管的栅极没有耦合到LNA的差分输入引线,所以LNA的输入电容减小。 由于存在两个阶段,由于在子阈值区域偏置的取消晶体管而导入到LNA输出中的噪声被减小。 第一级涉及主晶体管,第二级涉及取消晶体管。 通过增加第一级的增益并降低第二级的增益,保持整体LNA增益,同时降低子阈值偏置晶体管对LNA输出有贡献的噪声。
    • 3. 发明申请
    • COMMON MODE SIGNAL ATTENUATION FOR A DIFFERENTIAL DUPLEXER
    • 差分双工器的共模信号衰减
    • US20090068963A1
    • 2009-03-12
    • US11864338
    • 2007-09-28
    • Jose CabanillasPrasad S. GudemSai Chong KwokDavid Love
    • Jose CabanillasPrasad S. GudemSai Chong KwokDavid Love
    • H04B1/44
    • H04B1/52H04B1/18
    • Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX− ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX− ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX− port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.
    • 描述了用于衰减来自差分双工器的不需要的信号分量的技术。 双工器在RX +和RX-端口提供差分接收信号。 该差分接收信号包括可能来自发射信号的不期望的共模信号。 在耦合到RX +和RX-端口的阻抗匹配网络中,共模信号被一个共模陷波衰减。 匹配网络包括耦合在RX +端口和第一节点之间的第一无源电路,耦合在RX端口和第二节点之间的第二无源电路以及耦合在第一和第二节点之间的共模陷阱。 在一种设计中,共模阱包括耦合在第一节点和公共节点之间的第一电感器,耦合在第二节点和公共节点之间的第二电感器,以及耦合在公共节点和电路接地之间的电容器。
    • 4. 发明授权
    • Reconfigurable high linearity low noise figure receiver requiring no interstage saw filter
    • 可重构的高线性度低噪声系数接收器,不需要级间锯式过滤器
    • US08433272B2
    • 2013-04-30
    • US12233420
    • 2008-09-18
    • Prasad S. GudemJose CabanillasLi-Chung ChangLi Liu
    • Prasad S. GudemJose CabanillasLi-Chung ChangLi Liu
    • H04K3/00H04B1/06H04B7/00
    • H04B1/109H03F1/3205H03F1/3211H03F3/193H03F3/245
    • A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.
    • 接收机包括干扰检测器,其被配置为检测在增益状态内的通信信号中存在或不存在干扰。 接收器还包括放大器,被配置为以高线性度接收模式或低线性度接收模式放大通信信号,其中高线性度接收模式对应于放大器相对于低线性度的增益状态的较低增益 接收模式。 此外,接收机包括耦合到干扰检测器的处理单元,该处理单元被配置为基于干扰信号的输出来控制放大器以高线性接收模式或低线性度接收模式放大通信信号 检测器检测通信信号中是否存在干扰。 还提供了一种用于处理接收机中的通信信号的方法。
    • 7. 发明授权
    • Common mode signal attenuation for a differential duplexer
    • 差分双工器的共模信号衰减
    • US07848713B2
    • 2010-12-07
    • US11864338
    • 2007-09-28
    • Jose CabanillasPrasad S. GudemSai Chong KwokDavid Love
    • Jose CabanillasPrasad S. GudemSai Chong KwokDavid Love
    • H04B1/46
    • H04B1/52H04B1/18
    • Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX− ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX− ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX− port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.
    • 描述了用于衰减来自差分双工器的不需要的信号分量的技术。 双工器在RX +和RX-端口提供差分接收信号。 该差分接收信号包括可能来自发射信号的不期望的共模信号。 在耦合到RX +和RX-端口的阻抗匹配网络中,共模信号被一个共模陷波衰减。 匹配网络包括耦合在RX +端口和第一节点之间的第一无源电路,耦合在RX端口和第二节点之间的第二无源电路以及耦合在第一和第二节点之间的共模陷阱。 在一种设计中,共模阱包括耦合在第一节点和公共节点之间的第一电感器,耦合在第二节点和公共节点之间的第二电感器,以及耦合在公共节点和电路接地之间的电容器。
    • 8. 发明申请
    • METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER
    • 用于在接收器中处理通信信号的方法和装置
    • US20090258624A1
    • 2009-10-15
    • US12233420
    • 2008-09-18
    • Prasad S. GudemJose CabanillasLi-Chung ChangLi Liu
    • Prasad S. GudemJose CabanillasLi-Chung ChangLi Liu
    • H04B1/16
    • H04B1/109H03F1/3205H03F1/3211H03F3/193H03F3/245
    • A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.
    • 接收机包括干扰检测器,其被配置为检测在增益状态内的通信信号中存在或不存在干扰。 接收器还包括放大器,被配置为以高线性度接收模式或低线性度接收模式放大通信信号,其中高线性度接收模式对应于放大器相对于低线性度的增益状态的较低增益 接收模式。 此外,接收机包括耦合到干扰检测器的处理单元,该处理单元被配置为基于干扰信号的输出来控制放大器以高线性接收模式或低线性度接收模式放大通信信号 检测器检测通信信号中是否存在干扰。 还提供了一种用于处理接收机中的通信信号的方法。
    • 9. 发明授权
    • Cascaded amplifiers with transformer-based bypass mode
    • 具有基于变压器的旁路模式的级联放大器
    • US08149050B2
    • 2012-04-03
    • US12783448
    • 2010-05-19
    • Jose Cabanillas
    • Jose Cabanillas
    • H03F1/14
    • H03F1/0277H03F3/72H03F2200/318H03F2200/534H03F2200/537H03F2200/541
    • Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil.
    • 描述了基于变压器的旁路模式的级联放大器。 在示例性设计中,装置包括第一和第二放大器和电路。 第一放大器(例如,驱动放大器)以高增益模式和旁路模式提供放大。 第二放大器(例如功率放大器)在高增益模式下提供放大。 电路耦合在第一和第二放大器之间并且包括变压器,其具有(i)耦合到第一放大器的初级线圈和(ii)在旁路模式中提供输出信号的次级线圈。 初级线圈可以是用于第一放大器的负载电感器。 电路还可以包括电容器和与初级线圈并联耦合的开关的串联组合,与次级线圈串联耦合的开关和/或与次级线圈并联耦合的电容器。
    • 10. 发明授权
    • Adjustable bypass circuit for a supply voltage for an amplifier
    • 用于放大器电源电压的可调旁路电路
    • US08786373B2
    • 2014-07-22
    • US13401255
    • 2012-02-21
    • Calogero D. PrestiJose Cabanillas
    • Calogero D. PrestiJose Cabanillas
    • H03F3/08
    • H03F1/0211H03F3/24
    • Techniques for bypassing a supply voltage for an amplifier are disclosed. In an exemplary design, an apparatus includes an amplifier and an adjustable bypass circuit. The amplifier (e.g., a power amplifier) receives a supply voltage from a supply source. The adjustable bypass circuit is coupled to the supply source and provides bypassing for the supply voltage. The adjustable bypass circuit includes an adjustable capacitor or a fixed capacitor coupled to an adjustable resistor. The supply source may be (i) a power supply source providing a fixed supply voltage for the amplifier or (ii) an envelope tracker providing a variable supply voltage for the amplifier.
    • 公开了绕过放大器的电源电压的技术。 在示例性设计中,装置包括放大器和可调旁路电路。 放大器(例如,功率放大器)从电源接收电源电压。 可调旁路电路耦合到电源,并为电源电压提供旁路。 可调旁路电路包括可调电容器或耦合到可调电阻器的固定电容器。 供电源可以是(i)为放大器提供固定电源电压的电源,或(ii)为放大器提供可变电源电压的包络跟踪器。