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1. 发明申请

US20120286869A1 CURRENT BUFFER 有权
标题翻译：当前缓冲区
公开(公告)号：US20120286869A1
公开(公告)日：2012-11-15
申请号：US13107754
申请日：2011-05-13
申请人： Namsoo Kim , Joseph Patrick Burke
发明人： Namsoo Kim , Joseph Patrick Burke
IPC分类号： H03F3/45
CPC分类号： H03F3/45659 , H03F3/45179 , H03F2203/45306 , H03F2203/45521 , H03F2203/45612
摘要： A current filtering current buffer amplifier includes: a first port and a second input port configured to be coupled to and receive input current; a first output port and a second output port configured to be coupled to and provide current to a load; a buffer configured to transfer the received input current to the first and second output ports as an output current, the buffer having an input impedance and an output impedance where the output impedance is higher than the input impedance, the buffer including first and second amplifiers, the first amplifier being a common mode feedback amplifier; and a filter coupled to the first and second input ports and coupled to the first and second amplifiers, the filter having a complex impedance and being configured to notch filter the received input current.
摘要翻译：电流滤波电流缓冲放大器包括：第一端口和第二输入端口，被配置为耦合到并接收输入电流; 第一输出端口和第二输出端口，被配置为耦合到负载并且向负载提供电流; 缓冲器，被配置为将接收到的输入电流传送到第一和第二输出端口作为输出电流，该缓冲器具有输入阻抗和输出阻抗，其中输出阻抗高于输入阻抗，该缓冲器包括第一和第二放大器，第一放大器是共模反馈放大器; 以及耦合到所述第一和第二输入端口并耦合到所述第一和第二放大器的滤波器，所述滤波器具有复阻抗并被配置为陷波滤波所接收的输入电流。

2. 发明授权

US08570106B2 Positive feedback common gate low noise amplifier 有权
标题翻译：正反馈公共门低噪声放大器
公开(公告)号：US08570106B2
公开(公告)日：2013-10-29
申请号：US13107737
申请日：2011-05-13
申请人： Namsoo Kim , Joseph Patrick Burke
发明人： Namsoo Kim , Joseph Patrick Burke
IPC分类号： H03F1/38
CPC分类号： H03F3/45179 , H03F1/223 , H03F1/26 , H03F1/38 , H03F1/42 , H03F1/565 , H03F3/193 , H03F2200/294 , H03F2200/36 , H03F2203/45306 , H03F2203/45311 , H03F2203/45318 , H03F2203/45386 , H03F2203/45394 , H03F2203/45511 , H03F2203/45634 , H03F2203/45638
摘要： A Positive Feedback Common Gate Low Noise Amplifier (PFCGLNA) has positive feedback transistors and input transistors that are of the same conductivity type. Making the positive feedback and input transistors of the same conductivity type reduces sensitivity to process variations. Noise generated by the positive feedback transistors is used to cancel noise generated by the input transistors. In one embodiment, the PFCGLNA: 1) is tunable to have a substantially constant input impedance for any frequency in a wideband frequency range from 680 MHz to 980 MHz, and 2) has a noise figure less than 2.2 dB over the entire wideband frequency range. The input impedance of the PFCGLNA can be tuned to match a source that drives the PFCGLNA by setting a multi-bit digital control value supplied to a digitally-programmable tank load of the LNA.
摘要翻译：正反馈公共门低噪声放大器（PFCGLNA）具有正反馈晶体管和具有相同导电类型的输入晶体管。使相同导电类型的正反馈和输入晶体管降低对工艺变化的敏感性。由正反馈晶体管产生的噪声用于消除由输入晶体管产生的噪声。在一个实施例中，PFCGLNA：1）可调谐以对于在680MHz至980MHz的宽带频率范围内的任何频率具有基本上恒定的输入阻抗，以及2）在整个宽带频率范围内具有小于2.2dB的噪声系数。 PFCGLNA的输入阻抗可以通过设置提供给LNA的数字可编程容量负载的多位数字控制值来调节驱动PFCGLNA的源。

3. 发明授权

US08089388B2 Folding analog-to-digital converter 有权
标题翻译：折叠模数转换器
公开(公告)号：US08089388B2
公开(公告)日：2012-01-03
申请号：US12780363
申请日：2010-05-14
申请人： Zhiyuan Cui , Injae Chung , Namsoo Kim
发明人： Zhiyuan Cui , Injae Chung , Namsoo Kim
IPC分类号： H03M1/34
CPC分类号： H03M1/002 , H03M1/141
摘要： A folding analog-to-digital converter (ADC) is disclosed. The folding ADC includes a reference voltage generating unit generating a plurality of reference voltages, a low power analog pre-processing unit including a plurality of folders, each of which compares a voltage level of an analog input signal with a corresponding reference voltage of the plurality of reference voltages to generate a pair of differential folded outputs, a comparison unit that compares outputs of the low power analog pre-processing unit to output a digital signal, and an encoding unit that converts an output of the comparison unit into a binary code signal.
摘要翻译：公开了一种折叠模数转换器（ADC）。折叠ADC包括产生多个参考电压的参考电压产生单元，包括多个文件夹的低功率模拟预处理单元，每个文件夹将模拟输入信号的电压电平与多个参考电压的相应参考电压进行比较的参考电压以产生一对差分折叠输出;比较单元，其比较所述低功率模拟预处理单元的输出以输出数字信号;以及编码单元，其将所述比较单元的输出转换为二进制码信号。

4. 发明申请

US20110207326A1 SLURRY FOR POLISHING AND PLANARIZATION METHOD OF INSULATING LAYER USING THE SAME 有权
标题翻译：用于抛光和平面化方法的浆料用绝缘层进行
公开(公告)号：US20110207326A1
公开(公告)日：2011-08-25
申请号：US13034345
申请日：2011-02-24
申请人： Sangkyun Kim , NamSoo Kim , JongWoo Kim , Yun-Jeong Kim
发明人： Sangkyun Kim , NamSoo Kim , JongWoo Kim , Yun-Jeong Kim
IPC分类号： H01L21/306 , C09K13/00
CPC分类号： C09K3/1463 , C09G1/02 , H01L21/31053
摘要： A polishing slurry includes an abrasive, a dispersion agent, a polish accelerating agent and an adhesion inhibitor. The adhesion inhibitor includes a benzene compound combined with a carboxyl group. Methods of planarizing an insulating layer using the slurry are also provided.
摘要翻译：抛光浆料包括研磨剂，分散剂，抛光促进剂和粘合抑制剂。粘合抑制剂包括与羧基结合的苯化合物。还提供了使用该浆料平坦化绝缘层的方法。

5. 发明授权

US07889007B2 Differential amplifier with active post-distortion linearization 有权
标题翻译：具有有源后失真线性化的差分放大器
公开(公告)号：US07889007B2
公开(公告)日：2011-02-15
申请号：US11696876
申请日：2007-04-05
申请人： Namsoo Kim , Kenneth Charles Barnett , Vladimir Aparin
发明人： Namsoo Kim , Kenneth Charles Barnett , Vladimir Aparin
IPC分类号： H03F3/18
CPC分类号： H03F1/3211 , H03F1/22 , H03F1/223 , H03F1/26 , H03F1/3205 , H03F1/3276 , H03F3/45188 , H03F2200/294 , H03F2200/372 , H03F2200/456 , H03F2200/489 , H03F2200/492 , H03F2203/45296 , H03F2203/45311 , H03F2203/45352 , H03F2203/45386 , H03F2203/45481 , H04B1/525
摘要： A differential amplifier, which has good linearity and noise performance, includes a first side that includes first, second, third, and fourth transistors and an inductor. The first and second transistors are coupled as a first cascode pair, and the third and fourth transistors are coupled as a second cascode pair. The third transistor has its gate coupled to the source of the second transistor, and the fourth transistor has its drain coupled to the drain of the second transistor. The first transistor provides signal amplification. The second transistor provides load isolation and generates an intermediate signal for the third transistor. The third transistor generates distortion components used to cancel third order distortion component generated by the first transistor. The inductor provides source degeneration for the first transistor and improves distortion cancellation. The sizes of the second and third transistors are selected to reduce gain loss and achieve good linearity for the amplifier. The differential amplifier also may include a second side that functions similarly to the first side.
摘要翻译：具有良好线性度和噪声性能的差分放大器包括包括第一，第二，第三和第四晶体管和电感器的第一侧。第一和第二晶体管作为第一共源共栅对耦合，并且第三和第四晶体管作为第二共源共栅对耦合。第三晶体管的栅极耦合到第二晶体管的源极，并且第四晶体管的漏极耦合到第二晶体管的漏极。第一个晶体管提供信号放大。第二晶体管提供负载隔离并为第三晶体管产生中间信号。第三晶体管产生用于消除由第一晶体管产生的三阶失真分量的失真分量。电感器为第一晶体管提供源极退化并改善失真消除。选择第二和第三晶体管的尺寸以减小增益损失并且为放大器获得良好的线性度。差分放大器还可以包括与第一侧类似地起作用的第二侧。

6. 发明授权

US08604876B2 Current buffer 有权
标题翻译：当前缓冲区
公开(公告)号：US08604876B2
公开(公告)日：2013-12-10
申请号：US13107754
申请日：2011-05-13
申请人： Namsoo Kim , Joseph Patrick Burke
发明人： Namsoo Kim , Joseph Patrick Burke
IPC分类号： H03F3/45
CPC分类号： H03F3/45659 , H03F3/45179 , H03F2203/45306 , H03F2203/45521 , H03F2203/45612
摘要： A current filtering current buffer amplifier includes: a first port and a second input port configured to be coupled to and receive input current; a first output port and a second output port configured to be coupled to and provide current to a load; a buffer configured to transfer the received input current to the first and second output ports as an output current, the buffer having an input impedance and an output impedance where the output impedance is higher than the input impedance, the buffer including first and second amplifiers, the first amplifier being a common mode feedback amplifier; and a filter coupled to the first and second input ports and coupled to the first and second amplifiers, the filter having a complex impedance and being configured to notch filter the received input current.
摘要翻译：电流滤波电流缓冲放大器包括：第一端口和第二输入端口，被配置为耦合到并接收输入电流; 第一输出端口和第二输出端口，被配置为耦合到负载并且向负载提供电流; 缓冲器，被配置为将接收到的输入电流传送到第一和第二输出端口作为输出电流，该缓冲器具有输入阻抗和输出阻抗，其中输出阻抗高于输入阻抗，该缓冲器包括第一和第二放大器，第一放大器是共模反馈放大器; 以及耦合到所述第一和第二输入端口并耦合到所述第一和第二放大器的滤波器，所述滤波器具有复阻抗并被配置为陷波滤波所接收的输入电流。

7. 发明授权

US07924198B2 Digital-to-analog converter 有权
标题翻译：数模转换器
公开(公告)号：US07924198B2
公开(公告)日：2011-04-12
申请号：US12646309
申请日：2009-12-23
申请人： Zhiyuan Cui , Injae Chung , Namsoo Kim
发明人： Zhiyuan Cui , Injae Chung , Namsoo Kim
IPC分类号： H03M1/66
CPC分类号： H03M1/002 , H03M1/747
摘要： A digital-to-analog converter is disclosed. The digital-to-analog converter includes a decoder that receives a plurality of digital input signals to output a plurality of thermometer decode signals, a current supply part including a plurality of current sources, each of which operates in one of a sleeping mode and an operating mode under the control of the thermometer decode signals, and a switching part including a plurality of switching units, each of which operates in one of a sleeping mode and an operating mode under the control of the thermometer decode signals. The current supply part selectively outputs a plurality of switching power signals. The switching part outputs an analog signal under the control of the thermometer decode signals.
摘要翻译：公开了一种数模转换器。数模转换器包括一个接收多个数字输入信号以输出多个温度计解码信号的解码器，一个电流供应部分包括多个电流源，每个电流源以睡眠模式和在温度计解码信号的控制下的操作模式，以及包括多个开关单元的开关部分，每个开关单元在温度计解码信号的控制下以睡眠模式和操作模式之一操作。电流供给部选择性地输出多个开关电力信号。开关部分在温度计解码信号的控制下输出模拟信号。

8. 发明申请

US20090195310A1 LNA HAVING A POST-DISTORTION MODE AND A HIGH-GAIN MODE 有权
标题翻译： LNA具有后失真模式和高增益模式
公开(公告)号：US20090195310A1
公开(公告)日：2009-08-06
申请号：US12027107
申请日：2008-02-06
申请人： Christian Holenstein , Junxiong Deng , Namsoo Kim
发明人： Christian Holenstein , Junxiong Deng , Namsoo Kim
IPC分类号： H03F3/45
CPC分类号： H03F3/193 , H03F1/3205 , H03F1/3211 , H03F3/45188 , H03F2200/294 , H03F2200/357 , H03F2200/451 , H03F2203/45246 , H03F2203/45318 , H03F2203/45386 , H03F2203/45396 , H03G1/0029
摘要： A differential low noise amplifier (LNA) is operable in a selectable one of two modes. The LNA includes a first transistor, a second transistor, a third transistor and a fourth transistor. In the first mode (PDC mode), the four transistors are configured to operate as a post-distortion cancellation (PDC) LNA. The third and fourth transistors operate as cancel transistors that improve linearity, but reduce LNA gain somewhat. In the second mode (high gain mode), the third and fourth transistors are configured so that amplified versions of the LNA input signal that they output are added to amplified versions of the LNA input signal that are output by the first and second main transistors, resulting in increased gain. Multiplexing circuits are provided within the LNA so that the LNA is configurable into a selectable one of the two modes by controlling a digital mode control signal supplied to the LNA.
摘要翻译：差分低噪声放大器（LNA）可在两种模式中的一种选择中操作。 LNA包括第一晶体管，第二晶体管，第三晶体管和第四晶体管。在第一模式（PDC模式）中，四个晶体管被配置为作为后失真消除（PDC）LNA而工作。第三和第四晶体管作为提高线性度的消除晶体管工作，但有一些降低LNA增益。在第二模式（高增益模式）中，第三和第四晶体管被配置为使得它们输出的LNA输入信号的放大版本被加到由第一和第二主晶体管输出的LNA输入信号的放大版本，增加收益。在LNA中提供多路复用电路，使得LNA可以通过控制提供给LNA的数字模式控制信号来配置成两种模式中的可选择的一种。

9. 发明申请

US20090153244A1 LOW NOISE AND LOW INPUT CAPACITANCE DIFFERENTIAL MDS LNA 有权
标题翻译：低噪声和低输入电容差分MDS LNA
公开(公告)号：US20090153244A1
公开(公告)日：2009-06-18
申请号：US11959196
申请日：2007-12-18
申请人： Jose Cabanillas , Prasad S. Gudem , Namsoo Kim , Cristian Marcu , Anup Savla
发明人： Jose Cabanillas , Prasad S. Gudem , Namsoo Kim , Cristian Marcu , Anup Savla
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F1/3205 , H03F1/3211 , H03F2203/45318 , H03F2203/45396
摘要： A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.
摘要翻译：差分低噪声放大器（LNA）涉及两个偏置饱和的主放大晶体管，两个取消晶体管偏置为次阈值。在一个示例中，取消晶体管的栅极以对称和交叉耦合的方式耦合到主晶体管的漏极。主晶体管是源极退化的。因为取消晶体管的栅极没有耦合到LNA的差分输入引线，所以LNA的输入电容减小。由于存在两个阶段，由于在子阈值区域偏置的取消晶体管而导入到LNA输出中的噪声被减小。第一级涉及主晶体管，第二级涉及取消晶体管。通过增加第一级的增益并降低第二级的增益，保持整体LNA增益，同时降低子阈值偏置晶体管对LNA输出有贡献的噪声。

10. 发明授权

US09574591B2 Adjustable vertical pipe support 有权
标题翻译：可调垂直管支撑
公开(公告)号：US09574591B2
公开(公告)日：2017-02-21
申请号：US14952046
申请日：2015-11-25
申请人： Namsoo Kim
发明人： Namsoo Kim
IPC分类号： E04G25/08 , F16B7/14
CPC分类号： F16B7/149
摘要： Disclosed is an adjustable vertical pipe support, in which a second saw-toothed portion is positioned in a wedge of a length adjusting member for adjusting a length of upper and lower pipes, so as to prevent unlocking or slip of the upper pipe and thus improve the safety of the vertical pipe support, even though a first rotation adjustor is rotated by a tensile force or an external force. The adjustable vertical pipe support includes a wedge with a first and second saw-toothed portion on the inner peripheral surface, in which any one of the first saw-toothed portion and the second saw-toothed portion is inclined upwardly so as to suppress downward movement of the upper pipe, and the other is inclined downwardly or is formed in the shape of a ridge so as to suppress upward movement of the upper pipe.
摘要翻译：公开了一种可调节的垂直管支撑件，其中第二锯齿部分位于长度调节构件的楔形件中，用于调节上管和下管的长度，以防止上管的解锁或滑动，从而改善即使第一旋转调节器通过拉力或外力旋转，垂直管支撑件的安全性。可调节的垂直管支撑件包括在内周表面上具有第一和第二锯齿部分的楔块，其中第一锯齿部分和第二锯齿形部分中的任一个向上倾斜，以便抑制向下移动并且另一个向下倾斜或形成为脊的形状，以便抑制上管的向上运动。

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