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1. 发明授权

US09735090B2 Integrated circuit devices having through-silicon vias and methods of manufacturing such devices 有权
公开(公告)号：US09735090B2
公开(公告)日：2017-08-15
申请号：US14873453
申请日：2015-10-02
申请人： Ju-il Choi , Atsushi Fujisaki , Byung-Iyul Park , Ji-soon Park , Joo-hee Jang , Jeong-gi Jin
发明人： Ju-il Choi , Atsushi Fujisaki , Byung-Iyul Park , Ji-soon Park , Joo-hee Jang , Jeong-gi Jin
IPC分类号： H01L23/48 , H01L21/768 , H01L23/00 , H01L23/532
CPC分类号： H01L23/481 , H01L21/76898 , H01L23/3135 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L24/00 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/02372 , H01L2224/0401 , H01L2224/05023 , H01L2224/05025 , H01L2224/05082 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05557 , H01L2224/05564 , H01L2224/05567 , H01L2224/0557 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/06181 , H01L2224/11462 , H01L2224/11472 , H01L2224/11825 , H01L2224/11906 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/13147 , H01L2224/13552 , H01L2224/13566 , H01L2224/1357 , H01L2224/13644 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2924/00014 , H01L2924/01023 , H01L2924/01015 , H01L2924/014 , H01L2924/01074
摘要： An integrated circuit device includes a semiconductor structure, a through-silicon-via (TSV) structure that penetrates through the semiconductor structure and a connection terminal connected to the TSV structure. A metal capping layer includes a flat capping portion that covers the bottom surface of the connection terminal and a wedge-shaped capping portion that is integrally connected to the flat capping portion and that partially covers a side wall of the connection terminal. The metal capping layer may be formed by an electroplating process in which the connection terminal is in contact with a metal strike electroplating solution while a pulse-type current is applied.

2. 发明申请

US20160099201A1 INTEGRATED CIRCUIT DEVICES HAVING THROUGH-SILICON VIAS AND METHODS OF MANUFACTURING SUCH DEVICES 有权
标题翻译：具有穿透硅六角形的集成电路设备及其制造方法
公开(公告)号：US20160099201A1
公开(公告)日：2016-04-07
申请号：US14873453
申请日：2015-10-02
申请人： Ju-il Choi , Atsushi Fujisaki , Byung-lyul Park , Ji-soon Park , Joo-hee Jang , Jeong-gi Jin
发明人： Ju-il Choi , Atsushi Fujisaki , Byung-lyul Park , Ji-soon Park , Joo-hee Jang , Jeong-gi Jin
IPC分类号： H01L23/498 , H01L23/532 , H01L23/48
CPC分类号： H01L23/481 , H01L21/76898 , H01L23/3135 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L24/00 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/02372 , H01L2224/0401 , H01L2224/05023 , H01L2224/05025 , H01L2224/05082 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05557 , H01L2224/05564 , H01L2224/05567 , H01L2224/0557 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/06181 , H01L2224/11462 , H01L2224/11472 , H01L2224/11825 , H01L2224/11906 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/13147 , H01L2224/13552 , H01L2224/13566 , H01L2224/1357 , H01L2224/13644 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2924/00014 , H01L2924/01023 , H01L2924/01015 , H01L2924/014 , H01L2924/01074
摘要： An integrated circuit device includes a semiconductor structure, a through-silicon-via (TSV) structure that penetrates through the semiconductor structure and a connection terminal connected to the TSV structure. A metal capping layer includes a flat capping portion that covers the bottom surface of the connection terminal and a wedge-shaped capping portion that is integrally connected to the flat capping portion and that partially covers a side wall of the connection terminal. The metal capping layer may be formed by an electroplating process in which the connection terminal is in contact with a metal strike electroplating solution while a pulse-type current is applied.
摘要翻译：集成电路器件包括半导体结构，穿透半导体结构的穿透硅通孔（TSV）结构和连接到TSV结构的连接端子。金属覆盖层包括覆盖连接端子的底表面的平坦封盖部分和与扁平封盖部分整体连接并部分覆盖连接端子的侧壁的楔形封盖部分。金属覆盖层可以通过电镀工艺形成，其中连接端子与金属冲击电镀溶液接触，同时施加脉冲型电流。

3. 发明申请

US20160086874A1 SEMICONDUCTOR DEVICES INCLUDING THROUGH-SILICON-VIAS AND METHODS OF MANUFACTURING THE SAME AND SEMICONDUCTOR PACKAGES INCLUDING THE SEMICONDUCTOR DEVICES 审中-公开
标题翻译：包括硅 - 半导体的半导体器件及其制造方法和包括半导体器件的半导体器件
公开(公告)号：US20160086874A1
公开(公告)日：2016-03-24
申请号：US14858572
申请日：2015-09-18
申请人： Ju-Il Choi , Kwang-Jin Moon , Byung-Lyul Park , Jin-Ho An , Atsushi Fujisaki
发明人： Ju-Il Choi , Kwang-Jin Moon , Byung-Lyul Park , Jin-Ho An , Atsushi Fujisaki
IPC分类号： H01L23/48 , H01L23/532 , H01L23/528 , H01L23/00
CPC分类号： H01L23/481 , H01L21/76898 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/0657 , H01L25/18 , H01L2224/03618 , H01L2224/0401 , H01L2224/05018 , H01L2224/05025 , H01L2224/05027 , H01L2224/05155 , H01L2224/05546 , H01L2224/05557 , H01L2224/05559 , H01L2224/05564 , H01L2224/05567 , H01L2224/05572 , H01L2224/05611 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/06181 , H01L2224/13023 , H01L2224/13139 , H01L2224/13147 , H01L2224/16013 , H01L2224/16113 , H01L2224/16145 , H01L2224/16146 , H01L2224/16147 , H01L2224/16148 , H01L2224/16227 , H01L2224/32145 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/15311 , H01L2924/00 , H01L2924/00014 , H01L2924/013 , H01L2924/01047
摘要： A semiconductor device can include a substrate that has a surface. A via structure can extend through the substrate toward the surface of the substrate, where the via structure includes an upper surface. A pad structure can be on the surface of the substrate, where the pad structure can include a lower surface having at least one protrusion that is configured to protrude toward the upper surface of the via structure.
摘要翻译：半导体器件可以包括具有表面的衬底。通孔结构可以延伸穿过衬底朝向衬底的表面，其中通孔结构包括上表面。衬垫结构可以在衬底的表面上，其中衬垫结构可以包括具有至少一个突起的下表面，其被配置为朝向通孔结构的上表面突出。

4. 发明授权

US06351686B1 Semiconductor device manufacturing apparatus and control method thereof 失效
标题翻译：半导体装置的制造装置及其控制方法
公开(公告)号：US06351686B1
公开(公告)日：2002-02-26
申请号：US09610702
申请日：2000-07-05
申请人： Junji Iwasaki , Atsushi Fujisaki , Tomohiro Yamaguchi
发明人： Junji Iwasaki , Atsushi Fujisaki , Tomohiro Yamaguchi
IPC分类号： G06F700
CPC分类号： H01L21/67727 , F02M5/125 , F02M37/12 , H01L21/67276
摘要： A semiconductor device manufacturing apparatus and a control method thereof which can shorten the manufacturing term of semiconductor devices are achieved. The semiconductor device manufacturing apparatus includes a plurality of processing apparatuses for taking out and processing semiconductor wafers successively which constitute a process lot, and including a standby port where a lot to be processed following processing of the process lot is put on standby. The semiconductor device manufacturing apparatus further includes a stocker for storing a lot to be transported to the standby port. According to the control method of the semiconductor device manufacturing apparatus, it is predicted when there is no standby wafer left in the processing apparatus in a prediction step. The predicted time is used to set transfer starting time when transfer of the next-processed lot to the standby port is started in a time setting step. A lot to be processed next is selected in a lot selecting step. The next-processed lot is transported to the processing apparatus at or after the transfer starting time in a transfer step.
摘要翻译：实现了可以缩短半导体器件的制造术语的半导体器件制造装置及其控制方法。半导体器件制造装置包括多个用于连续地取出并处理构成处理批次的半导体晶片的处理装置，并且包括备用端口，待处理批处理之后待处理的批次待机。半导体器件制造装置还包括用于存储待传送到备用端口的批量的储料器。根据半导体器件制造装置的控制方法，预测在预测步骤中在处理装置中没有留下待机晶片的情况。在时间设定步骤中，开始将下一处理批次传送到备用端口时，预测时间设定传送开始时间。在大量选择步骤中选择要处理的大量物品。下一处理批次在传送步骤中的传送开始时刻或之后被传送到处理装置。

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