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1. 发明申请

US20170117888A1 VOLTAGE COMPARISON CIRCUIT 审中-公开
公开(公告)号：US20170117888A1
公开(公告)日：2017-04-27
申请号：US15259492
申请日：2016-09-08
申请人： Kabushiki Kaisha Toshiba
发明人： Hironori Nagasawa
IPC分类号： H03K5/24
CPC分类号： H03K5/2481
摘要： According to one embodiment, the voltage comparison circuit includes: a first MOS transistor having a first gate applied with a first input voltage, a second MOS transistor having a second gate applied with a second input voltage compared with the first input voltage, a first current source connected in common to sources of the first and second MOS transistors, loads connected to drains of the first and the second MOS transistors, a third MOS transistor having a third gate connected to either one of the drains of the first and second MOS transistors, a logic inverter circuit connected to the drain of the third MOS transistor and generating a logic output based on a voltage difference between the first and second input voltages, and an additional circuit for controlling voltage of the node connected to the drain of the third MOS transistor, the second current source, and the first logic inverter circuit.

2. 发明授权

US10084432B1 Semiconductor device 有权
公开(公告)号：US10084432B1
公开(公告)日：2018-09-25
申请号：US15700470
申请日：2017-09-11
申请人： Kabushiki Kaisha Toshiba
发明人： Hironori Nagasawa
IPC分类号： H03H11/26 , H01L27/105 , H01L29/08
摘要： A semiconductor device according to an embodiment includes; an N-channel type first MOS transistor having a first drain connected to an input terminal, a first source connected to an output terminal, a first gate insulation film, and a first gate; a P-channel type second MOS transistor having a second drain connected to the input terminal in parallel with the first drain, a second source connected to the output terminal in parallel with the first source, a second gate insulation film whose area is larger than an area of the first gate insulation film, and a second gate; an inverter connected to a control terminal in parallel with the first gate; and a delay circuit disposed between the inverter and second gate.

3. 发明授权

US09727075B2 Power-supply voltage sensing circuit 有权
公开(公告)号：US09727075B2
公开(公告)日：2017-08-08
申请号：US15051304
申请日：2016-02-23
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Hironori Nagasawa
IPC分类号： H02M3/158 , H02M3/156 , G05F5/00
CPC分类号： G05F5/00
摘要： A power-supply voltage sensing circuit includes a switch circuit having an input connected to a power supply and an output connected to a main circuit, a first circuit that outputs a first signal controlling ON/OFF of the switch circuit in accordance with a power-supply voltage supplied by the power supply, a second circuit that delays the first signal and outputs the delayed first signal as a second signal, a first transistor that outputs a first voltage in accordance with the second signal from the second circuit, a third circuit that outputs a reference voltage when supplied with the power-supply voltage, and a comparison circuit that outputs a third signal that controls whether or not the main circuit is operated in accordance with the first voltage and the reference voltage.

4. 发明授权

US09225229B2 Semiconductor switch circuit 有权
标题翻译：半导体开关电路
公开(公告)号：US09225229B2
公开(公告)日：2015-12-29
申请号：US14194627
申请日：2014-02-28
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Hiroyuki Abe , Hironori Nagasawa
IPC分类号： G05F1/00 , H02M1/08 , H03K17/06
CPC分类号： H02M1/08 , H03K17/063 , H03K2217/0054 , H03K2217/0081
摘要： A semiconductor switch circuit includes a switch between an input node and an output node that connects nodes to each other according to a control signal and a level shifter outputting the control signal at a boosted level that is greater than a power supply voltage level. The semiconductor switch circuit also includes a booster circuit to output a boosted voltage at the boosted level higher than a power supply voltage level. A control circuit is configured to control the level shifter output of the control signal to the switch. A capacitance switching circuit is included to change the capacitance of a connection between the booster circuit and the level shifter. The capacitance switching circuit can vary capacitance according to the voltage level of the booster circuit output.
摘要翻译：半导体开关电路包括根据控制信号将节点彼此连接的输入节点和输出节点之间的开关，以及以大于电源电压电平的升压电平输出控制信号的电平移位器。该半导体开关电路还包括一个升压电路，用于输出升压电平高于电源电压电平的升压电压。控制电路被配置为控制对开关的控制信号的电平移位器输出。包括电容切换电路以改变升压电路和电平转换器之间的连接的电容。电容切换电路可以根据升压电路输出的电压电平来改变电容。

5. 发明申请

US20210083661A1 VARIABLE CAPACITANCE CIRCUIT 有权
公开(公告)号：US20210083661A1
公开(公告)日：2021-03-18
申请号：US16923399
申请日：2020-07-08
申请人： Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
发明人： Hironori Nagasawa , Takayuki Teraguchi
IPC分类号： H03K17/16 , H01L27/06 , H01L27/08
摘要： A variable capacitance circuit has a plurality of series circuits connected in parallel. The plurality of series circuits comprise a plurality of switches having different off-capacitances of powers of two with respect to a reference capacitance, and a plurality of capacitors connected in series to the plurality of switches and having different capacitances of powers of two with respect to a reference capacitance.

6. 发明申请

US20190280592A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20190280592A1
公开(公告)日：2019-09-12
申请号：US16118931
申请日：2018-08-31
申请人： Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
发明人： Hironori Nagasawa
IPC分类号： H02M3/07 , H03K17/687
摘要： According to one embodiment, a charge pump is configured to generate a negative potential at an output node. A first transistor and a first resistor are coupled in series in order between a first node and a second node. A second resistor is coupled between the second node and the output node. A second transistor and a third resistor are coupled in series in order between the first node and a third node. A fourth resistor is coupled between the third node and the output node. A third transistor is coupled between a fourth node and the output node, and coupled to the second node and the third node at a gate.

7. 发明申请

US20220255535A1 HIGH FREQUENCY INTEGRATED CIRCUIT FOR WIRELESS COMMUNICATION 有权
公开(公告)号：US20220255535A1
公开(公告)日：2022-08-11
申请号：US17459822
申请日：2021-08-27
申请人： KABUSHIKI KAISHA TOSHIBA , TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
发明人： Yuki Kamijyo , Hironori Nagasawa
IPC分类号： H03H11/24 , H01P5/12
摘要： According to an embodiment, a high frequency integrated circuit includes a signal splitter, an attenuator, a first conductive element, and first to eighth switches. The signal splitter receives a high frequency signal at an input terminal, splits the high frequency signal to two lines, and outputs the signals split into the two lines from a first output terminal and a second output terminal. The attenuator has multiple amounts of attenuation values. In the first conductive element, a first amount of attenuation is set. The high frequency integrated circuit outputs a plurality of output signals having different gain values from the first high frequency output terminal and the second high frequency output terminal, respectively.

8. 发明授权

US10790781B2 Semiconductor integrated circuit 有权
公开(公告)号：US10790781B2
公开(公告)日：2020-09-29
申请号：US16296600
申请日：2019-03-08
申请人： Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
发明人： Hironori Nagasawa
IPC分类号： H03B5/12 , H03B19/20 , G05F1/10
摘要： According to one embodiment, there is provided a semiconductor integrated circuit including an oscillation circuit, a charge pump circuit, a smoothing circuit, and a negative feedback circuit. The charge pump circuit is arranged between each of a power supply input terminal and the oscillation circuit and a power supply output terminal. The smoothing circuit is arranged between the charge pump circuit and the power supply output terminal. The negative feedback circuit is arranged on a path returning from the smoothing circuit to the oscillation circuit. The smoothing circuit includes a first zero point generation circuit.

9. 发明申请

US20200287545A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20200287545A1
公开(公告)日：2020-09-10
申请号：US16564329
申请日：2019-09-09
申请人： Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
发明人： Hironori Nagasawa
IPC分类号： H03K19/0185 , H03K17/687 , H03K17/693
摘要： According to one embodiment, a semiconductor device includes: a first circuit transmitting a first signal; a second circuit receiving a second signal; a first level shift circuit converting a signal level of the first signal from a value corresponding to a first voltage to a value corresponding to a second voltage different from the first voltage, and transmitting the second signal; and a third circuit receiving the first signal and a control signal, and transmitting a third signal having a fixed signal level to the first level shift circuit when a signal level of the control signal is a first level.

10. 发明申请

US20180278239A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20180278239A1
公开(公告)日：2018-09-27
申请号：US15700470
申请日：2017-09-11
申请人： Kabushiki Kaisha Toshiba
发明人： Hironori Nagasawa
IPC分类号： H03H11/26 , H01L29/08 , H01L27/105
摘要： A semiconductor device according to an embodiment includes; an N-channel type first MOS transistor having a first drain connected to an input terminal, a first source connected to an output terminal, a first gate insulation film, and a first gate; a P-channel type second MOS transistor having a second drain connected to the input terminal in parallel with the first drain, a second source connected to the output terminal in parallel with the first source, a second gate insulation film whose area is larger than an area of the first gate insulation film, and a second gate; an inverter connected to a control terminal in parallel with the first gate; and a delay circuit disposed between the inverter and second gate.

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