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1. 发明申请

US20190199336A1 COMPARATOR HAVING DIFFERENTIAL FDSOI TRANSISTOR PAIR WITH GATE CONNECTED TO BACK-GATE TO REDUCE RTS NOISE 审中-公开
公开(公告)号：US20190199336A1
公开(公告)日：2019-06-27
申请号：US15850702
申请日：2017-12-21
申请人： GLOBALFOUNDRIES INC.
发明人： Vijay Kanagala , Don R. Blackwell
IPC分类号： H03K5/24 , H01L27/12 , H03K17/16
CPC分类号： H03K5/2481 , H01L27/1203 , H03K17/161
摘要： Embodiments of the present disclosure provide a circuit structure including: a first transistor having a gate, a drain connected to a first node, a FDSOI channel region positioned between a source and the drain, a back-gate, separated from the FDSOI channel with a buried insulator layer positioned beneath the FDSOI channel, wherein the back-gate of the first transistor and a first input signal voltage are connected to the gate of the first transistor, and the source is connected to a first shared node; and a second transistor having a gate, a source connected to the first shared node, a drain connected to a second node, a FDSOI channel positioned between the source and drain, and a buried insulator positioned beneath the FDSOI channel and a back-gate, wherein the back-gate of the second transistor and a second input signal voltage are connected to the gate of the second transistor.

2. 发明申请

US20180270437A1 COMPARATOR CIRCUIT, SOLID-STATE IMAGING APPARATUS, AND ELECTRONIC DEVICE 审中-公开
公开(公告)号：US20180270437A1
公开(公告)日：2018-09-20
申请号：US15981390
申请日：2018-05-16
申请人： SONY CORPORATION
发明人： Koji OGAWA , Yusuke OIKE
IPC分类号： H04N5/378 , H04N5/374 , H01L27/146 , H03K5/24
CPC分类号： H04N5/378 , H01L27/14643 , H03K5/2472 , H03K5/2481 , H03M1/123 , H03M1/1295 , H03M1/56 , H04N5/374
摘要： The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.

3. 发明授权

US10061340B1 Bandgap reference voltage generator 有权
公开(公告)号：US10061340B1
公开(公告)日：2018-08-28
申请号：US15879355
申请日：2018-01-24
申请人： Invecas, Inc.
发明人： Venkata N. S. N. Rao , Majid Jalali Far
IPC分类号： G05F3/26 , H03F3/04 , H03K5/24 , G05F3/30
CPC分类号： G05F3/26 , G05F3/267 , G05F3/30 , H03F1/30 , H03F3/04 , H03F3/45183 , H03F2200/447 , H03K5/24 , H03K5/2481
摘要： A bandgap reference voltage generator, comprises: a bias circuit configured to generate a start signal; a startup circuit having at least two serially-connected transistors configured to receive the start signal; a proportional-to-absolute-temperature (“PTAT”) generation circuit having a first current mirror, an amplifier, a resistor, and transistors; and a complementary-to-absolute-temperature (“CTAT”) generation circuit having a second current mirror, a passive network of resistors, and at least one transistor. The at least two serially-connected transistors are connected across a first input of the amplifier and a second input of the amplifier. An output of the amplifier is coupled to the first current mirror and the second current mirror. The passive network of resistors is coupled across outputs of the second current mirror. The CTAT generation circuit has an output node for outputting a bandgap reference voltage.

4. 发明授权

US10038447B2 Method of forming a semiconductor device and structure therefor 有权
公开(公告)号：US10038447B2
公开(公告)日：2018-07-31
申请号：US15232248
申请日：2016-08-09
申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
发明人： Donald Claude Thelen, Jr.
IPC分类号： H03K5/00 , H03K19/20 , H03K5/24
CPC分类号： H03K19/20 , H03K5/2481
摘要： In one embodiment, a semiconductor device may include forming a first inverter and a second inverter to selectively receive separate inputs of a differential input signal and directly connecting each of the first and second inverters to receive power directly from a voltage input and a voltage return. The first inverter may be configured to include a first control switch that is configured to selectively couple together an upper transistor and a lower transistor of the first inverter. The second inverter may be configured to include a second control switch that is configured to selectively couple together an upper transistor and a lower transistor of the second inverter.

5. 发明申请

US20180198440A1 Voltage Comparator Circuit Including a Plurality of Voltage Controlled Delay Lines 审中-公开
公开(公告)号：US20180198440A1
公开(公告)日：2018-07-12
申请号：US15403631
申请日：2017-01-11
申请人： STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
发明人： Caixin Zhuang
IPC分类号： H03K5/24 , H03K3/037
CPC分类号： H03K5/2481 , H03K3/037 , H03K5/249 , H03K2005/00019 , H03K2005/00045
摘要： An embodiment circuit includes a first voltage-controlled delay line (VCDL), a second VCDL, and a first flip-flop. The first VCDL includes a first input terminal configured to receive a first input voltage, and a second input terminal configured to receive a clock signal. The second VCDL includes a first input terminal configured to receive a second input voltage, and a second input terminal configured to receive the clock signal. The first flip-flop includes a reset pin coupled to an output terminal of the first VCDL, and a clock pin coupled to an output terminal of the second VCDL.

6. 发明授权

US09985622B2 Comparator, solid-state imaging device, electronic apparatus, and driving method 有权
公开(公告)号：US09985622B2
公开(公告)日：2018-05-29
申请号：US14208734
申请日：2014-03-13
申请人： Sony Corporation
发明人： Hideki Tanaka , Shizunori Matsumoto , Haruhisa Naganokawa , Yuuichi Kaji
IPC分类号： H03K5/24 , H04N5/378
CPC分类号： H03K5/2481 , H04N5/378
摘要： A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.

7. 发明申请

US20180131383A1 INBUILT THRESHOLD COMPARATOR 审中-公开
公开(公告)号：US20180131383A1
公开(公告)日：2018-05-10
申请号：US15864090
申请日：2018-01-08
申请人： Texas Instruments Incorporated
发明人： Rishi Soundararajan
IPC分类号： H03M1/46 , H03K5/24 , H03M1/06
CPC分类号： H03M1/46 , H03K5/2481 , H03M1/0607 , H03M1/36 , H03M1/44 , H03M1/48
摘要： A comparator includes a first input stage coupled to a first signal input and a first reference input, wherein the first input stage is coupled between a first node and a second node. A second input stage is coupled to a second signal input and a second reference input, wherein the second input stage is coupled between a third node and the second node. An output stage generates at least one output signal in response to the first and second input signals. First switching circuitry is coupled between the first node and the output stage. The first switching circuitry is for coupling the first node to a fourth node in response to a reset signal. Second switching circuitry is coupled between the third node and the output stage. The second switching circuitry is for coupling the third node to a fifth node in response to the reset signal.

8. 发明申请

US20180131358A1 Methods, Circuits, Devices and Systems for Comparing Signals 审中-公开
公开(公告)号：US20180131358A1
公开(公告)日：2018-05-10
申请号：US15630047
申请日：2017-06-22
申请人： CYPRESS SEMICONDUCTOR CORPORATION
发明人： Alexander Kushnarenko , Yoram Betser
IPC分类号： H03K5/24 , G11C7/06 , G11C7/08
CPC分类号： H03K5/2472 , G11C7/065 , G11C7/08 , H03K5/24 , H03K5/2481
摘要： Disclosed is a method of comparing two or more signals which may include: for each of the two or more signals, charging to a fixed voltage a compensation capacitor associated with a sense path of the signal, discharging each of the charged capacitors to a threshold voltage of a transistor in its respective sense path and integrating a discharge current from each capacitor with the signal sensed on the respective sense path.

9. 发明授权

US09967505B1 Comparators for double ramp analog to digital converter 有权
公开(公告)号：US09967505B1
公开(公告)日：2018-05-08
申请号：US15486815
申请日：2017-04-13
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Hiroaki Ebihara
IPC分类号： H04N5/378 , H03K5/24 , H03M1/56 , H04N5/374
CPC分类号： H04N5/378 , H03K5/2472 , H03K5/2481 , H03M1/56 , H04N5/374
摘要： Example comparators as disclosed herein may include a first comparator comprising a first plurality of device areas, wherein the first plurality of device areas at least includes a first comparator input device area, a first comparator cascode device area, and a first comparator current mirror area, and a second comparator comprising a second plurality of device areas, wherein the second plurality of device areas at least includes a second comparator input device area, a second comparator cascode device area, and a second comparator current mirror area, where the second comparator input area is disposed between the first comparator input area and the first comparator cascode device area, the first comparator cascode device area is disposed between the second comparator input area and the second comparator cascode device area, the first comparator current mirror area is disposed between the first comparator cascode device area and the second comparator current mirror area, the second comparator cascode device area is disposed between the first comparator cascode device area and the second comparator current mirror area, and the second comparator current mirror area is disposed between the first comparator current mirror area and a second comparator second stage input area.

10. 发明授权

US09912235B2 Boost converter 有权
公开(公告)号：US09912235B2
公开(公告)日：2018-03-06
申请号：US15257312
申请日：2016-09-06
申请人： Kabushiki Kaisha Toshiba
发明人： Taichi Ogawa , Takeshi Ueno , Tetsuro Itakura , Osamu Watanabe , Takayuki Miyazaki
IPC分类号： H02M3/156 , H02M3/07 , H02M1/36 , H02M1/00 , H03K3/0233 , H03K5/24
CPC分类号： H02M3/156 , H02M1/36 , H02M3/07 , H02M2001/0006 , H02M2001/0025 , H03K3/02337 , H03K5/2481
摘要： A boost converter includes an input, an output, a startup circuit, a first switch, a comparator circuit, a switching circuit, a control circuit, a converter circuit, and a switch control circuit. The startup circuit boosts an input voltage up to a first output voltage. The comparator circuit outputs a first signal corresponding to the difference between the output voltage and a first reference voltage. The switching circuit outputs a second voltage based on the first signal. The control circuit outputs a second signal corresponding to the difference between the output voltage and a second reference voltage. The converter circuit boosts the input voltage based on the second signal, and outputs the output voltage. The switch control circuit generates a third signal based on the second signal, and outputs the third signal to the first switch.

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