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1. 发明授权

US09111964B2 Nonvolatile semiconductor memory device and method for manufacturing same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US09111964B2
公开(公告)日：2015-08-18
申请号：US14019798
申请日：2013-09-06
申请人： Kabushiki Kaisha Toshiba
发明人： Mitsuru Sato , Soichiro Kitazaki , Ryu Kato , Masaru Kito , Ryota Katsumata
IPC分类号： H01L29/792 , H01L29/66 , H01L27/115
CPC分类号： H01L29/66833 , H01L27/11582 , H01L29/7926
摘要： According one embodiment, a nonvolatile semiconductor memory device, includes: a stacked body, and each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the a stacked body; a first interlayer insulating film on the stacked body; a gate electrode on the first interlayer insulating film; a second interlayer insulating film on the gate electrode; a semiconductor layer extended from an upper end of the second interlayer insulating film to a lower end of the stacked body; a first insulating film between the semiconductor layer and each of the plurality of electrode layers; and a second insulating film between the semiconductor layer and the gate electrode, a thickness of the semiconductor layer provided above an upper end of the gate electrode being thicker than a thickness of the semiconductor layer provided below the upper end of the gate electrode.
摘要翻译：根据一个实施例，一种非易失性半导体存储器件包括：堆叠体，多个电极层中的每一个和多个绝缘层中的每一个交替堆叠在堆叠体中; 层叠体上的第一层间绝缘膜; 第一层间绝缘膜上的栅电极; 栅电极上的第二层间绝缘膜; 半导体层从第二层间绝缘膜的上端延伸到层叠体的下端; 在所述半导体层和所述多个电极层中的每一个之间的第一绝缘膜; 以及在半导体层和栅电极之间的第二绝缘膜，设置在栅电极的上端上方的半导体层的厚度比设置在栅电极的上端下方的半导体层的厚度厚。

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