专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09287499B2 Integrated circuit device 有权
标题翻译：集成电路器件
公开(公告)号：US09287499B2
公开(公告)日：2016-03-15
申请号：US14464084
申请日：2014-08-20
申请人： Kabushiki Kaisha Toshiba
发明人： Hikari Tajima , Masaki Kondo , Tsukasa Nakai , Takashi Izumida , Nobuaki Yasutake
IPC分类号： H01L23/62 , H01L45/00
CPC分类号： H01L27/2454 , H01L27/249 , H01L45/04 , H01L45/1683
摘要： An integrated circuit device according to an embodiment includes an electrode extending in a first direction, two semiconductor members spaced from each other in the first direction and extending in a second direction crossing the first direction, an insulating film placed between each of the two semiconductor members and the electrode and made of a first insulating material, and a first dielectric member placed between the two semiconductor members and made of a second insulating material having a higher permittivity than the first insulating material.
摘要翻译：根据实施例的集成电路器件包括沿第一方向延伸的电极，在第一方向上彼此间隔开并沿与第一方向交叉的第二方向延伸的两个半导体部件，设置在两个半导体部件中的每一个之间的绝缘膜以及由第一绝缘材料制成的电极，以及放置在两个半导体部件之间并由具有比第一绝缘材料更高的介电常数的第二绝缘材料制成的第一电介质部件。

2. 发明授权

US09019777B2 Nonvolatile semiconductor memory device and operating method of the same 有权
标题翻译：非易失性半导体存储器件及其操作方法相同
公开(公告)号：US09019777B2
公开(公告)日：2015-04-28
申请号：US13787633
申请日：2013-03-06
申请人： Kabushiki Kaisha Toshiba
发明人： Tsukasa Nakai , Jyunichi Ozeki , Nobutoshi Aoki
IPC分类号： G11C11/00 , G11C11/02 , G11C5/06 , G11C13/00 , G11C11/16 , G11C14/00 , G11C7/10 , G11C11/56
CPC分类号： G11C11/16 , G11C7/1006 , G11C11/005 , G11C11/02 , G11C11/161 , G11C11/1659 , G11C11/1675 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C13/0097 , G11C14/0045 , G11C2213/72 , H01L27/224 , H01L27/228 , H01L27/2409 , H01L27/2436 , H01L43/08 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： According to one embodiment, a nonvolatile semiconductor memory device comprises a semiconductor substrate, and a memory cell which is arranged on the semiconductor substrate and comprises a variable resistance element. The variable resistance element comprises a laminated structure including a phase-change element which has at least two different crystalline resistance states by varying a crystalline state, and a magnetoresistive element which has at least two different magnetization resistance states by varying a magnetization state, and applies or does not apply a magnetic field to the phase-change element in accordance with the magnetization state.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括半导体衬底和布置在半导体衬底上并包括可变电阻元件的存储单元。可变电阻元件包括层压结构，其包括通过改变结晶态具有至少两种不同的晶体电阻状态的相变元件和通过改变磁化状态具有至少两种不同的耐磁化状态的磁阻元件，并且应用或者不根据磁化状态对相变元件施加磁场。

3. 发明授权

US08964459B2 Magnetoresistive element and writing method of magnetic memory 有权
标题翻译：磁记忆体的磁阻元件和写入方法
公开(公告)号：US08964459B2
公开(公告)日：2015-02-24
申请号：US13781739
申请日：2013-02-28
申请人： Kabushiki Kaisha Toshiba
发明人： Tsukasa Nakai , Takashi Izumida , Jyunichi Ozeki , Masaki Kondo , Toshiyuki Enda , Nobutoshi Aoki
IPC分类号： G11C19/08 , G11C11/16
CPC分类号： G11C11/161 , G11C11/1675
摘要： According to one embodiment, a magnetoresistive element includes a first magnetic layer, a second magnetic layer, a non-magnetic layer formed between the first magnetic layer and the second magnetic layer, a charge storage layer having a first surface and a second surface different from the first surface, the first surface facing the second magnetic layer, a first insulating layer formed between the second magnetic layer and the first surface of the charge storage layer, and a second insulating layer formed on the second surface of the charge storage layer.
摘要翻译：根据一个实施例，磁阻元件包括第一磁性层，第二磁性层，形成在第一磁性层和第二磁性层之间的非磁性层，具有第一表面和第二表面的电荷存储层第一表面，面对第二磁性层的第一表面，形成在第二磁性层和电荷存储层的第一表面之间的第一绝缘层，以及形成在电荷存储层的第二表面上的第二绝缘层。

4. 发明申请

US20140063924A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD OF THE SAME 有权
标题翻译：非易失性半导体存储器件及其操作方法
公开(公告)号：US20140063924A1
公开(公告)日：2014-03-06
申请号：US13787633
申请日：2013-03-06
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Tsukasa Nakai , Jyunichi Ozeki , Nobutoshi Aoki
IPC分类号： G11C11/16 , G11C13/00
CPC分类号： G11C11/16 , G11C7/1006 , G11C11/005 , G11C11/02 , G11C11/161 , G11C11/1659 , G11C11/1675 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C13/0097 , G11C14/0045 , G11C2213/72 , H01L27/224 , H01L27/228 , H01L27/2409 , H01L27/2436 , H01L43/08 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： According to one embodiment, a nonvolatile semiconductor memory device comprises a semiconductor substrate, and a memory cell which is arranged on the semiconductor substrate and comprises a variable resistance element. The variable resistance element comprises a laminated structure including a phase-change element which has at least two different crystalline resistance states by varying a crystalline state, and a magnetoresistive element which has at least two different magnetization resistance states by varying a magnetization state, and applies or does not apply a magnetic field to the phase-change element in accordance with the magnetization state.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括半导体衬底和布置在半导体衬底上并包括可变电阻元件的存储单元。可变电阻元件包括层压结构，其包括通过改变结晶态具有至少两种不同的晶体电阻状态的相变元件和通过改变磁化状态具有至少两种不同的耐磁化状态的磁阻元件，并且应用或者不根据磁化状态对相变元件施加磁场。

5. 发明授权

US09570514B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09570514B2
公开(公告)日：2017-02-14
申请号：US14483632
申请日：2014-09-11
申请人： Kabushiki Kaisha Toshiba
发明人： Hikari Tajima , Masaki Kondo , Tsukasa Nakai , Takashi Izumida , Nobuaki Yasutake
IPC分类号： H01L47/00 , H01L27/24 , H01L29/78 , H01L45/00 , H01L27/22
CPC分类号： H01L27/2454 , H01L27/228 , H01L27/249 , H01L29/7827 , H01L45/04 , H01L45/1226 , H01L45/145 , H01L45/146 , H01L45/148 , H01L45/149
摘要： According to an embodiment, a semiconductor device includes two electrodes extending in a first direction, a semiconductor layer provided between the two electrodes, an insulating film disposed between the two electrodes. The two electrodes are arranged in a second direction intersecting the first direction. The semiconductor layer extends in a third direction orthogonal to the first direction and the second direction. The insulating film covers a side surface of the semiconductor layer opposite to one of the two electrodes. The semiconductor layer has a shape in a cross section perpendicular to the third direction such that a width in the first direction at a center of the cross section is narrower than a width, in the first direction, of the side surface.
摘要翻译：根据实施例，半导体器件包括沿第一方向延伸的两个电极，设置在两个电极之间的半导体层，设置在两个电极之间的绝缘膜。两个电极沿与第一方向交叉的第二方向布置。半导体层在与第一方向和第二方向正交的第三方向上延伸。绝缘膜覆盖与两个电极之一相对的半导体层的侧表面。半导体层具有与第三方向垂直的截面形状，使得在横截面的中心处的第一方向上的宽度比侧表面的第一方向上的宽度窄。

6. 发明申请

US20160377651A1 MEASURING METHOD OF SCANNING PROBE MICROSCOPY 审中-公开
标题翻译：扫描探针显微镜的测量方法
公开(公告)号：US20160377651A1
公开(公告)日：2016-12-29
申请号：US15067628
申请日：2016-03-11
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Jun HIROTA , Kazunori Harada , Tsukasa Nakai
IPC分类号： G01Q10/00
摘要： A measuring method of a scanning probe microscopy moves the probe from the first measuring point to the second measuring point while the probe has contact with the object to be measured and a pressing force weaker than the first pressing force is applied between the probe and the object to be measured after the measurement at the first measuring point has ended, applies the first pressing force between the probe and the object to be measured until the tip end position of the probe reaches the first distance in the depth direction from the upper surface of the object to be measured, and measures the physical property information of the object to be measured after the tip end position of the probe has reached the first distance in the depth direction from the upper surface of the object to be measured at the second measuring point.
摘要翻译：扫描探针显微镜的测量方法将探头从第一测量点移动到第二测量点，同时探头与被测量物体接触，并且在探头和物体之间施加比第一按压力弱的按压力在第一测量点的测量结束之后测量，在探针和被测量对象之间施加第一按压力，直到探头的尖端位置从深度方向的第一距离离开测量对象，并且在探头的末端位置从第二测量点的被测量物体的上表面到达深度方向的第一距离之后，测量被测量物体的物理属性信息。

7. 发明授权

US09379164B2 Integrated circuit device 有权
标题翻译：集成电路器件
公开(公告)号：US09379164B2
公开(公告)日：2016-06-28
申请号：US14631176
申请日：2015-02-25
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Tsukasa Nakai , Masaki Kondo , Hikari Tajima , Hiroki Tokuhira , Takashi Izumida , Takashi Kurusu , Nobutoshi Aoki , Takahisa Kanemura , Tadayoshi Uechi
IPC分类号： H01L27/24 , H01L45/00 , G11C11/16 , G11C13/00 , H01L23/528 , H01L27/22 , H01L43/02 , H01L43/08 , G11C7/12 , G11C8/14
CPC分类号： H01L27/2481 , G11C7/12 , G11C8/14 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0004 , G11C13/0007 , G11C13/0026 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/005 , G11C2013/009 , G11C2213/71 , G11C2213/78 , G11C2213/79 , H01L23/528 , H01L27/228 , H01L27/2436 , H01L27/2454 , H01L27/249 , H01L43/02 , H01L43/08 , H01L45/04 , H01L45/06 , H01L45/1226 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit device according to an embodiment includes a semiconductor substrate, a first semiconductor member and a second semiconductor member provided on the semiconductor substrate, a first electrode disposed between the first semiconductor member and the second semiconductor member, and a second electrode disposed between the semiconductor substrate and the first electrode. The first semiconductor member and the second semiconductor member extend in a first direction perpendicular to an upper surface of the semiconductor substrate. The first semiconductor member and the second semiconductor member are separated in a second direction orthogonal to the first direction. The first electrode extends in a third direction intersecting both the first direction and the second direction. The second electrode extends in the third direction.
摘要翻译：根据实施例的集成电路器件包括半导体衬底，设置在半导体衬底上的第一半导体构件和第二半导体构件，设置在第一半导体构件和第二半导体构件之间的第一电极和设置在第一半导体构件之间的第二电极半导体衬底和第一电极。第一半导体部件和第二半导体部件在与半导体基板的上表面垂直的第一方向上延伸。第一半导体部件和第二半导体部件在与第一方向正交的第二方向上分离。第一电极沿与第一方向和第二方向相交的第三方向延伸。第二电极沿第三方向延伸。

8. 发明授权

US09142771B2 Superlattice phase change memory device 有权
标题翻译：超晶格相变存储器件
公开(公告)号：US09142771B2
公开(公告)日：2015-09-22
申请号：US14017050
申请日：2013-09-03
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Aoi Hidaka , Tsukasa Nakai
IPC分类号： H01L45/00
CPC分类号： H01L45/144 , H01L45/065 , H01L45/08 , H01L45/1233 , H01L45/1675
摘要： According to one embodiment, a memory device includes a stacked film stacked in a superlattice structure. The stacked film includes a first layer, a second layer, and a third layer different in composition. The first layer is provided between the second layer and the third layer. The second layer includes a first atom reversibly moved by application of energy. The third layer includes a second atom reversibly moved by application of energy. The second atom is different from the first atom.
摘要翻译：根据一个实施例，存储器件包括以超晶格结构堆叠的堆叠膜。堆叠膜包括第一层，第二层和不同组成的第三层。第一层设置在第二层和第三层之间。第二层包括通过施加能量可逆地移动的第一原子。第三层包括通过施加能量可逆地移动的第二原子。第二个原子与第一个原子不同。

9. 发明授权

US09136468B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US09136468B2
公开(公告)日：2015-09-15
申请号：US13959493
申请日：2013-08-05
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Tsukasa Nakai , Masaki Kondo , Hiroyoshi Tanimoto , Nobutoshi Aoki
IPC分类号： G11C13/00 , H01L45/00 , H01L27/24
CPC分类号： H01L45/06 , G11C13/0004 , G11C13/003 , G11C2213/71 , G11C2213/72 , G11C2213/73 , G11C2213/74 , G11C2213/79 , H01L27/2409 , H01L27/2481 , H01L45/12 , H01L45/126 , H01L45/144
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell which stores data with two or more levels. The memory cell includes a structure includes a first electrode layer, a first semiconductor layer, a phase change film, an electrical insulating layer, a second semiconductor layer, and a second electrode layer arranged in order thereof, and the first semiconductor layer and the second semiconductor layer have carrier polarities different from each other.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括存储具有两个或更多个电平的数据的存储器单元。存储单元包括：第一电极层，第一半导体层，相变膜，电绝缘层，第二半导体层和依次布置的第二电极层的结构，第一半导体层和第二半导体层半导体层具有彼此不同的载流子极性。

10. 发明授权

US09030881B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US09030881B2
公开(公告)日：2015-05-12
申请号：US13962898
申请日：2013-08-08
申请人： Kabushiki Kaisha Toshiba
发明人： Hiroki Tokuhira , Tsukasa Nakai , Hiroyoshi Tanimoto , Masaki Kondo , Toshiyuki Enda , Nobutoshi Aoki
IPC分类号： G11C16/04
CPC分类号： G11C16/0466 , G11C11/22 , G11C16/0483 , H01L27/11524 , H01L29/66825
摘要： According to one embodiment, a nonvolatile semiconductor memory device comprises memory cells each which stores data with two or more levels. Each of the memory cells includes a semiconductor layer, a first insulating layer on the semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer, and the second insulating layer includes a ferroelectric layer.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括各自存储具有两个或更多个电平的数据的存储器单元。每个存储单元包括半导体层，半导体层上的第一绝缘层，第一绝缘层上的电荷存储层，电荷存储层上的第二绝缘层和第二绝缘层上的控制栅电极，并且第二绝缘层包括铁电层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式