会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • APPLYING ROUTER QUALITY OF SERVICE ON A CABLE MODEM INTERFACE ON A PER-SERVICE-FLOW BASIS
    • 在服务流程基础上在电缆调制解调器接口上应用路由器质量
    • US20110194411A1
    • 2011-08-11
    • US13087174
    • 2011-04-14
    • Kenneth J. Croft, JR.Sriram HaridasJohn B. Duffie, III
    • Kenneth J. Croft, JR.Sriram HaridasJohn B. Duffie, III
    • H04L12/26
    • H04L47/10H04L12/2801H04L43/0894H04L47/12H04L47/2441H04L49/506
    • In one embodiment, a router that accesses a cable network through a cable modem receives, from the cable modem, a plurality of service-flow classifications utilized by the cable modem to describe service flows on the cable network. Based on the received service-flow classifications from the cable modem, the router determines traffic destined for the cable network that corresponds to each service-flow on the cable network. The router receives, from the cable modem, an indication of network backpressure for a particular service-flow on the cable network. The indication of network backpressure is received when a threshold of network backpressure has been surpassed for the particular service-flow on the cable network. The router controls particular traffic that corresponds to the particular service-flow on the cable network based on the indication of network backpressure for the particular service-flow on the cable network.
    • 在一个实施例中,通过有线调制解调器访问有线网络的路由器从电缆调制解调器接收电缆调制解调器用来描述有线网络上的业务流的多个业务流分类。 基于从电缆调制解调器接收到的服务流分类,路由器确定与电缆网络上每个服务流对应的有线网络的流量。 路由器从电缆调制解调器接收电缆网络上特定服务流的网络背压指示。 当电缆网络上的特定服务流量已经超过了网络背压的阈值时,接收到网络背压的指示。 路由器基于有线网络上的特定服务流的网络背压的指示来控制对应于有线网络上的特定服务流的特定流量。
    • 5. 发明申请
    • Method and apparatus for arbitrarily initializing a portion of memory
    • 任意初始化一部分存储器的方法和装置
    • US20060136682A1
    • 2006-06-22
    • US11018368
    • 2004-12-21
    • Sriram HaridasMartin HughesWilliam LeeJohn Mitten
    • Sriram HaridasMartin HughesWilliam LeeJohn Mitten
    • G06F13/00
    • G11C7/20
    • Techniques for initializing an arbitrary portion of memory with an arbitrary pattern includes using a memory controller for performing sequenced read and write operations. The memory controller receives address data, length data and pattern data on a data bus connected to a processor. The address data indicates a location in memory. The length data indicates an amount of memory to be initialized. The pattern data indicates a particular series of bits that is much shorter than the amount of memory indicated by the length data. The memory controller performs multiple write operations on memory beginning at a first location based on the address data and ending at a second location based on the length data. Each write operation writes the pattern data to a current location in memory, thereby initializing the arbitrary portion of memory with an arbitrary pattern based on the pattern data.
    • 用于以任意模式初始化任意部分存储器的技术包括使用存储器控制器来执行顺序读取和写入操作。 存储器控制器在连接到处理器的数据总线上接收地址数据,长度数据和模式数据。 地址数据表示存储器中的位置。 长度数据表示要初始化的内存量。 模式数据指示比由长度数据指示的存储器的量短得多的特定的比特序列。 存储器控制器基于地址数据在第一位置开始对存储器执行多个写入操作,并且基于长度数据在第二位置结束。 每个写入操作将模式数据写入存储器中的当前位置,从而基于模式数据以任意模式初始化存储器的任意部分。
    • 6. 发明申请
    • NETWORK PROTOCOL HEADER ALIGNMENT
    • 网络协议头对齐
    • US20110064081A1
    • 2011-03-17
    • US12947535
    • 2010-11-16
    • William LeeMichael WrightJoydeep ChowdhurySriram HaridasMartin Hughes
    • William LeeMichael WrightJoydeep ChowdhurySriram HaridasMartin Hughes
    • H04L12/56
    • H04L45/60H04L45/00H04L49/602
    • Techniques for routing a payload of a first network protocol, which includes header information for a second network protocol, include communicating a packet. In a circuit block, a first type for the first network protocol and a second type for the second network protocol are determined. The circuit block stores a classification that indicates a unique combination of the first type and the second type. A general purpose processor routes the packet based on the classification. Processor clock cycles are saved that would be consumed in determining the types. Furthermore, based on the classification, the processor can store an offset value for aligning the header relative to a cache line. The circuit block can store the packet shifted by the offset value. The processor can then retrieve from memory a single cache line to receive the header, thereby saving excess loading and ejecting of cache.
    • 用于路由包括用于第二网络协议的报头信息的第一网络协议的有效载荷的技术包括传送分组。 在电路块中,确定用于第一网络协议的第一类型和用于第二网络协议的第二类型。 电路块存储指示第一类型和第二类型的唯一组合的分类。 通用处理器根据分类路由数据包。 处理器时钟周期将被保存,用于确定类型。 此外,基于分类,处理器可以存储用于使标题相对于高速缓存行对准的偏移值。 电路块可以存储偏移值移位的数据包。 处理器然后可以从存储器检索单个高速缓存线以接收标题,从而节省高速缓存的多余的加载和弹出。
    • 7. 发明授权
    • Method and apparatus for arbitrarily initializing a portion of memory
    • 任意初始化一部分存储器的方法和装置
    • US07464243B2
    • 2008-12-09
    • US11018368
    • 2004-12-21
    • Sriram HaridasMartin HughesWilliam LeeJohn Mitten
    • Sriram HaridasMartin HughesWilliam LeeJohn Mitten
    • G06F12/00
    • G11C7/20
    • Techniques for initializing an arbitrary portion of memory with an arbitrary pattern includes using a memory controller for performing sequenced read and write operations. The memory controller receives address data, length data and pattern data on a data bus connected to a processor. The address data indicates a location in memory. The length data indicates an amount of memory to be initialized. The pattern data indicates a particular series of bits that is much shorter than the amount of memory indicated by the length data. The memory controller performs multiple write operations on memory beginning at a first location based on the address data and ending at a second location based on the length data. Each write operation writes the pattern data to a current location in memory, thereby initializing the arbitrary portion of memory with an arbitrary pattern based on the pattern data.
    • 用于以任意模式初始化任意部分存储器的技术包括使用存储器控制器来执行顺序读取和写入操作。 存储器控制器在连接到处理器的数据总线上接收地址数据,长度数据和模式数据。 地址数据表示存储器中的位置。 长度数据表示要初始化的内存量。 模式数据指示比由长度数据指示的存储器的量短得多的特定的比特序列。 存储器控制器基于地址数据在第一位置开始对存储器执行多个写入操作,并且基于长度数据在第二位置结束。 每个写入操作将模式数据写入存储器中的当前位置,从而基于模式数据以任意模式初始化存储器的任意部分。
    • 8. 发明授权
    • Method and system for a voice multicast hardware accelerator
    • 语音组播硬件加速器的方法和系统
    • US07284050B1
    • 2007-10-16
    • US09818062
    • 2001-03-26
    • Sriram HaridasLouis Couture
    • Sriram HaridasLouis Couture
    • G06F15/173H04M11/00H04H1/00
    • H04L12/18H04L65/4076H04L65/605H04L69/12
    • A method and system for a voice multicast hardware accelerator are disclosed in which a network device or system includes a host system coupled to a memory to store data and a line card to interface with a plurality of user devices. The host system is to receive a network packet including voice data, to store the voice data in the memory, and to send a voice packet related to the voice data to the line card without duplication. The voice packet includes descriptor fields for multicasting the voice data. The line card is to multicast selectively the voice data stored in the memory to the plurality of user devices based on the descriptor fields in the voice packet. A multicast hardware accelerator can be used to multicast selectively the voice data.
    • 公开了一种用于语音组播硬件加速器的方法和系统,其中网络设备或系统包括耦合到存储器以存储数据的主机系统和与多个用户设备接口的线路卡。 主机系统是接收包括语音数据的网络分组,以将语音数据存储在存储器中,并将与语音数据相关的语音分组发送到线卡而不会重复。 语音分组包括用于组播语音数据的描述符字段。 线路卡是基于语音分组中的描述符字段来选择性地将存储在存储器中的语音数据多播到多个用户设备。 组播硬件加速器可用于选择性地组播语音数据。
    • 9. 发明授权
    • Network protocol header alignment
    • 网络协议头对齐
    • US08599855B2
    • 2013-12-03
    • US12947535
    • 2010-11-16
    • William LeeMichael WrightJoydeep ChowdhurySriram HaridasMartin Hughes
    • William LeeMichael WrightJoydeep ChowdhurySriram HaridasMartin Hughes
    • H04L12/28
    • H04L45/60H04L45/00H04L49/602
    • Techniques for routing a payload of a first network protocol, which includes header information for a second network protocol, include communicating a packet. In a circuit block, a first type for the first network protocol and a second type for the second network protocol are determined. The circuit block stores a classification that indicates a unique combination of the first type and the second type. A general purpose processor routes the packet based on the classification. Processor clock cycles are saved that would be consumed in determining the types. Furthermore, based on the classification, the processor can store an offset value for aligning the header relative to a cache line. The circuit block can store the packet shifted by the offset value. The processor can then retrieve from memory a single cache line to receive the header, thereby saving excess loading and ejecting of cache.
    • 用于路由包括用于第二网络协议的报头信息的第一网络协议的有效载荷的技术包括传送分组。 在电路块中,确定用于第一网络协议的第一类型和用于第二网络协议的第二类型。 电路块存储指示第一类型和第二类型的唯一组合的分类。 通用处理器根据分类路由数据包。 处理器时钟周期将被保存,用于确定类型。 此外,基于分类,处理器可以存储用于使标题相对于高速缓存行对准的偏移值。 电路块可以存储偏移值移位的数据包。 处理器然后可以从存储器检索单个高速缓存线以接收标题,从而节省高速缓存的多余的加载和弹出。