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    • 1. 发明授权
    • System and method for crest factor reduction
    • 波峰因数降低的系统和方法
    • US07738573B2
    • 2010-06-15
    • US11246027
    • 2005-10-07
    • Khiem V. CaiSamuel Davis Kent, IIIDon C. Devendorf
    • Khiem V. CaiSamuel Davis Kent, IIIDon C. Devendorf
    • H04K1/10
    • H04L27/2624
    • A crest reduction system and method. The inventive system includes a first circuit for suppressing peak amplitudes of an input signal and providing a peak amplitude suppressed signal in response thereto and a second circuit coupled to the first circuit for rejecting intermodulation distortion in the amplitude suppressed signal. In the illustrative implementation, the first circuit is a peak amplitude suppressor having circuitry for computing an amplitude of the input signal and for computing a gain factor for the input signal in response thereto. In the best mode, the gain factor is obtained from a lookup table. The peak amplitude suppressor further includes a multiplier for applying the gain factor to the input signal. In the illustrative embodiment, the second circuit includes a plurality of bandpass filters and a summer for combining the outputs thereof.
    • 一种降幅系统和方法。 本发明的系统包括:第一电路,用于抑制输入信号的峰值振幅并响应于此提供峰值振幅抑制信号;以及第二电路,耦合到第一电路,用于抑制振幅抑制信号中的互调失真。 在说明性实现中,第一电路是峰值幅度抑制​​器,其具有用于计算输入信号的幅度的电路,并且响应于此计算输入信号的增益因子。 在最佳模式下,增益因子从查找表获得。 峰值幅度抑制​​器还包括用于将增益因子应用于输入信号的乘法器。 在说明性实施例中,第二电路包括多个带通滤波器和用于组合其输出的加法器。
    • 2. 发明申请
    • DIGITAL PRE-DISTORTION TECHNIQUE USING NONLINEAR FILTERS
    • 使用非线性滤波器的数字预失真技术
    • US20100020900A1
    • 2010-01-28
    • US12574796
    • 2009-10-07
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • H04L25/49
    • H04L25/03885H03F1/3247H03F1/3276H04L25/49H04L27/2626H04L27/368
    • A method and computer program product for operating a linearizer for a circuit, including generating a set of coefficients via a characterizer; predistorting a signal input to the circuit responsive to the coefficients and generating a linearized output in response thereto; filtering the signal through a linear digital filter having linear digital filter taps, each tap other than a first tap being successively delayed by one delay unit; generating powers of the signal; inputting the generated powers of the signal through tapped delay lines, each line having nonlinear digital filter taps, each tap other than a first tap being successively delayed by one delay unit; applying the coefficients to the linear and nonlinear digital filter taps; summing each of the nonlinear digital filter taps corresponding to a certain number of delay units; and adding the sum of each of the delay units to a particular linear digital filter tap.
    • 一种用于操作电路的线性化器的方法和计算机程序产品,包括经由表征器生成一组系数; 响应于系数预失真输入到电路的信号并响应于此产生线性化的输出; 通过具有线性数字滤波器抽头的线性数字滤波器对信号进行滤波,除了连续延迟一个延迟单元的第一抽头以外的每个抽头; 产生信号的功率; 通过抽头延迟线输入信号的发生功率,每行具有非线性数字滤波器抽头,每个抽头不同于连续延迟一个延迟单元的第一抽头; 将系数应用于线性和非线性数字滤波器抽头; 对与一定数量的延迟单元相对应的每个非线性数字滤波器抽头相加; 并将每个延迟单元的和加到特定的线性数字滤波器抽头上。
    • 4. 发明授权
    • Digital pre-distortion technique using nonlinear filters
    • 使用非线性滤波器的数字预失真技术
    • US07848451B2
    • 2010-12-07
    • US12580618
    • 2009-10-16
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • H04K1/02
    • H04L25/03885H03F1/3247H03F1/3276H04L25/49H04L27/2626H04L27/368
    • A system and method for stabilizing a coefficient set used by a digital predistortion (DPD) engine to apply pre-distortion to a transmit signal and cancel distortion generated by a distorting element or distorting system when transmitting the transmit signal, including obtaining an initial coefficient set; rotating the initial coefficient set to maintain a phase of fundamental components (w10(t), . . . , w1Q(t)) of the initial coefficient set as a constant value; averaging in the time domain the rotated coefficient set to obtain an averaged coefficient set; applying the averaged coefficient set to the DPD engine, the initial coefficient set expressed in a first equation [27]; computing the phase of the fundamental components of the initial coefficient set with a second equation [28]; and computing the rotated coefficient set with a third equation [29].
    • 一种用于稳定由数字预失真(DPD)引擎使用的系数集的系统和方法,用于在传输所述发射信号时将预失真应用于发射信号并消除由失真元件或失真系统产生的失真,包括获得初始系数组 ; 旋转初始系数集合以保持初始系数的基本分量(w10(t),...,w1Q(t))的相位为一个常数值; 在时域中平均旋转系数,以获得平均系数集; 将平均系数集合应用于DPD引擎,以第一等式[27]表示的初始系数集; 用第二个等式计算初始系数集的基本分量的相位[28]; 并用第三个方程计算旋转的系数集[29]。
    • 6. 发明授权
    • Digital pre-distortion technique using nonlinear filters
    • 使用非线性滤波器的数字预失真技术
    • US07606322B2
    • 2009-10-20
    • US11150445
    • 2005-06-09
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • H04K1/02
    • H04L25/03885H03F1/3247H03F1/3276H04L25/49H04L27/2626H04L27/368
    • A linearizer and method. In a most general embodiment, the inventive linearizer includes a characterizer coupled to an input to and an output from said circuit for generating a set of coefficients and a predistortion engine responsive to said coefficients for predistorting a signal input to said circuit such that said circuit generates a linearized output in response thereto. In a specific application, the circuit is a power amplifier into which a series of pulses are sent during an linearizer initialization mode of operation. In a specific implementation, the characterizer analyzes finite impulse responses of the amplifier in response to the initialization pulses and calculates the coefficients for the feedback compensation filter in response thereto. In the preferred embodiment, the impulse responses are averaged with respect to a threshold to provide combined responses. In the illustrative embodiment, the combined responses are Fast Fourier Transformed, reciprocated and then inverse transformed. The data during normal operation is fed back to the data capture, corrected for distortion in the feedback path from the output of the amplifier, converted to basedband, synchronized and used to provide the coefficients for the predistortion linearization engine. As a result, in the best mode, each of the coefficients used in the predistortion linearization engine can be computed by solving the matrix equation HW=S for W, where W is a vector of the weights, S is a vector of predistortion linearization engine outputs, and H is a matrix of PA return path inputs as taught herein.
    • 线性化和方法。 在最一般的实施例中,本发明的线性化器包括耦合到来自所述电路的输入端和从所述电路的输出产生一组系数的表征器和响应于所述系数的预失真引擎,用于预失真输入到所述电路的信号,使得所述电路产生 响应于此的线性化输出。 在具体应用中,电路是在线性化器初始化操作模式期间发送一系列脉冲的功率放大器。 在具体实现中,表征器响应于初始化脉冲分析放大器的有限脉冲响应,并响应于此反馈补偿滤波器计算系数。 在优选实施例中,相对于阈值对脉冲响应进行平均以提供组合响应。 在说明性实施例中,组合的响应是快速傅里叶变换,往复运算,然后逆变换。 在正常操作期间的数据被反馈到数据采集,校正来自放大器的输出的反馈路径中的失真,被转换为基带,同步并用于为预失真线性化引擎提供系数。 结果,在最佳模式下,可以通过求解W的矩阵方程式HW = S来计算预失真线性化引擎中使用的每个系数,其中W是权重的向量,S是预失真线性化引擎的向量 输出,H是如本文所教导的PA返回路径输入的矩阵。
    • 7. 发明授权
    • Digital pre-distortion technique using nonlinear filters
    • 使用非线性滤波器的数字预失真技术
    • US07809081B2
    • 2010-10-05
    • US12574796
    • 2009-10-07
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • Khiem V. CaiDavid B. RutanMatthew S. GorderDon C. Devendorf
    • H04K1/02
    • H04L25/03885H03F1/3247H03F1/3276H04L25/49H04L27/2626H04L27/368
    • A method and computer program product for operating a linearizer for a circuit, including generating a set of coefficients via a characterizer; predistorting a signal input to the circuit responsive to the coefficients and generating a linearized output in response thereto; filtering the signal through a linear digital filter having linear digital filter taps, each tap other than a first tap being successively delayed by one delay unit; generating powers of the signal; inputting the generated powers of the signal through tapped delay lines, each line having nonlinear digital filter taps, each tap other than a first tap being successively delayed by one delay unit; applying the coefficients to the linear and nonlinear digital filter taps; summing each of the nonlinear digital filter taps corresponding to a certain number of delay units; and adding the sum of each of the delay units to a particular linear digital filter tap.
    • 一种用于操作电路的线性化器的方法和计算机程序产品,包括经由表征器生成一组系数; 响应于系数预失真输入到电路的信号并响应于此产生线性化的输出; 通过具有线性数字滤波器抽头的线性数字滤波器对信号进行滤波,除了连续延迟一个延迟单元的第一抽头以外的每个抽头; 产生信号的功率; 通过抽头延迟线输入信号的发生功率,每行具有非线性数字滤波器抽头,每个抽头不同于连续延迟一个延迟单元的第一抽头; 将系数应用于线性和非线性数字滤波器抽头; 对与一定数量的延迟单元相对应的每个非线性数字滤波器抽头相加; 并将每个延迟单元的和加到特定的线性数字滤波器抽头上。
    • 8. 发明授权
    • Low distortion amplifier
    • 低失真放大器
    • US07253689B2
    • 2007-08-07
    • US11148683
    • 2005-06-08
    • Don C. DevendorfLloyd F. LinderCuong D. Tran
    • Don C. DevendorfLloyd F. LinderCuong D. Tran
    • H03F3/04
    • H03F1/32H03F3/26H03F3/3435
    • A low distortion amplifier. The novel amplifier includes a first transistor Q1 having first and second output terminals and an input terminal adapted to receive an input signal, and a second transistor Q2 having first and second output terminals and an input terminal adapted to receive a signal from the first output terminal of Q1, wherein the second output terminal of Q1 is connected to the second output terminal of Q2 in order to eliminate a nonlinear current component in Q2. In an illustrative embodiment, the amplifier also includes a cascode Darlington pair Q3, Q4 for holding the second output terminals of Q1 and Q2 at a desired voltage to further reduce distortion and to maintain a wide bandwidth.
    • 低失真放大器。 新型放大器包括具有第一和第二输出端的第一晶体管Q 1和适于接收输入信号的输入端,以及具有第一和第二输出端的第二晶体管Q 2和适于从第一和第二输出端接收信号的输入端 Q 1的输出端子,其中Q 1的第二输出端子连接到Q 2的第二输出端子,以消除Q 2中的非线性电流分量。 在说明性实施例中,放大器还包括用于将Q1和Q2的第二输出端保持在期望电压的共源共栅达林顿对Q 3,Q 4,以进一步减少失真并维持宽带宽。
    • 9. 发明授权
    • Low noise, low distortion RF amplifier topology
    • 低噪声,低失真RF放大器拓扑
    • US06400229B1
    • 2002-06-04
    • US09790796
    • 2001-02-22
    • Kelvin T. TranClifford DuongMichael N. FariasDon C. DevendorfLloyd F. Linder
    • Kelvin T. TranClifford DuongMichael N. FariasDon C. DevendorfLloyd F. Linder
    • H03F122
    • H03F1/34H03F1/22H03F3/42H03F2200/372
    • A low noise, low distortion radio frequency amplifier which includes a bootstrap design to minimize intermodulation distortion while simultaneously achieving low noise and wide bandwidth. In the illustrative embodiment, the invention includes a first circuit for receiving an input signal; a second circuit for amplifying the input signal using a transistor Q2; and a third circuit for regulating a rate of change of voltage across the transistor Q2 such that the rate of voltage change is zero. The third circuit includes a transistor Q3 connected to the transistor Q2 in cascode. In the specific illustrative embodiment, the third circuit further includes two diodes D1 and D2 used to modulate the voltage at the input of the transistor Q3 in proportion to the voltage modulation at the input of the transistor Q2. In the illustrative embodiment, the second circuit includes a transistor Q1 connected in cascade to the transistor Q2. In the specific illustrative embodiment, the invention further includes a fourth circuit for regulating a rate of change of voltage across the transistor Q1 such that the rate of voltage change is zero. The fourth circuit includes a transistor Q4 connected to the transistor Q1 in cascode. The two diodes D1 and D2 also connect the transistors Q1 and Q4 such that the voltage at the input of the transistor Q4 is modulated in proportion to the voltage modulation at the input of the transistor Q1.
    • 低噪声,低失真射频放大器,其包括自举设计,以最小化互调失真,同时实现低噪声和宽带宽。 在说明性实施例中,本发明包括用于接收输入信号的第一电路; 用于使用晶体管Q2放大输入信号的第二电路; 以及用于调节晶体管Q2两端的电压变化率的第三电路,使得电压变化率为零。 第三电路包括以级联连接到晶体管Q2的晶体管Q3。 在具体说明性实施例中,第三电路还包括两个二极管D1和D2,用于与晶体管Q2的输入处的电压调制成比例地调制晶体管Q3的输入端的电压。 在说明性实施例中,第二电路包括级联连接到晶体管Q2的晶体管Q1。 在具体说明性实施例中,本发明还包括用于调节跨越晶体管Q1的电压变化率的第四电路,使得电压变化率为零。 第四电路包括以级联连接到晶体管Q1的晶体管Q4。 两个二极管D1和D2还连接晶体管Q1和Q4,使得晶体管Q4的输入处的电压与晶体管Q1的输入处的电压调制成比例地调制。