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1. 发明申请

US20090072910A1 VOLTAGE-CONTROLLED OSCILLATOR WITH CONTROL RANGE LIMITER 有权
标题翻译：具有控制范围限制的电压控制振荡器
公开(公告)号：US20090072910A1
公开(公告)日：2009-03-19
申请号：US12112914
申请日：2008-04-30
申请人： Lalitkumar Nathawad , Justin Hwang
发明人： Lalitkumar Nathawad , Justin Hwang
IPC分类号： H03B5/18 , H03L7/06
CPC分类号： H03L7/099 , H03B5/1212 , H03B5/1228 , H03B5/1253 , H03B5/1265 , H03B2201/025 , H03J2200/10
摘要： A voltage-controlled oscillator (VCO) comprising a first circuit, a second circuit, a comparator circuit, and a control unit. The first circuit can determine an output common mode voltage associated with an output of the VCO. The second circuit can generate an upper control voltage limit and a lower control voltage limit associated with a control voltage received by the VCO based, at least in part, on the output common mode voltage. The comparator circuit can compare the control voltage to the upper and lower control voltage limits. The control unit can determine whether to change a switched capacitance associated with the VCO based, at least in part, on whether the control voltage is outside the upper and lower control voltage limits, thereby maintaining an optimal region of operation for the control voltage.
摘要翻译：一种包括第一电路，第二电路，比较器电路和控制单元的压控振荡器（VCO）。第一电路可以确定与VCO的输出相关联的输出共模电压。第二电路可以至少部分地基于输出共模电压产生与VCO接收的控制电压相关联的较高控制电压限制和较低控制电压限制。比较器电路可以将控制电压与上下限电压限制进行比较。至少部分地基于控制电压是否超出上限和下限控制电压限制，控制单元可以确定是否改变与VCO相关联的开关电容，从而保持控制电压的最佳操作区域。

2. 发明授权

US07728676B2 Voltage-controlled oscillator with control range limiter 有权
标题翻译：带控制范围限制器的压控振荡器
公开(公告)号：US07728676B2
公开(公告)日：2010-06-01
申请号：US12112914
申请日：2008-04-30
申请人： Lalitkumar Nathawad , Justin Hwang
发明人： Lalitkumar Nathawad , Justin Hwang
IPC分类号： H03L7/00
CPC分类号： H03L7/099 , H03B5/1212 , H03B5/1228 , H03B5/1253 , H03B5/1265 , H03B2201/025 , H03J2200/10
摘要： A voltage-controlled oscillator (VCO) comprising a first circuit, a second circuit, a comparator circuit, and a control unit. The first circuit can determine an output common mode voltage associated with an output of the VCO. The second circuit can generate an upper control voltage limit and a lower control voltage limit associated with a control voltage received by the VCO based, at least in part, on the output common mode voltage. The comparator circuit can compare the control voltage to the upper and lower control voltage limits. The control unit can determine whether to change a switched capacitance associated with the VCO based, at least in part, on whether the control voltage is outside the upper and lower control voltage limits, thereby maintaining an optimal region of operation for the control voltage.
摘要翻译：一种包括第一电路，第二电路，比较器电路和控制单元的压控振荡器（VCO）。第一电路可以确定与VCO的输出相关联的输出共模电压。第二电路可以至少部分地基于输出共模电压产生与VCO接收的控制电压相关联的较高控制电压限制和较低控制电压限制。比较器电路可以将控制电压与上下限电压限制进行比较。至少部分地基于控制电压是否超出上限和下限控制电压限制，控制单元可以确定是否改变与VCO相关联的开关电容，从而保持控制电压的最佳操作区域。

3. 发明授权

US08072722B1 Electrostatic discharge protection circuit 有权
标题翻译：静电放电保护电路
公开(公告)号：US08072722B1
公开(公告)日：2011-12-06
申请号：US12485220
申请日：2009-06-16
申请人： Justin Hwang
发明人： Justin Hwang
IPC分类号： H02H9/04
CPC分类号： H02H9/046
摘要： Electrostatic discharge (ESD) can affect the operation of and even damage an unprotected integrated circuit. Conventional ESD protection circuits may not be able to protect the integrated circuit if the voltage at the output of the integrated circuit swings with large amplitude. In some embodiments, an ESD protection circuit comprising switching circuitry that provides a low AC impedance path to ground can prevent improper triggering of the ESD protection circuit during normal operation of the integrated circuit, while ensuring that the ESD protection circuit device reliability is not compromised.
摘要翻译：静电放电（ESD）会影响未受保护的集成电路的运行，甚至损坏。如果集成电路输出端的电压以较大的幅度摆动，传统的ESD保护电路可能无法保护集成电路。在一些实施例中，包括向接地提供低AC阻抗路径的开关电路的ESD保护电路可以防止ESD保护电路在集成电路的正常操作期间的不正确触发，同时确保ESD保护电路器件的可靠性不受影响。

4. 发明授权

US07636020B1 Mitigating fractional spurs in fractional-N frequency synthesizer systems 有权
$Mitigating fractional spurs in fractional-N frequency synthesizer systems$
标题翻译：分数N频率合成器系统中的分数马刺
公开(公告)号：US07636020B1
公开(公告)日：2009-12-22
申请号：US12120127
申请日：2008-05-13
申请人： Justin Hwang
发明人： Justin Hwang
IPC分类号： H03L7/18 , H04B1/38
CPC分类号： H03L7/1976
摘要： One embodiment of the present invention sets forth a technique for mitigating fractional spurs in fractional-n frequency synthesizer circuits. The technique involves advantageously modifying certain least significant bit values in the programming bits of the fractional-n frequency synthesizer circuit to avoid pathological fractional bit patterns. As a result, fractional spurs present in conventional fractional-n frequency synthesizer circuits may be attenuated, thereby improving the overall quality of the resulting out signal.
摘要翻译：本发明的一个实施例提出了一种用于减轻分数n频率合成器电路中的分数杂散的技术。该技术涉及有利地修改分数n频率合成器电路的编程位中的某些最低有效位值，以避免病理分数位模式。结果，传统的分数n频率合成器电路中出现的分数杂散可能被衰减，从而提高了所得到的信号的整体质量。

5. 发明授权

US08577301B1 Analog baseband interface for communication systems 有权
标题翻译：用于通信系统的模拟基带接口
公开(公告)号：US08577301B1
公开(公告)日：2013-11-05
申请号：US12043862
申请日：2008-03-06
申请人： Justin Hwang
发明人： Justin Hwang
IPC分类号： H04B17/00 , H03J7/32
CPC分类号： H04B1/40 , H04B17/14 , H04B17/21
摘要： A communication system interface between a baseband unit and a radio frequency (RF) unit is configured to advantageously use a common set of lines to carry both transmit and receive baseband analog signals between the baseband and RF unit, thereby enabling a relatively lower signal count and permitting loopback testing of elements within the baseband and the RF units.
摘要翻译：基带单元和射频（RF）单元之间的通信系统接口被配置为有利地使用公共线路组来承载基带和RF单元之间的发射和接收基带模拟信号，从而实现相对较低的信号数和允许对基带和RF单元内的元件进行环回测试。

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