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    • 1. 发明申请
    • Handling interrupts in data processing
    • 处理数据处理中断
    • US20090177830A1
    • 2009-07-09
    • US12379970
    • 2009-03-05
    • Luc OrionDavid Hennah MansellMichael Robert Nonweiler
    • Luc OrionDavid Hennah MansellMichael Robert Nonweiler
    • G06F13/24
    • G06F9/4812G06F11/3636G06F11/3656G06F11/3664
    • A method of processing data comprising: processing a function using a processor operable to perform a plurality of functions, the processor having interrupts enabled; receiving an interrupt at the processor; suspending processing of the function; accessing at least one control parameter, the at least one control parameter indicating whether processing of the function should be resumed from the point where it was interrupted or whether the function should be repeated following the interrupt; following completion of the interrupt continuing processing of the function either at a start of the function or at a point at which it was interrupted dependent upon the control parameter. A function being an application, a thread, a system software routine, or multiple processing steps defined by software.
    • 一种处理数据的方法,包括:使用可执行多个功能的处理器处理功能,所述处理器具有使能的中断; 在处理器处接收中断; 暂停处理功能; 访问至少一个控制参数,所述至少一个控制参数指示是否应该从其被中断的点恢复该功能的处理,或者该中断之后应该重复该功能; 在完成功能开始的中断继续处理之后,或者根据控制参数中断处理中断点。 作为应用程序,线程,系统软件程序或由软件定义的多个处理步骤的功能。
    • 5. 发明授权
    • Apparatus and method for controlling access to a memory
    • US07171539B2
    • 2007-01-30
    • US10713454
    • 2003-11-17
    • David Hennah MansellMichael Robert NonweilerPeter Guy Middleton
    • David Hennah MansellMichael Robert NonweilerPeter Guy Middleton
    • G06F12/14
    • G06F12/1491G06F12/1036G06F12/1063G06F12/109G06F12/145
    • The present invention provides a data processing apparatus and method for controlling access to a memory in the data processing apparatus. The apparatus comprises a processor operable in a plurality of modes and a plurality of domains, said plurality of domains comprising a secure domain and a non-secure domain, said plurality of modes including at least one non-secure mode being a mode in the non-secure domain and at least one secure mode being a mode in the secure domain. The processor is operable such that when executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. A memory is operable to store data required by the processor and comprises secure memory for storing secure data and non-secure memory for storing non-secure data, the processor being operable to issue a memory access request when access to an item of data in the memory is required. At least one memory management unit is provided which is operable, upon receipt of the memory access request from the processor, to perform conversion of a virtual address specified by the memory access request to a physical address. A first set of tables is provided, each table in the first set containing a number of first descriptors, each first descriptor containing at least a virtual address portion and a corresponding intermediate address portion, and a second set of tables is also provided, with each table in the second set containing a number of second descriptors, each second descriptor containing at least an intermediate address portion and a corresponding physical address portion. The second set of tables are managed by the processor when operating in a privileged mode which is not a non-secure mode, and hence remains secure. The at least one memory management unit is then operable to cause predetermined tables in the first and second set to be referenced to enable the conversion of the virtual address specified by the memory access request to a physical address.
    • 7. 发明申请
    • HANDLING INTERRUPTS IN DATA PROCESSING
    • 数据处理中的处理中断
    • US20130067133A1
    • 2013-03-14
    • US13299403
    • 2011-11-18
    • David Hennah MANSELLTimothy Holroyd Glauert
    • David Hennah MANSELLTimothy Holroyd GlauertMichael Robert Nonweiler
    • G06F13/24
    • G06F9/4812G06F9/4806G06F11/3636G06F11/3656G06F11/3664
    • A method and apparatus for processing data in which a function is processed using a processor operable to perform a plurality of functions is disclosed. When an interrupt is received during processing of the function at a point during the processing at which a portion of the function has been processed then a control parameter is accessed. In response to the control parameter having a value indicting that the function has idempotence processing of the function is stopped without processing the function further, and information on progress of the function is discarded such that following completion of the interrupt the portion of the function that has already been processed is processed again. In response to the control parameter having a value indicating that the function does not have idempotence, processing of the function is suspended without discarding information on progress of the function that has already been processed such that following completion of the interrupt the processing is resumed from a point that it reached when it was suspended.
    • 公开了一种用于处理数据的方法和装置,其中使用可执行多个功能的处理器处理功能。 当在功能的一部分处理期间的功能处理期间接收到中断时,访问控制参数。 响应于具有指示功能具有功能的幂等处理的值的控制参数被停止而不进一步处理功能,并且丢弃关于功能进度的信息,使得在中断之后完成功能的部分具有 已经被处理的再次被处理。 响应于具有指示该功能不具有幂等值的值的控制参数,暂停功能的处理,而不丢弃关于已经被处理的功能的进展的信息,使得在完成中断之后,从 指出它暂停时达到。
    • 8. 发明授权
    • Handling interrupts in data processing
    • 处理数据处理中断
    • US09158574B2
    • 2015-10-13
    • US13299403
    • 2011-11-18
    • David Hennah MansellTimothy Holroyd Glauert
    • David Hennah MansellTimothy Holroyd GlauertMichael Robert Nonweiler
    • G06F9/48G06F11/36
    • G06F9/4812G06F9/4806G06F11/3636G06F11/3656G06F11/3664
    • A method and apparatus for processing data when an interrupt is received during processing of a function at a point during the processing at which a portion of the function has been processed then a control parameter is accessed. In response to a control parameter having a value indicting that the function has idempotence, processing of the function is stopped, and information on progress of the function is discarded such that following completion of the interrupt the portion of the function that has already been processed is processed again. In response to the control parameter having a value indicating that the function does not have idempotence, processing of the function is suspended without discarding information on progress of the function that has already been processed such that following completion of the interrupt the processing is resumed from a point that it reached when it was suspended.
    • 一种处理数据的方法和装置,用于在处理功能的处理期间处理功能期间接收到中断时,处理该功能的一部分,然后控制参数被访问。 响应于具有指示该功能具有等效性的值的控制参数,功能的处理被停止,并且丢弃关于该功能的进度的信息,使得在中断完成之后,已经处理的功能的部分是 再次处理 响应于具有指示该功能不具有幂等值的值的控制参数,暂停功能的处理,而不丢弃关于已经被处理的功能的进展的信息,使得在完成中断之后,从 指出它暂停时达到。