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1. 发明申请

US20170374242A1 HDMI RECEIVING CIRCUIT AND METHOD FOR DETERMINING TRANSMISSION MODE 有权
公开(公告)号：US20170374242A1
公开(公告)日：2017-12-28
申请号：US15424069
申请日：2017-02-03
申请人： MStar Semiconductor, Inc.
发明人： Chun Wen Yeh , Shuo-Ting Kao , Te-Chuan Wang
IPC分类号： H04N5/04 , G09G5/00 , H04N5/44
CPC分类号： H04N5/04 , G09G5/008 , G09G2370/12 , H04N5/44 , H04N21/43635
摘要： A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.

2. 发明授权

US10142678B2 Video processing device and method 有权
公开(公告)号：US10142678B2
公开(公告)日：2018-11-27
申请号：US15603633
申请日：2017-05-24
申请人： MStar Semiconductor, Inc.
发明人： Chin-Lung Lin , Te-Chuan Wang , Chi-En Peng
IPC分类号： H04N21/4363 , G09G5/00
摘要： A video processing device capable of automatically determining an operation mode is provided. The video processing device includes a control signal processing circuit and a controller. The control signal processing circuit receives a control signal from a transmitter, and, according to at least one data access address indicated by the control signal, performs at least steps of determining whether the data access address satisfies a predetermined access address, and outputting a notification signal when the data access address satisfies the predetermined access address. The controller causes the video processing device to operate in a first mode according to the notification signal, and causes the video processing device to operate in a second mode when the notification signal is not received within a predetermined time interval.

3. 发明授权

US09912843B2 HDMI receiving circuit and method for determining transmission mode 有权
公开(公告)号：US09912843B2
公开(公告)日：2018-03-06
申请号：US15424069
申请日：2017-02-03
申请人： MStar Semiconductor, Inc.
发明人： Chun Wen Yeh , Shuo-Ting Kao , Te-Chuan Wang
IPC分类号： H04N5/04 , H04N5/44 , G09G5/00
CPC分类号： H04N5/04 , G09G5/008 , G09G2370/12 , H04N5/44 , H04N21/43635
摘要： A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.

4. 发明授权

US09866538B2 Data decryption circuit and associated method 有权
公开(公告)号：US09866538B2
公开(公告)日：2018-01-09
申请号：US14548479
申请日：2014-11-20
申请人： MStar Semiconductor, Inc.
发明人： Yii-Kai Wang , Te-Chuan Wang
IPC分类号： H04L29/06
CPC分类号： H04L63/0457
摘要： A data decryption circuit for decrypting a current encrypted data packet is provided. The current encrypted data packet includes a header and a payload. The data decryption circuit includes an operation unit and a decryption calculation unit. The operation unit generates first data according to the header and a pseudo-random number, second data according to a session key and a constant, and length information and start position information of the payload according to the header. The operation unit generates the first data, the second data, the length information and the start position information by executing a program code. The decryption calculation circuit, coupled to the operation unit, generates a decryption key according to the first and second data, retrieves the payload from the current encrypted data packet according to the start position information and the length information, and decrypts the payload by the decryption key.

5. 发明申请

US20140254999A1 DATA ACCESS CONTROL METHOD AND APPARATUS 有权
标题翻译：数据访问控制方法和装置
公开(公告)号：US20140254999A1
公开(公告)日：2014-09-11
申请号：US14177341
申请日：2014-02-11
申请人： MStar Semiconductor, Inc.
发明人： Te-Chuan Wang , Tsung-Hsiu Ko
IPC分类号： G11B27/10 , H04N9/87
CPC分类号： H04N9/87 , H04N3/24 , H04N5/935 , H04N7/12 , H04N21/23611 , H04N21/4181
摘要： One embodiment of the present invention discloses a data access method comprising: (a) receiving a plurality of data units consisting of filtered data units and un-filtered data units; (b) filtering the filtered data units; (c) storing the un-filtered data units; (d) recovering the timings of the un-filtered data units stored in the step (c) according to the received timings of the data units received in the step (a); (e) inserting replacement data units to replace the filtered data units, wherein each of the replacement data units has the same timing as each of the filtered data units; and (f) outputting the un-filtered data units and the replacement data units according to the timings of the un-filtered data units and the timing of the replacement data unit.
摘要翻译：本发明的一个实施例公开了一种数据存取方法，包括：（a）接收由经过滤数据单元和未经过滤数据单元组成的多个数据单元; （b）过滤数据单元; （c）存储未经滤波的数据单元; （d）根据接收到的在步骤（a）中接收到的数据单元的定时，恢复在步骤（c）中存储的未经滤波的数据单元的定时; （e）插入替换数据单元以替换经过滤的数据单元，其中每个替换数据单元具有与每个滤波数据单元相同的定时; 以及（f）根据未经滤波的数据单元的定时和替换数据单元的定时输出未经滤波的数据单元和替换数据单元。

6. 发明授权

US09883157B2 Data access control method and apparatus 有权
公开(公告)号：US09883157B2
公开(公告)日：2018-01-30
申请号：US14177341
申请日：2014-02-11
申请人： MStar Semiconductor, Inc.
发明人： Te-Chuan Wang , Tsung-Hsiu Ko
IPC分类号： H04N5/935 , H04N3/24 , H04N7/12 , H04N9/88 , H04N9/87 , H04N21/236 , H04N21/418
CPC分类号： H04N9/87 , H04N3/24 , H04N5/935 , H04N7/12 , H04N21/23611 , H04N21/4181
摘要： One embodiment of the present invention discloses a data access method comprising: (a) receiving a plurality of data units consisting of filtered data units and un-filtered data units; (b) filtering the filtered data units; (c) storing the un-filtered data units; (d) recovering the timings of the un-filtered data units stored in the step (c) according to the received timings of the data units received in the step (a); (e) inserting replacement data units to replace the filtered data units, wherein each of the replacement data units has the same timing as each of the filtered data units; and (f) outputting the un-filtered data units and the replacement data units according to the timings of the un-filtered data units and the timing of the replacement data unit.

7. 发明申请

US20170347052A1 VIDEO PROCESSING DEVICE AND METHOD 审中-公开
公开(公告)号：US20170347052A1
公开(公告)日：2017-11-30
申请号：US15603633
申请日：2017-05-24
申请人： MStar Semiconductor, Inc.
发明人： Chin-Lung Lin , Te-Chuan Wang , Chi-En Peng
IPC分类号： H04N5/44 , H04N7/01
CPC分类号： H04N21/43635 , G09G5/00
摘要： A video processing device capable of automatically determining an operation mode is provided. The video processing device includes a control signal processing circuit and a controller. The control signal processing circuit receives a control signal from a transmitter, and, according to at least one data access address indicated by the control signal, performs at least steps of determining whether the data access address satisfies a predetermined access address, and outputting a notification signal when the data access address satisfies the predetermined access address. The controller causes the video processing device to operate in a first mode according to the notification signal, and causes the video processing device to operate in a second mode when the notification signal is not received within a predetermined time interval.

8. 发明申请

US20150143109A1 Data Decryption Circuit and Associated Method 有权
标题翻译：数据解密电路及相关方法
公开(公告)号：US20150143109A1
公开(公告)日：2015-05-21
申请号：US14548479
申请日：2014-11-20
申请人： MStar Semiconductor, Inc.
发明人： Yii-Kai Wang , Te-Chuan Wang
IPC分类号： H04L29/06
CPC分类号： H04L63/0457
摘要： A data decryption circuit for decrypting a current encrypted data packet is provided. The current encrypted data packet includes a header and a payload. The data decryption circuit includes an operation unit and a decryption calculation unit. The operation unit generates first data according to the header and a pseudo-random number, second data according to a session key and a constant, and length information and start position information of the payload according to the header. The operation unit generates the first data, the second data, the length information and the start position information by executing a program code. The decryption calculation circuit, coupled to the operation unit, generates a decryption key according to the first and second data, retrieves the payload from the current encrypted data packet according to the start position information and the length information, and decrypts the payload by the decryption key.
摘要翻译：提供了用于解密当前加密数据分组的数据解密电路。当前加密的数据分组包括报头和净荷。数据解密电路包括操作单元和解密计算单元。操作单元根据头部产生第一数据，根据头部产生伪随机数，根据会话密钥和常数的第二数据以及有效载荷的长度信息和起始位置信息。操作单元通过执行程序代码生成第一数据，第二数据，长度信息和开始位置信息。耦合到操作单元的解密计算电路根据第一和第二数据生成解密密钥，根据开始位置信息和长度信息从当前加密数据包检索有效载荷，并通过解密来解密有效载荷键。

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