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1. 发明授权

US10748614B2 Semiconductor device and programming method therefor 有权
公开(公告)号：US10748614B2
公开(公告)日：2020-08-18
申请号：US16324782
申请日：2017-09-11
申请人： NEC Corporation
发明人： Makoto Miyamura , Ryusuke Nebashi , Toshitsugu Sakamoto , Yukihide Tsuji , Xu Bai , Ayuka Tada
IPC分类号： G11C13/00 , H03K19/17736
摘要： In order to provide a highly reliable crossbar circuit that enables salvation of reversal of a resistive state of a variable resistance element, the semiconductor device has a configuration obtained by parallelly arranging two unit elements, each including variable-resistance two-terminal elements connected in series, the semiconductor device being provided with: a unit element group being connected to a first wiring and a second wiring; a first programming driver that changes, via the first wiring, a resistive state of the two-terminal element constituting the unit element group; a first selection transistor being connected to the first wiring and the first programming driver; a second programming driver that changes, via the second wiring, a resistive state of the two-terminal element constituting the unit element group; and a second selection transistor being connected to the second wiring and the second programming driver.

2. 发明授权

US10396798B2 Reconfigurable circuit 有权
公开(公告)号：US10396798B2
公开(公告)日：2019-08-27
申请号：US15767683
申请日：2015-10-16
申请人： NEC Corporation
发明人： Xu Bai , Toshitsugu Sakamoto , Munehiro Tada , Yukihide Tsuji , Ayuka Tada , Makoto Miyamura , Ryusuke Nebashi
IPC分类号： H03K19/173 , H03K19/177 , G06F15/78 , G06F17/50
摘要： A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.

3. 发明授权

US10305485B2 Programmable logic integrated circuit, semiconductor device, and characterization method 有权
公开(公告)号：US10305485B2
公开(公告)日：2019-05-28
申请号：US15752330
申请日：2016-08-31
申请人： NEC Corporation
发明人： Ayuka Tada , Noboru Sakimura , Makoto Miyamura , Yukihide Tsuji , Ryusuke Nebashi , Xu Bai , Toshitsugu Sakamoto
IPC分类号： H03K19/177 , H01L27/24 , G06F17/50 , H01L45/00
摘要： An object of the present invention is to provide a method for effectively performing characterization for circuit verification by static timing analysis, of a programmable logic integrated circuit including a crossbar switch including a resistance-variable element, and a logic circuit logically configured with the crossbar switch, wherein: the programmable logic integrated circuit is divided into a plurality of leaf cells including a plurality of load circuits including a part of the crossbar switch, and a power supply element input to the crossbar switch; the leaf cell is divided into delay paths each including a base leaf cell and a correction leaf cell; and circuit verification is performed based on a delay information library in which a delay time for the base leaf cell and a correction delay for the correction leaf cell are integrated into a delay time for the leaf cell.

4. 发明授权

US09508432B2 Semiconductor device with variable resistance switch and programming method therefor 有权
标题翻译：具有可变电阻开关的半导体器件及其编程方法
公开(公告)号：US09508432B2
公开(公告)日：2016-11-29
申请号：US14410261
申请日：2013-02-28
申请人： NEC Corporation
发明人： Makoto Miyamura , Toshitsugu Sakamoto , Munehiro Tada
IPC分类号： G11C5/06 , G11C13/00 , H01L27/10 , H03K19/00 , H01L27/24 , H01L45/00
CPC分类号： G11C13/0069 , G11C5/06 , G11C13/0002 , G11C13/0023 , G11C13/0038 , G11C2013/0073 , G11C2213/15 , H01L27/101 , H01L27/2463 , H01L45/08 , H01L45/1253 , H03K19/0013
摘要： This semiconductor device is provided with: a variable resistance first switch (103), which has a first terminal and a second terminal, and which has the resistance value thereof varied when an applied voltage exceeds a reference value; a variable resistance second switch (104), which has a third terminal and a fourth terminal, and which forms an intermediate node (105) by having the third terminal connected to the second terminal, and has the resistance state thereof varied when an applied voltage exceeds a reference value; first wiring (101) connected to the first terminal; second wiring (102), which is connected to the fourth terminal, and which extends in the direction intersecting the first wiring (101) in a planar view; a first selection switch element (106) connected to the first wiring (101); and a second selection switch element (107) connected to the second wiring (102).
摘要翻译：该半导体装置设置有：可变电阻第一开关（103），其具有第一端子和第二端子，并且当施加的电压超过参考值时，其电阻值变化; 具有第三端子和第四端子的可变电阻第二开关（104），并且通过使第三端子连接到第二端子而形成中间节点（105），并且当施加的电压超过参考值; 连接到第一端子的第一布线（101）第二布线（102），其连接到第四端子，并且在平面图中沿与第一布线（101）相交的方向延伸; 连接到第一布线（101）的第一选择开关元件（106）。和连接到第二布线（102）的第二选择开关元件（107）。

5. 发明申请

US20150131358A1 SEMICONDUCTOR DEVICE AND PROGRAMING METHOD 有权
标题翻译：半导体器件和编程方法
公开(公告)号：US20150131358A1
公开(公告)日：2015-05-14
申请号：US14410261
申请日：2013-02-28
申请人： NEC Corporation
发明人： Makoto Miyamura , Toshitsugu Sakamoto , Munehiro Tada
IPC分类号： G11C13/00 , H01L27/24 , G11C5/06 , H01L45/00
CPC分类号： G11C13/0069 , G11C5/06 , G11C13/0002 , G11C13/0023 , G11C13/0038 , G11C2013/0073 , G11C2213/15 , H01L27/101 , H01L27/2463 , H01L45/08 , H01L45/1253 , H03K19/0013
摘要： This semiconductor device is provided with: a variable resistance first switch (103), which has a first terminal and a second terminal, and which has the resistance value thereof varied when an applied voltage exceeds a reference value; a variable resistance second switch (104), which has a third terminal and a fourth terminal, and which forms an intermediate node (105) by having the third terminal connected to the second terminal, and has the resistance state thereof varied when an applied voltage exceeds a reference value; first wiring (101) connected to the first terminal; second wiring (102), which is connected to the fourth terminal, and which extends in the direction intersecting the first wiring (101) in a planar view; a first selection switch element (106) connected to the first wiring (101); and a second selection switch element (107) connected to the second wiring (102).
摘要翻译：该半导体装置设置有：可变电阻第一开关（103），其具有第一端子和第二端子，并且当施加的电压超过参考值时，其电阻值变化; 具有第三端子和第四端子的可变电阻第二开关（104），并且通过使第三端子连接到第二端子而形成中间节点（105），并且当施加的电压超过参考值; 连接到第一端子的第一布线（101）第二布线（102），其连接到第四端子，并且在平面图中沿与第一布线（101）相交的方向延伸; 连接到第一布线（101）的第一选择开关元件（106）。和连接到第二布线（102）的第二选择开关元件（107）。

6. 发明授权

US10740435B2 Programmable logic integrated circuit, design support system, and configuration method 有权
公开(公告)号：US10740435B2
公开(公告)日：2020-08-11
申请号：US15576947
申请日：2016-05-23
申请人： NEC Corporation
发明人： Noboru Sakimura , Yukihide Tsuji , Ayuka Tada , Xu Bai , Makoto Miyamura , Ryusuke Nebashi
IPC分类号： G06F17/50 , H03K19/17732 , H03K19/173 , G11C29/00 , G11C13/00 , G11C7/22 , H03K19/003
摘要： Provided is a programmable logic integrated circuit wherein even if a failure occurs in any resistance-variable element, remedy would be possible and hence the improvement of reliability has been achieved. In a programmable logic integrated circuit comprising resistance-variable elements, when the states of the resistance-variable elements are to be changed according to externally inputted configuration information, a control means uses a reading means to read the states of the respective resistance-variable elements, and then uses a writing means to change only the states of resistance-changing elements that are different from a state indicated by the configuration information.

7. 发明授权

US10720925B2 Integrated circuit 有权
公开(公告)号：US10720925B2
公开(公告)日：2020-07-21
申请号：US16333317
申请日：2017-09-11
申请人： NEC CORPORATION
发明人： Xu Bai , Toshitsugu Sakamoto , Yukihide Tsuji , Ayuka Tada , Makoto Miyamura , Ryusuke Nebashi
IPC分类号： H03K19/17756 , H03K19/177 , H03K17/693 , G06F30/33 , G11C13/00 , H03K19/17728 , H03K19/1776 , G06F30/331
摘要： Provided is an integrated circuit that has reduced power consumption. The integrated circuit is provided with: a plurality of first wires one end of each of which is used as an input terminal; a plurality of second wires one end of each of which is used as an output terminal and which are respectively connected to the first wires; a bias wire which is connected to each of the second wires, and which is connected to a power supply or ground; a plurality of switches which connect the first wires or the bias wire and the second wires; and a selection circuit which selects electrical connection between the bias wire and the power supply or ground.

8. 发明授权

US11018671B2 Reconfigurable circuit and the method for using the same 有权
公开(公告)号：US11018671B2
公开(公告)日：2021-05-25
申请号：US16083965
申请日：2017-04-06
申请人： NEC Corporation
发明人： Xu Bai , Toshitsugu Sakamoto , Yukihide Tsuji , Makoto Miyamura , Ayuka Tada , Ryusuke Nebashi
IPC分类号： H03K19/177 , H03K19/17736 , H03K19/173 , H03K19/17704 , H03K19/17784 , H03K19/17796
摘要： A reconfigurable circuit includes: a first line; a first switch element disposed between the first line and a first power source line of first voltage; a second line; a second switch element disposed between the second line and a second power source line of second voltage which is different from the first voltage; and a resistive switch assembly disposed between the first line and the second line. The resistive switch assembly includes: a first non-volatile resistive switch; and a second non-volatile resistive switch whose first end is coupled to a first end of the first non-volatile resistive switch. The second end of the first non-volatile resistive switch is coupled to the first line, and the second end of the second non-volatile resistive switch is coupled to the second line.

9. 发明授权

US10812076B2 Logic integrated circuit and semiconductor device 有权
公开(公告)号：US10812076B2
公开(公告)日：2020-10-20
申请号：US16061701
申请日：2017-01-16
申请人： NEC Corporation
发明人： Ryusuke Nebashi , Toshitsugu Sakamoto , Makoto Miyamura , Yukihide Tsuji , Ayuka Tada , Xu Bai
IPC分类号： G11C11/00 , H03K19/003 , G11C13/00 , H03K19/17748 , H03K19/177 , G06F11/07 , H01L27/24 , H01L45/00
摘要： A logic integrated circuit includes: a three-terminal resistance change switch including a first resistance change switch and a second resistance change switch connected in series; a reading circuit which reads first data based on a resistance state of the first resistance change switch and second data based on a resistance state of the second resistance change switch; and a first error detection circuit which compares the first data with the second data and issue an output based on a result of the comparison.

10. 发明授权

US10074421B2 Crossbar switch type memory circuit, look-up table circuit, and programming method 有权
公开(公告)号：US10074421B2
公开(公告)日：2018-09-11
申请号：US15550463
申请日：2016-03-01
申请人： NEC Corporation
发明人： Makoto Miyamura , Noboru Sakimura , Yukihide Tsuji , Ryusuke Nebashi , Tadahiko Sugibayashi
IPC分类号： G11C11/00 , G11C13/00 , H01L27/24
CPC分类号： G11C13/004 , G06F7/00 , G06F7/544 , G11C13/0002 , G11C13/003 , G11C13/0064 , G11C13/0069 , G11C29/12015 , G11C29/50008 , G11C29/52 , G11C2013/0073 , G11C2029/5004 , G11C2213/75 , H01L27/2445 , H01L27/2481
摘要： In order to provide a crossbar switch type memory circuit designed to be usable in normal circumstances even when a resistance change element is in an adverse state, the present invention is provided with: a first unit including a first column wiring to which one end of a first resistance change element is connected, a first power supply-side transistor for controlling the connection of the first column wiring and a power supply node, a first ground-side transistor, of a reverse operation type to the first power supply-side transistor, for controlling the connection of the first column wiring and a ground node, and a first polarity control line for causing the first power supply-side transistor or the first ground-side transistor to turn on and the other to turn off by a polar signal from a polar signal terminal, the first polarity control line being connected to the control terminals of the first power supply-side transistor and first ground-side transistor; a second unit including a second column wiring to which one end of a second resistance change element is connected, a second power supply-side transistor, of the same operation type as the first power supply-side transistor, for controlling the connection of the second column wiring and the power supply node, a second ground-side transistor, of a reverse operation type to the second power supply-side transistor, for controlling the connection of the second column wiring and the ground node, a logic inversion circuit for inverting the polarity of the polar signal from the polar signal terminal and outputting the polarity-inverted signal, and a second polarity control line for causing the second power supply-side transistor or the second ground-side transistor to turn on and the other to turn off by a polar signal from the logic inversion circuit, the second polarity control line being connected to the control terminals of the second power supply-side transistor and second ground-side transistor; and n row wirings (n: positive integer) to which the other ends of the first and second resistance change elements are connected.

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