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1. 发明授权

US06838696B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US06838696B2
公开(公告)日：2005-01-04
申请号：US09805039
申请日：2001-03-14
申请人： Kazuhiro Kobayashi , Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Ken Nakashima , Yuichi Masutani , Hironori Aoki
发明人： Kazuhiro Kobayashi , Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Ken Nakashima , Yuichi Masutani , Hironori Aoki
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译：一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。第二金属图案被半导体图案包围。

2. 发明申请

US20050082527A1 Liquid crystal display 有权
公开(公告)号：US20050082527A1
公开(公告)日：2005-04-21
申请号：US10973402
申请日：2004-10-27
申请人： Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Kazuhiro Kobayashi , Ken Nakashima
发明人： Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Kazuhiro Kobayashi , Ken Nakashima
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L29/04 , H01L29/10 , H01L31/036
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.

3. 发明授权

US07084017B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US07084017B2
公开(公告)日：2006-08-01
申请号：US10973402
申请日：2004-10-27
申请人： Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Kazuhiro Kobayashi , Ken Nakashima
发明人： Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Kazuhiro Kobayashi , Ken Nakashima
IPC分类号： H01L21/00 , H01L21/84 , H01L21/20 , H01L21/36
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译：一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。第二金属图案被半导体图案包围。

4. 发明申请

US20060189123A1 Etchant and method of etching 审中-公开
标题翻译：蚀刻剂和蚀刻方法
公开(公告)号：US20060189123A1
公开(公告)日：2006-08-24
申请号：US11289382
申请日：2005-11-30
申请人： Noriyuki Saitou , Takuji Yoshida , Kazunori Inoue , Makoto Ishikawa , Yoshio Kamiharaguchi
发明人： Noriyuki Saitou , Takuji Yoshida , Kazunori Inoue , Makoto Ishikawa , Yoshio Kamiharaguchi
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： C23F1/44 , C23F1/20 , C23F1/26 , H01L21/32134
摘要： A fine wiring line profile with satisfactory precision is formed from a multilayer film containing a first layer made of an aluminum alloy and a second layer formed thereon made of a molybdenum-niobium alloy, by simultaneously etching the two layers constituting the multilayer film through only one etching operation while preventing the upper layer from forming overhangs. An etchant for etching a multilayer film containing an aluminum alloy layer formed over a substrate and a molybdenum-niobium alloy layer formed thereon having a niobium content of 2-19% by weight contains an aqueous solution of an acid mixture containing phosphoric acid, nitric acid, and an organic acid; and a method of etching is carried out with this etchant. The etchant preferably has a phosphoric acid concentration Np of 50-75% by weight, a nitric acid concentration Nn of 2-15% by weight, and an acid ingredient concentration defined by Np+(98/63)Nn of 55-85% by weight.
摘要翻译：由含有由铝合金制成的第一层和由钼铌合金构成的第二层的多层膜通过仅通过一个同时蚀刻构成多层膜的两层形成精细的布线线廓同时防止上层形成悬垂。用于蚀刻含有在基材上形成的铝合金层的多层膜的蚀刻剂和其上形成的铌含量为2〜19重量％的钼 - 铌合金层含有含有磷酸，硝酸的酸混合物的水溶液，和有机酸; 并且用该蚀刻剂进行蚀刻的方法。蚀刻剂的磷酸浓度优选为50〜75重量％，硝酸浓度N 2〜2重量％，酸成分浓度由55-85％（重量）的N + P +（98/63）N 所定义。

5. 发明授权

US06727178B2 Etchant and method of etching 有权
标题翻译：蚀刻剂和蚀刻方法
公开(公告)号：US06727178B2
公开(公告)日：2004-04-27
申请号：US10419179
申请日：2003-04-21
申请人： Noriyuki Saitou , Takuji Yoshida , Kazunori Inoue , Makoto Ishikawa , Yoshio Kamiharaguchi
发明人： Noriyuki Saitou , Takuji Yoshida , Kazunori Inoue , Makoto Ishikawa , Yoshio Kamiharaguchi
IPC分类号： H01L2144
CPC分类号： H01L21/32134 , C23F1/20
摘要： An etchant for patterning thin metal films by wet etching and in particular, an etchant for use in producing semiconductor devices, such as semiconductor elements and liquid-crystal display elements, is for application to a multilayer film having a first layer made of aluminum or an aluminum alloy having formed thereon a second layer made of aluminum or an aluminum alloy each containing at least one element selected from nitrogen, oxygen, silicon, and carbon, and has a phosphoric acid content of from 35 to 65% by weight and a nitric acid content of from 0.5 to 15% by weight; and an etching is performed using the etchant.
摘要翻译：用于通过湿蚀刻图案化薄金属膜的蚀刻剂，特别是用于制造半导体器件（诸如半导体元件和液晶显示元件）的蚀刻剂适用于具有由铝制成的第一层或多层膜的多层膜铝合金，其上形成有由铝或铝合金制成的第二层，每个第二层含有选自氮，氧，硅和碳中的至少一种元素，并且具有35至65重量％的磷酸含量和硝酸含量为0.5〜15重量％并且使用蚀刻剂进行蚀刻。

6. 发明授权

US07733446B2 Semitransmissive liquid crystal display device and manufacturing method thereof 有权
标题翻译：半透射型液晶显示装置及其制造方法
公开(公告)号：US07733446B2
公开(公告)日：2010-06-08
申请号：US11093223
申请日：2005-03-30
申请人： Yuichi Masutani , Shingo Nagano , Takuji Yoshida , Nobuaki Ishiga , Kazunori Inoue
发明人： Yuichi Masutani , Shingo Nagano , Takuji Yoshida , Nobuaki Ishiga , Kazunori Inoue
IPC分类号： G02F1/136 , G02F1/1335
CPC分类号： G02F1/13458 , G02F1/133555 , G02F1/13439 , G02F1/136227
摘要： The present invention intends to provide a manufacturing method of a semi-transmissive liquid crystal display device in which method a structure and manufacturing process thereof are simplified to enable to reduce the manufacturing cost. In order to achieve the above object, a semi-transmissive liquid crystal display device in the invention has a layer constitution in which a reflective pixel electrode is formed with a second conductive film that constitutes a source electrode, a drain electrode, a source wiring and so on and on an upper layer of the second metal film a transmissive pixel electrode made of a transparent conductive film is formed through the insulating film. A TFT array substrate can be formed through 5 times of photoengraving process.
摘要翻译：本发明旨在提供一种半透射型液晶显示装置的制造方法，其中简化了其结构和制造方法的方法，从而能够降低制造成本。为了实现上述目的，本发明的半透射型液晶显示装置具有：反射像素电极形成有构成源电极，漏电极，源极配线的第二导电膜的层结构，因此在第二金属膜的上层上，通过绝缘膜形成由透明导电膜构成的透射性像素电极。可以通过5倍的光刻工艺形成TFT阵列基板。

7. 发明授权

US06252247B1 Thin film transistor, a method for producing the thin film transistor, and a liquid crystal display using a TFT array substrate 有权
标题翻译：薄膜晶体管器件，使用TFT阵列基板的液晶显示器
公开(公告)号：US06252247B1
公开(公告)日：2001-06-26
申请号：US09168091
申请日：1998-10-08
申请人： Kazuyuki Sakata , Kazunori Inoue , Toru Takeguchi , Nobuhiro Nakamura , Masaru Yamada
发明人： Kazuyuki Sakata , Kazunori Inoue , Toru Takeguchi , Nobuhiro Nakamura , Masaru Yamada
IPC分类号： H01L2702
CPC分类号： H01L29/66765 , G02F2001/136295 , H01L29/41733 , H01L29/458 , H01L29/4908
摘要： A thin film transistor (TFT) device including a first electrode including at least one of a gate, a source and a drain formed on a transparent insulating substrate, an insulating film layer covering both the first electrode and the transparent insulating substrate, and a transparent film electrode formed on the insulating film layer. The first electrode includes a first layer made of pure Al or Al alloy and a second layer, formed by an impurity selected from one of N, O, Si and C, added to the Al or Al alloy. The second layer of the first electrode is provided at an interconnection between the transparent film electrode and the first layer of the first electrode.
摘要翻译：一种薄膜晶体管（TFT）装置，包括：第一电极，其包括形成在透明绝缘基板上的栅极，源极和漏极中的至少一个;覆盖第一电极和透明绝缘基板的绝缘膜层;以及透明膜电极形成在绝缘膜层上。第一电极包括由纯Al或Al合金制成的第一层和由添加到Al或Al合金中的选自N，O，Si和C中的一种的杂质形成的第二层。第一电极的第二层设置在透明膜电极和第一电极的第一层之间的互连处。

8. 发明授权

US06468822B2 Method for manufacturing electro-optic element 有权
标题翻译：电光元件制造方法
公开(公告)号：US06468822B2
公开(公告)日：2002-10-22
申请号：US09820939
申请日：2001-03-30
申请人： Yoichiro Maeda , Nobuhiro Nakamura , Nobuaki Ishiga , Kazunori Inoue
发明人： Yoichiro Maeda , Nobuhiro Nakamura , Nobuaki Ishiga , Kazunori Inoue
IPC分类号： H01L2100
CPC分类号： G02F1/13458 , G02F1/136286
摘要： By using a metal thin film comprising a layer of metal and a layer obtained by adding nitrogen atoms to metal for a metal thin film which becomes a gate electrode and the like, and for a metal thin film which becomes a source electrode and a drain electrode, there is prepared electro-optic elements free from display defects caused by high contact resistance at connected portion of the pixel electrode with the above electrodes even when a low resistance line material is used.
摘要翻译：通过使用包含金属层的金属薄膜和通过向成为栅电极等的金属薄膜而向金属添加氮原子而获得的层以及成为源电极和漏电极的金属薄膜即使在使用低电阻线材的情况下，也制备了没有由像素电极与上述电极的连接部分的高接触电阻引起的显示缺陷的电光元件。

9. 发明授权

US08546804B2 Semiconductor device including a region containing nitrogen at an interface and display device 有权
标题翻译：半导体器件包括界面处含有氮的区域和显示装置
公开(公告)号：US08546804B2
公开(公告)日：2013-10-01
申请号：US13232251
申请日：2011-09-14
申请人： Takeshi Ono , Naoki Nakagawa , Yusuke Yamagata , Kazunori Inoue , Nobuaki Ishiga , Kensuke Nagayama , Naoki Tsumura , Toru Takeguchi
发明人： Takeshi Ono , Naoki Nakagawa , Yusuke Yamagata , Kazunori Inoue , Nobuaki Ishiga , Kensuke Nagayama , Naoki Tsumura , Toru Takeguchi
IPC分类号： H01L29/04 , H01L29/10 , H01L31/00 , G02F1/136
CPC分类号： H01L29/458 , H01L29/42384 , H01L29/66765
摘要： It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.
摘要翻译：本发明的目的是提供一种即使在没有形成高熔点金属阻挡层的情况下也可以改善高温处理后的电特性的技术。半导体器件包括形成在透明绝缘基板上的栅极电极，具有Si半导体活性膜的半导体层和具有n型导电性的欧姆低电阻Si膜依次形成在具有栅绝缘层的栅电极上插入在栅电极和半导体层之间的膜，以及直接连接到半导体层并且至少包含铝（Al）的源极和漏极。在SI半导体活性膜的侧面与源电极和漏极之间的界面附近的第一区域中至少含有氮（N）。

10. 发明申请

US20120105298A1 ACOUSTIC WAVE FILTER 有权
标题翻译：声波滤波器
公开(公告)号：US20120105298A1
公开(公告)日：2012-05-03
申请号：US13344274
申请日：2012-01-05
申请人： Kazunori Inoue , Takashi Matsuda , Michio Miura
发明人： Kazunori Inoue , Takashi Matsuda , Michio Miura
IPC分类号： H03H9/64 , H01Q1/50 , H03H9/72
CPC分类号： H03H9/02992 , H03H9/02952 , H03H9/6483 , H03H9/725
摘要： A configuration that reduces a parasitic capacitance between wires is achieved at a low cost. Disclosed is an acoustic wave filter provided with a piezoelectric substrate 1, resonators 2a and 2b that include a comb-shaped electrode formed on the piezoelectric substrate 1, a wiring portion 3 that is connected to the comb-shaped electrode, and a dielectric layer 4 formed to cover the comb-shaped electrode. The wiring portion 3 is provided with a lower layer wiring portion 3d that is disposed in the same layer as the comb-shaped electrode and an upper layer wiring portion 3e that is disposed on the lower layer wiring portion 3d. The upper layer wiring portion 3e includes a region that has a wider electrode width than the electrode width of the lower layer wiring portion 3d.
摘要翻译：以低成本实现降低电线之间的寄生电容的结构。公开了一种设置有压电基板1的谐波滤波器，包括形成在压电基板1上的梳状电极的谐振器2a和2b，连接到梳状电极的布线部分3和介电层4 形成为覆盖梳状电极。布线部分3设置有与梳状电极相同的层中的下层布线部分3d和布置在下层布线部分3d上的上层布线部分3e。上层布线部分3e包括具有比下层布线部分3d的电极宽度更宽的电极宽度的区域。

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