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1. 发明授权

US08941571B2 Liquid crystal driving circuit 有权
标题翻译：液晶驱动电路
公开(公告)号：US08941571B2
公开(公告)日：2015-01-27
申请号：US13584397
申请日：2012-08-13
申请人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
发明人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
IPC分类号： G09G3/36 , G09G3/04
CPC分类号： G09G3/3655 , G09G3/04 , G09G3/3614 , G09G3/3696 , G09G2330/025
摘要： A liquid-crystal-driving circuit includes: resistors connected in series between first and second potentials lower than the first potential; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid crystal panel, respectively, the common signals being at the first, second, or one or more intermediate potentials in a predetermined order; and a segment-signal output circuit supplies segment signals to segment electrodes of the liquid crystal panel, respectively, the segment signals being at the first and second potentials, or the intermediate potentials according to the common signals, wherein the segment-signal output circuit increases impedances of the segment signals only for a first period when the of segment signals potentials are switched.
摘要翻译：液晶驱动电路包括：电阻器，其串联连接在低于第一电位的第一和第二电位之间; 一个或多个电压跟随器电路，用于阻抗转换第一和第二电位之间的一个或多个中间电位，分别输出在电阻器之间的一个或多个连接点产生的中间电位; 公共信号输出电路，分别向液晶面板的公共电极提供公共信号，共同信号处于第一，第二或一个或多个中间电位，以预定顺序; 分段信号输出电路分别将分段信号提供给液晶面板的分段电极，根据公共信号分段信号处于第一和第二电位或中间电位，其中分段信号输出电路增加段信号的阻抗仅在片段信号电位切换时的第一周期。

2. 发明申请

US20130038805A1 LIQUID CRYSTAL DRIVING CIRCUIT 有权
标题翻译：液晶驱动电路
公开(公告)号：US20130038805A1
公开(公告)日：2013-02-14
申请号：US13584397
申请日：2012-08-13
申请人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
发明人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
IPC分类号： G02F1/1333 , G02F1/136
CPC分类号： G09G3/3655 , G09G3/04 , G09G3/3614 , G09G3/3696 , G09G2330/025
摘要： A liquid-crystal-driving circuit includes: resistors connected in series between first and second potentials lower than the first potential; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid crystal panel, respectively, the common signals being at the first, second, or one or more intermediate potentials in a predetermined order; and a segment-signal output circuit supplies segment signals to segment electrodes of the liquid crystal panel, respectively, the segment signals being at the first and second potentials, or the intermediate potentials according to the common signals, wherein the segment-signal output circuit increases impedances of the segment signals only for a first period when the of segment signals potentials are switched.
摘要翻译：液晶驱动电路包括：电阻器，其串联连接在低于第一电位的第一和第二电位之间; 一个或多个电压跟随器电路，用于阻抗转换第一和第二电位之间的一个或多个中间电位，分别输出在电阻器之间的一个或多个连接点产生的中间电位; 公共信号输出电路，分别向液晶面板的公共电极提供公共信号，共同信号处于第一，第二或一个或多个中间电位，以预定顺序; 分段信号输出电路分别将分段信号提供给液晶面板的分段电极，根据公共信号分段信号处于第一和第二电位或中间电位，其中分段信号输出电路增加段信号的阻抗仅在片段信号电位切换时的第一周期。

3. 发明申请

US20100103157A1 LIQUID CRYSTAL DISPLAY DRIVE CIRCUIT 审中-公开
标题翻译：液晶显示驱动电路
公开(公告)号：US20100103157A1
公开(公告)日：2010-04-29
申请号：US12604779
申请日：2009-10-23
申请人： Kensuke Goto , Tetsuya Tokunaga , Norikazu Katagiri
发明人： Kensuke Goto , Tetsuya Tokunaga , Norikazu Katagiri
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G3/3614 , G09G3/3696 , G09G2310/066 , G09G2320/0209
摘要： A liquid crystal display drive circuit that suppresses a pulse noise in a liquid crystal display panel without increasing a mounting area is offered. A common signal COMi is varied in a staircase waveform with an increment of 1/3 VLCD in such a way that a high electric potential VLCD→a first intermediate electric potential VLCD1→a second intermediate electric potential VLCD2→a low electric potential VSS, when the common signal COMi varies by the maximum amplitude, in other words, when the common signal COMi makes a transition from the high electric potential VLCD to the low electric potential VSS. The segment signal SEGj is varied similarly in a staircase waveform in such a way that the low electric potential VSS→the second intermediate electric potential VLCD2→the first intermediate electric potential VLCD1→the high electric potential VLCD when the segment signal SEGj makes a transition from the low electric potential VSS to the high electric potential VLCD. A peak value of the pulse noise due to a capacitive coupling can be reduced to 1/3 of that in the prior art.
摘要翻译：提供了不增加安装面积来抑制液晶显示面板中的脉冲噪声的液晶显示驱动电路。公共信号COMi在阶梯波形中以1/3VLCD的增量变化，使得高电位VLCD→第一中间电位VLCD1→第二中间电位VLCD2→低电位VSS，当公共信号COMi根据最大幅度变化，换句话说，当公共信号COMi从高电位VLCD向低电位VSS转变时，段状信号SEGj以梯形波形相似地变化，使得当段信号SEGj从...中转变时，低电位VSS→第二中间电位VLCD2→第一中间电位VLCD1→高电位VLCD 低电位VSS到高电位VLCD。由于电容耦合引起的脉冲噪声的峰值可以减小到现有技术中的峰值的1/3。

4. 发明授权

US08238385B2 Data processing circuit and data processing method 有权
标题翻译：数据处理电路和数据处理方法
公开(公告)号：US08238385B2
公开(公告)日：2012-08-07
申请号：US11778947
申请日：2007-07-17
申请人： Hiroyuki Arai , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto , Yoshiyuki Yamagata , Takeshi Kimura
发明人： Hiroyuki Arai , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto , Yoshiyuki Yamagata , Takeshi Kimura
IPC分类号： H04J3/04
CPC分类号： H04L7/02
摘要： A data processing circuit comprising: a first circuit configured to time-division-multiplex a first digital signal synchronous with a clock signal input from an external controller and a second digital signal asynchronous with the clock signal; and a second circuit configured to output a digital signal time-division-multiplexed by the first circuit to the controller.
摘要翻译：一种数据处理电路，包括：第一电路，被配置为对与从外部控制器输入的时钟信号同步的第一数字信号和与时钟信号异步的第二数字信号进行时分复用; 以及第二电路，被配置为将由第一电路进行时分复用的数字信号输出到控制器。

5. 发明授权

US07619547B2 Serial-to-parallel converter circuit and liquid crystal display driving circuit 有权
标题翻译：串并转换电路和液晶显示驱动电路
公开(公告)号：US07619547B2
公开(公告)日：2009-11-17
申请号：US12044867
申请日：2008-03-07
申请人： Yoshiyuki Yamagata , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto
发明人： Yoshiyuki Yamagata , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto
IPC分类号： H03M9/00
CPC分类号： H03M9/00 , G09G3/2096 , G09G3/3688 , G09G2310/08
摘要： A serial-to-parallel converter circuit comprising: an m-bit serial data holding unit to be input with serial data whose input bit number is set to m or n (
摘要翻译：一种串并转换器电路，包括：m位串行数据保持单元，用于输入其输入位数设置为m或传输周期内的n（

6. 发明申请

US20080019400A1 Data Processing Circuit and Data Processing Method 有权
标题翻译：数据处理电路和数据处理方法
公开(公告)号：US20080019400A1
公开(公告)日：2008-01-24
申请号：US11778947
申请日：2007-07-17
申请人： Hiroyuki Arai , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto , Yoshiyuki Yamagata , Takeshi Kimura
发明人： Hiroyuki Arai , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto , Yoshiyuki Yamagata , Takeshi Kimura
IPC分类号： H04J3/06 , G06F1/00
CPC分类号： H04L7/02
摘要： A data processing circuit comprising: a first circuit configured to time-division-multiplex a first digital signal synchronous with a clock signal input from an external controller and a second digital signal asynchronous with the clock signal; and a second circuit configured to output a digital signal time-division-multiplexed by the first circuit to the controller.
摘要翻译：一种数据处理电路，包括：第一电路，被配置为对与从外部控制器输入的时钟信号同步的第一数字信号和与时钟信号异步的第二数字信号进行时分复用; 以及第二电路，被配置为将由第一电路进行时分复用的数字信号输出到控制器。

7. 发明授权

US08082375B2 Noise-tolerant data communication system 有权
标题翻译：耐噪数据通信系统
公开(公告)号：US08082375B2
公开(公告)日：2011-12-20
申请号：US12186149
申请日：2008-08-05
申请人： Tetsuya Tokunaga , Yoshiyuki Yamagata , Yasuo Osawa , Kensuke Goto
发明人： Tetsuya Tokunaga , Yoshiyuki Yamagata , Yasuo Osawa , Kensuke Goto
IPC分类号： G06F3/00 , G06F1/12
CPC分类号： G06F1/12 , G06F13/4291
摘要： This invention offers a data communication system that can perform data communication and detection of a data read-in request signal while reducing the number of communication lines to three, and is tolerant of noise. The data communication between a microcomputer and a key scan IC and the detection of the data read-in request signal are performed through a control line, a clock line and a data line. The data communication system is provided with a data line control circuit that controls the data line so that outputting of the data read-in signal RDRQ to the data line is disabled when first command data is inputted to the key scan IC through the data line, and that the outputting of the data read-in request signal RDRQ to the data line is enabled when second command data is inputted from the microcomputer to the key scan IC through the data line.
摘要翻译：本发明提供了一种数据通信系统，其可以在将通信线路的数量减少到三个的同时执行数据读取请求信号的数据通信和检测，并且容忍噪声。通过控制线，时钟线和数据线来执行微型计算机与键扫描IC之间的数据通信以及数据读入请求信号的检测。数据通信系统设置有数据线控制电路，其控制数据线，使得当通过数据线将第一命令数据输入到键扫描IC时，数据读取信号RDRQ向数据线的输出被禁止，并且当通过数据线从微型计算机向键扫描IC输入第二命令数据时，能够将数据读入请求信号RDRQ输出到数据线。

8. 发明申请

US20090140969A1 LIQUID CRYSTAL DISPLAY DRIVE CIRCUIT 有权
标题翻译：液晶显示驱动电路
公开(公告)号：US20090140969A1
公开(公告)日：2009-06-04
申请号：US12274645
申请日：2008-11-20
申请人： Yoshiyuki Yamagata , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto
发明人： Yoshiyuki Yamagata , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto
IPC分类号： G09G3/36
CPC分类号： G09G3/18 , G09G3/04 , G09G2310/0245 , G09G2310/06 , G09G2310/08 , G09G2330/02
摘要： This invention offers an LCD drive circuit that prevents conversion to a wrong duty driving state and an unintended display caused by taking in of serial data corresponding to the wrong duty driving state. The LCD drive circuit is provided with an LCD drive signal generation circuit that generates driving signals to turn LCD segments on and off based on serial data received by a serial data receiving circuit and is switchable between a ¼ duty driving state and a ⅓ duty driving state. The LCD drive circuit is also provided with a driving state setting circuit that sets the LCD drive signal generation circuit to the ¼ duty driving state based on identification data when the serial data receiving circuit receives the serial data corresponding to the ¼ duty driving state and thereafter forbids the LCD drive signal generation circuit to take in serial data corresponding to the ⅓ duty driving state when the serial data receiving circuit receives the serial data corresponding to the ⅓ duty driving state.
摘要翻译：本发明提供了一种LCD驱动电路，其防止转换为错误的占空比驱动状态，以及通过接收与错误的占空比驱动状态相对应的串行数据而引起的非预期显示。 LCD驱动电路配备有LCD驱动信号发生电路，该电路根据串行数据接收电路所接收的串行数据产生驱动信号，使LCD段导通和关断，并且可在1/4负载驱动状态和1/3负载之间切换驾驶状态 LCD驱动电路还设置有驱动状态设置电路，当串行数据接收电路接收到对应于¼占空比驱动状态的串行数据时，基于识别数据将LCD驱动信号发生电路设置为¼占空比驱动状态当串行数据接收电路接收到对应于1/3占空比驱动状态的串行数据时，禁止LCD驱动信号发生电路采取对应于1/3占空比驱动状态的串行数据。

9. 发明申请

US20090043929A1 DATA COMMUNICATION SYSTEM 有权
标题翻译：数据通信系统
公开(公告)号：US20090043929A1
公开(公告)日：2009-02-12
申请号：US12186149
申请日：2008-08-05
申请人： Tetsuya TOKUNAGA , Yoshiyuki Yamagata , Yasuo Osawa , Kensuke Goto
发明人： Tetsuya TOKUNAGA , Yoshiyuki Yamagata , Yasuo Osawa , Kensuke Goto
IPC分类号： G06F1/12
CPC分类号： G06F1/12 , G06F13/4291
摘要： This invention offers a data communication system that can perform data communication and detection of a data read-in request signal while reducing the number of communication lines to three, and is tolerant of noise. The data communication between a microcomputer and a key scan IC and the detection of the data read-in request signal are performed through a control line, a clock line and a data line. The data communication system is provided with a data line control circuit that controls the data line so that outputting of the data read-in signal RDRQ to the data line is disabled when first command data is inputted to the key scan IC through the data line, and that the outputting of the data read-in request signal RDRQ to the data line is enabled when second command data is inputted from the microcomputer to the key scan IC through the data line.
摘要翻译：本发明提供了一种数据通信系统，其可以在将通信线路的数量减少到三个的同时执行数据读取请求信号的数据通信和检测，并且容忍噪声。通过控制线，时钟线和数据线来执行微型计算机与键扫描IC之间的数据通信以及数据读入请求信号的检测。数据通信系统设置有数据线控制电路，其控制数据线，使得当通过数据线将第一命令数据输入到键扫描IC时，数据读取信号RDRQ向数据线的输出被禁止，并且当通过数据线从微型计算机向键扫描IC输入第二命令数据时，能够将数据读入请求信号RDRQ输出到数据线。

10. 发明申请

US20080218389A1 Serial-To-Parallel Converter Circuit and Liquid Crystal Display Driving Circuit 有权
标题翻译：串行到并行转换器电路和液晶显示驱动电路
公开(公告)号：US20080218389A1
公开(公告)日：2008-09-11
申请号：US12044867
申请日：2008-03-07
申请人： Yoshiyuki Yamagata , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto
发明人： Yoshiyuki Yamagata , Tetsuya Tokunaga , Yasuo Osawa , Kensuke Goto
IPC分类号： H03M9/00
CPC分类号： H03M9/00 , G09G3/2096 , G09G3/3688 , G09G2310/08
摘要： A serial-to-parallel converter circuit comprising: an m-bit serial data holding unit to be input with serial data whose input bit number is set to m or n (
摘要翻译：一种串并转换器电路，包括：m位串行数据保持单元，用于输入其输入位数设置为m或传输周期内的n（

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