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1. 发明授权

US09391271B1 Resistive random access memory and manufacturing method thereof 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US09391271B1
公开(公告)日：2016-07-12
申请号：US14670429
申请日：2015-03-27
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu , Chiu-Tsung Huang
IPC分类号： H01L29/80 , H01L21/00 , H01L21/337 , H01L45/00 , H01L27/24
CPC分类号： H01L45/1226 , H01L27/2436 , H01L27/2481 , H01L45/1616 , H01L45/1683
摘要： A resistive random access memory including a substrate, a dielectric layer, and at least one memory cell string is provided. The dielectric layer is disposed on the substrate. The memory cell string includes memory cells and at least one first interconnect structure. The memory cells are vertically and adjacently disposed in the dielectric layer, and each memory cells includes a first conductive line, a second conductive line, and a variable resistance structure. The second conductive line is disposed at one side of the first conductive line, and the top surface of the second conductive line is higher than the top surface of the first conductive line. The variable resistance structure is disposed between the first conductive line and the second conductive line. The variable resistance structures in the vertically adjacent memory cells are isolated from each other. The first interconnect structure is connected to the vertically adjacent first conductive lines.
摘要翻译：提供了包括基板，电介质层和至少一个存储单元串的电阻随机存取存储器。电介质层设置在基板上。存储单元串包括存储单元和至少一个第一互连结构。存储单元垂直并相邻地布置在电介质层中，并且每个存储单元包括第一导电线，第二导线和可变电阻结构。第二导线设置在第一导线的一侧，第二导线的顶表面高于第一导线的顶表面。可变电阻结构设置在第一导线与第二导线之间。垂直相邻的存储单元中的可变电阻结构彼此隔离。第一互连结构连接到垂直相邻的第一导电线。

2. 发明申请

US20160190440A1 RESISTIVE RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US20160190440A1
公开(公告)日：2016-06-30
申请号：US14670429
申请日：2015-03-27
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu , Chiu-Tsung Huang
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1226 , H01L27/2436 , H01L27/2481 , H01L45/1616 , H01L45/1683
摘要： A resistive random access memory including a substrate, a dielectric layer, and at least one memory cell string is provided. The dielectric layer is disposed on the substrate. The memory cell string includes memory cells and at least one first interconnect structure. The memory cells are vertically and adjacently disposed in the dielectric layer, and each memory cells includes a first conductive line, a second conductive line, and a variable resistance structure. The second conductive line is disposed at one side of the first conductive line, and the top surface of the second conductive line is higher than the top surface of the first conductive line. The variable resistance structure is disposed between the first conductive line and the second conductive line. The variable resistance structures in the vertically adjacent memory cells are isolated from each other. The first interconnect structure is connected to the vertically adjacent first conductive lines.
摘要翻译：提供了包括基板，电介质层和至少一个存储单元串的电阻随机存取存储器。电介质层设置在基板上。存储单元串包括存储单元和至少一个第一互连结构。存储单元垂直并相邻地布置在电介质层中，并且每个存储单元包括第一导电线，第二导线和可变电阻结构。第二导线设置在第一导线的一侧，第二导线的顶表面高于第一导线的顶表面。可变电阻结构设置在第一导线与第二导线之间。垂直相邻的存储单元中的可变电阻结构彼此隔离。第一互连结构连接到垂直相邻的第一导电线。

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