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1. 发明申请

US20160190440A1 RESISTIVE RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US20160190440A1
公开(公告)日：2016-06-30
申请号：US14670429
申请日：2015-03-27
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu , Chiu-Tsung Huang
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1226 , H01L27/2436 , H01L27/2481 , H01L45/1616 , H01L45/1683
摘要： A resistive random access memory including a substrate, a dielectric layer, and at least one memory cell string is provided. The dielectric layer is disposed on the substrate. The memory cell string includes memory cells and at least one first interconnect structure. The memory cells are vertically and adjacently disposed in the dielectric layer, and each memory cells includes a first conductive line, a second conductive line, and a variable resistance structure. The second conductive line is disposed at one side of the first conductive line, and the top surface of the second conductive line is higher than the top surface of the first conductive line. The variable resistance structure is disposed between the first conductive line and the second conductive line. The variable resistance structures in the vertically adjacent memory cells are isolated from each other. The first interconnect structure is connected to the vertically adjacent first conductive lines.
摘要翻译：提供了包括基板，电介质层和至少一个存储单元串的电阻随机存取存储器。电介质层设置在基板上。存储单元串包括存储单元和至少一个第一互连结构。存储单元垂直并相邻地布置在电介质层中，并且每个存储单元包括第一导电线，第二导线和可变电阻结构。第二导线设置在第一导线的一侧，第二导线的顶表面高于第一导线的顶表面。可变电阻结构设置在第一导线与第二导线之间。垂直相邻的存储单元中的可变电阻结构彼此隔离。第一互连结构连接到垂直相邻的第一导电线。

2. 发明授权

US09305977B1 Resistive random access memory and method for manufacturing the same 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US09305977B1
公开(公告)日：2016-04-05
申请号：US14583180
申请日：2014-12-25
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L45/1666 , H01L27/2436 , H01L27/249 , H01L45/04 , H01L45/1226 , H01L45/146 , H01L45/1616
摘要： A resistive random access memory including a substrate, a dielectric layer disposed on the substrate and at least one memory cell string is provided. The memory cell string includes memory cells and second vias. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first via, two conductive lines respectively disposed at two sides of the first via and two variable resistance structures respectively disposed between the first via and the conductive lines. In the vertically adjacent two memory cells, the variable resistance structures of the upper memory cell and the variable resistance structures of the lower memory cell are isolated from each other. The second vias are respectively disposed in the dielectric layer under the first vias and connected to the first vias, and the vertically adjacent two first vias are connected by the second via.
摘要翻译：提供了包括基板，设置在基板上的电介质层和至少一个存储单元串的电阻随机存取存储器。存储单元串包括存储单元和第二通孔。存储单元垂直并相邻地布置在介电层中，并且每个存储单元包括第一通孔，分别设置在第一通孔的两侧的两个导线和分别设置在第一通孔和导电之间的两个可变电阻结构线条。在垂直相邻的两个存储单元中，上存储单元的可变电阻结构和下存储单元的可变电阻结构彼此隔离。第二通孔分别设置在第一通孔下面的电介质层中并连接到第一通孔，并且垂直相邻的两个第一通孔通过第二通孔连接。

3. 发明申请

US20160118443A1 RESISTIVE RANDOM ACCESS MEMORY AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US20160118443A1
公开(公告)日：2016-04-28
申请号：US14583180
申请日：2014-12-25
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L45/1666 , H01L27/2436 , H01L27/249 , H01L45/04 , H01L45/1226 , H01L45/146 , H01L45/1616
摘要： A resistive random access memory including a substrate, a dielectric layer disposed on the substrate and at least one memory cell string is provided. The memory cell string includes memory cells and second vias. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first via, two conductive lines respectively disposed at two sides of the first via and two variable resistance structures respectively disposed between the first via and the conductive lines. In the vertically adjacent two memory cells, the variable resistance structures of the upper memory cell and the variable resistance structures of the lower memory cell are isolated from each other. The second vias are respectively disposed in the dielectric layer under the first vias and connected to the first vias, and the vertically adjacent two first vias are connected by the second via.
摘要翻译：提供了包括基板，设置在基板上的电介质层和至少一个存储单元串的电阻随机存取存储器。存储单元串包括存储单元和第二通孔。存储单元垂直并相邻地布置在介电层中，并且每个存储单元包括第一通孔，分别设置在第一通孔的两侧的两个导线和分别设置在第一通孔和导电之间的两个可变电阻结构线条。在垂直相邻的两个存储单元中，上存储单元的可变电阻结构和下存储单元的可变电阻结构彼此隔离。第二通孔分别设置在第一通孔下面的电介质层中并连接到第一通孔，并且垂直相邻的两个第一通孔通过第二通孔连接。

4. 发明申请

US20160087205A1 RESISTIVE RANDOM ACCESS MEMORY AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20160087205A1
公开(公告)日：2016-03-24
申请号：US14562778
申请日：2014-12-08
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1616 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1675 , H01L45/1683
摘要： A resistive random access memory (RRAM) including a substrate, a dielectric layer, memory cells and an interconnect structure is provided. The dielectric layer is disposed on the substrate. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first electrode, a second electrode and a variable resistance structure. The second electrode is disposed on the first electrode. The variable resistance structure is disposed between the first electrode and the second electrode. In two vertically adjacent memory cells, the first electrode of the upper memory cell and the second electrode of the lower memory cell are disposed between the adjacent variable resistance structures and isolated from each other. The interconnect structure is disposed in the dielectric layer and connects the first electrodes of the memory cells.

5. 发明授权

US09478741B2 Resistive random access memory and method for manufacturing the same 有权
公开(公告)号：US09478741B2
公开(公告)日：2016-10-25
申请号：US15064610
申请日：2016-03-09
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L45/1616 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1675 , H01L45/1683
摘要： A resistive random access memory (RRAM) including a substrate, a dielectric layer, memory cells and an interconnect structure is provided. The dielectric layer is disposed on the substrate. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first electrode, a second electrode and a variable resistance structure. The second electrode is disposed on the first electrode. The variable resistance structure is disposed between the first electrode and the second electrode. In two vertically adjacent memory cells, the first electrode of the upper memory cell and the second electrode of the lower memory cell are disposed between the adjacent variable resistance structures and isolated from each other. The interconnect structure is disposed in the dielectric layer and connects the first electrodes of the memory cells.

6. 发明申请

US20160190444A1 RESISTIVE RANDOM ACCESS MEMORY AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US20160190444A1
公开(公告)日：2016-06-30
申请号：US15064610
申请日：2016-03-09
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1616 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1675 , H01L45/1683
摘要： A resistive random access memory (RRAM) including a substrate, a dielectric layer, memory cells and an interconnect structure is provided. The dielectric layer is disposed on the substrate. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first electrode, a second electrode and a variable resistance structure. The second electrode is disposed on the first electrode. The variable resistance structure is disposed between the first electrode and the second electrode. In two vertically adjacent memory cells, the first electrode of the upper memory cell and the second electrode of the lower memory cell are disposed between the adjacent variable resistance structures and isolated from each other. The interconnect structure is disposed in the dielectric layer and connects the first electrodes of the memory cells.
摘要翻译：提供了包括基板，电介质层，存储单元和互连结构的电阻随机存取存储器（RRAM）。电介质层设置在基板上。存储单元垂直并相邻地布置在电介质层中，并且每个存储单元包括第一电极，第二电极和可变电阻结构。第二电极设置在第一电极上。可变电阻结构设置在第一电极和第二电极之间。在两个垂直相邻的存储单元中，上存储单元的第一电极和下存储单元的第二电极设置在相邻的可变电阻结构之间并彼此隔离。互连结构设置在电介质层中并连接存储单元的第一电极。

7. 发明授权

US09419053B2 Resistive random access memory structure and method for operating resistive random access memory 有权
标题翻译：电阻随机存取存储器结构和操作电阻随机存取存储器的方法
公开(公告)号：US09419053B2
公开(公告)日：2016-08-16
申请号：US14601252
申请日：2015-01-21
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： G11C5/06 , H01L27/24 , G11C13/00
CPC分类号： H01L27/2436 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2213/78 , G11C2213/79 , G11C2213/82 , H01L45/04
摘要： A resistive random access memory (RRAM) structure including a first transistor, a second transistor and a RRAM cell string is provided. The first transistor and the second transistor are cascaded by electrically connecting a first terminal of the first transistor and the second transistor. The RRAM cell string includes a plurality of memory cells connected with each other and is electrically connected to a second terminal of the first transistor.
摘要翻译：提供包括第一晶体管，第二晶体管和RRAM单元串的电阻随机存取存储器（RRAM）结构。第一晶体管和第二晶体管通过电连接第一晶体管的第一端和第二晶体管而级联。 RRAM单元串包括彼此连接并且与第一晶体管的第二端子电连接的多个存储单元。

8. 发明授权

US09391271B1 Resistive random access memory and manufacturing method thereof 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US09391271B1
公开(公告)日：2016-07-12
申请号：US14670429
申请日：2015-03-27
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu , Chiu-Tsung Huang
IPC分类号： H01L29/80 , H01L21/00 , H01L21/337 , H01L45/00 , H01L27/24
CPC分类号： H01L45/1226 , H01L27/2436 , H01L27/2481 , H01L45/1616 , H01L45/1683
摘要： A resistive random access memory including a substrate, a dielectric layer, and at least one memory cell string is provided. The dielectric layer is disposed on the substrate. The memory cell string includes memory cells and at least one first interconnect structure. The memory cells are vertically and adjacently disposed in the dielectric layer, and each memory cells includes a first conductive line, a second conductive line, and a variable resistance structure. The second conductive line is disposed at one side of the first conductive line, and the top surface of the second conductive line is higher than the top surface of the first conductive line. The variable resistance structure is disposed between the first conductive line and the second conductive line. The variable resistance structures in the vertically adjacent memory cells are isolated from each other. The first interconnect structure is connected to the vertically adjacent first conductive lines.
摘要翻译：提供了包括基板，电介质层和至少一个存储单元串的电阻随机存取存储器。电介质层设置在基板上。存储单元串包括存储单元和至少一个第一互连结构。存储单元垂直并相邻地布置在电介质层中，并且每个存储单元包括第一导电线，第二导线和可变电阻结构。第二导线设置在第一导线的一侧，第二导线的顶表面高于第一导线的顶表面。可变电阻结构设置在第一导线与第二导线之间。垂直相邻的存储单元中的可变电阻结构彼此隔离。第一互连结构连接到垂直相邻的第一导电线。

9. 发明申请

US20160148978A1 RESISTIVE RANDOM ACCESS MEMORY STRUCTURE AND METHOD FOR OPERATING RESISTIVE RANDOM ACCESS MEMORY 有权
标题翻译：电阻随机访问存储器结构和操作电阻随机访问存储器的方法
公开(公告)号：US20160148978A1
公开(公告)日：2016-05-26
申请号：US14601252
申请日：2015-01-21
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L27/24 , G11C13/00
CPC分类号： H01L27/2436 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2213/78 , G11C2213/79 , G11C2213/82 , H01L45/04
摘要： A resistive random access memory (RRAM) structure including a first transistor, a second transistor and a RRAM cell string is provided. The first transistor and the second transistor are cascaded by electrically connecting a first terminal of the first transistor and the second transistor. The RRAM cell string includes a plurality of memory cells connected with each other and is electrically connected to a second terminal of the first transistor.
摘要翻译：提供包括第一晶体管，第二晶体管和RRAM单元串的电阻随机存取存储器（RRAM）结构。第一晶体管和第二晶体管通过电连接第一晶体管的第一端和第二晶体管而级联。 RRAM单元串包括彼此连接并且与第一晶体管的第二端子电连接的多个存储单元。

10. 发明授权

US09318703B2 Resistive random access memory and method for manufacturing the same 有权
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US09318703B2
公开(公告)日：2016-04-19
申请号：US14562778
申请日：2014-12-08
申请人： Powerchip Technology Corporation
发明人： Mao-Teng Hsu
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L45/1616 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1675 , H01L45/1683
摘要： A resistive random access memory (RRAM) including a substrate, a dielectric layer, memory cells and an interconnect structure is provided. The dielectric layer is disposed on the substrate. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first electrode, a second electrode and a variable resistance structure. The second electrode is disposed on the first electrode. The variable resistance structure is disposed between the first electrode and the second electrode. In two vertically adjacent memory cells, the first electrode of the upper memory cell and the second electrode of the lower memory cell are disposed between the adjacent variable resistance structures and isolated from each other. The interconnect structure is disposed in the dielectric layer and connects the first electrodes of the memory cells.
摘要翻译：提供了包括基板，电介质层，存储单元和互连结构的电阻随机存取存储器（RRAM）。电介质层设置在基板上。存储单元垂直并相邻地布置在电介质层中，并且每个存储单元包括第一电极，第二电极和可变电阻结构。第二电极设置在第一电极上。可变电阻结构设置在第一电极和第二电极之间。在两个垂直相邻的存储单元中，上存储单元的第一电极和下存储单元的第二电极设置在相邻的可变电阻结构之间并彼此隔离。互连结构设置在电介质层中并连接存储单元的第一电极。

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