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1. 发明授权

US09003218B2 Power shifting in multicore platforms by varying SMT levels 有权
公开(公告)号：US09003218B2
公开(公告)日：2015-04-07
申请号：US13476179
申请日：2012-05-21
申请人： Pradip Bose , Alper Buyuktosunoglu , Dilma Menezes Da Silva , Hubertus Franke , Priyanka Tembey
发明人： Pradip Bose , Alper Buyuktosunoglu , Dilma Menezes Da Silva , Hubertus Franke , Priyanka Tembey
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/3206 , G06F1/26 , G06F1/3203 , G06F1/329 , G06F9/4893 , G06F9/50 , Y02D10/24
摘要： Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.

2. 发明授权

US09043626B2 Power shifting in multicore platforms by varying SMT levels 有权
标题翻译：通过改变SMT级别在多核平台中进行功率转换
公开(公告)号：US09043626B2
公开(公告)日：2015-05-26
申请号：US13529161
申请日：2012-06-21
申请人： Pradip Bose , Alper Buyuktosunoglu , Dilma Menezes Da Silva , Hubertus Franke , Priyanka Tembey
发明人： Pradip Bose , Alper Buyuktosunoglu , Dilma Menezes Da Silva , Hubertus Franke , Priyanka Tembey
IPC分类号： G06F1/32 , G06F9/50
CPC分类号： G06F1/3206 , G06F1/26 , G06F1/3203 , G06F1/329 , G06F9/4893 , G06F9/50 , Y02D10/24
摘要： Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.
摘要翻译：通过设置执行多线程应用程序的多核微处理器平台消耗的功耗的峰值功率级别来管理微处理器平台中的功耗。多核微处理器平台包含多个物理核，每个物理核可配置成多个逻辑核。响应于多核微处理器平台的功率消耗水平超过峰值功率水平，通过改变该物理核心上的逻辑核心数来调整至少一个物理核心中的同时多线程级别。基于同步多线程级别的性能和功耗数据用于选择要调整的物理内核。

3. 发明申请

US20130311811A1 Power Shifting in Multicore Platforms by Varying SMT Levels 有权
公开(公告)号：US20130311811A1
公开(公告)日：2013-11-21
申请号：US13476179
申请日：2012-05-21
申请人： Pradip Bose , Alper Buyuktosunoglu , Dilma Menezes Da Silva , Hubertus Franke , Priyanka Tembey
发明人： Pradip Bose , Alper Buyuktosunoglu , Dilma Menezes Da Silva , Hubertus Franke , Priyanka Tembey
IPC分类号： G06F1/28 , G06F9/30
CPC分类号： G06F1/3206 , G06F1/26 , G06F1/3203 , G06F1/329 , G06F9/4893 , G06F9/50 , Y02D10/24
摘要： Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.

4. 发明申请

US20130311812A1 Power Shifting in Multicore Platforms by Varying SMT Levels 有权
公开(公告)号：US20130311812A1
公开(公告)日：2013-11-21
申请号：US13529161
申请日：2012-06-21
申请人： Pradip Bose , Alper Buyuktosunoglu , Dilma M. Da Silva , Hubertus Franke , Priyanka Tembey
发明人： Pradip Bose , Alper Buyuktosunoglu , Dilma M. Da Silva , Hubertus Franke , Priyanka Tembey
IPC分类号： G06F1/26 , G06F9/46 , G06F11/30
CPC分类号： G06F1/3206 , G06F1/26 , G06F1/3203 , G06F1/329 , G06F9/4893 , G06F9/50 , Y02D10/24
摘要： Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.

5. 发明授权

US07886172B2 Method of virtualization and OS-level thermal management and multithreaded processor with virtualization and OS-level thermal management 失效
标题翻译：虚拟化和操作系统级热管理方法和具有虚拟化和操作系统级热管理的多线程处理器
公开(公告)号：US07886172B2
公开(公告)日：2011-02-08
申请号：US11845243
申请日：2007-08-27
申请人： Pradip Bose , Chen-Yong Cher , Hubertus Franke , Hendrik Hamann , Eren Kursun , Alan J. Weger
发明人： Pradip Bose , Chen-Yong Cher , Hubertus Franke , Hendrik Hamann , Eren Kursun , Alan J. Weger
IPC分类号： G06F1/32
CPC分类号： G06F1/206 , G06F9/5027 , G06F9/5094 , Y02D10/22
摘要： A program product and method of managing task execution on an integrated circuit chip such as a chip-level multiprocessor (CMP) with Simultaneous MultiThreading (SMT). Multiple chip operating units or cores have chip sensors (temperature sensors or counters) for monitoring temperature in units. Task execution is monitored for hot tasks and especially for hotspots. Task execution is balanced, thermally, to minimize hot spots. Thermal balancing may include Simultaneous MultiThreading (SMT) heat balancing, chip-level multiprocessors (CMP) heat balancing, deferring execution of identified hot tasks, migrating identified hot tasks from a current core to a colder core, User-specified Core-hopping, and SMT hardware threading.
摘要翻译：一种在诸如具有同时多线程（SMT）的芯片级多处理器（CMP）的集成电路芯片上管理任务执行的程序产品和方法。多个芯片操作单元或内核具有用于以单位监测温度的芯片传感器（温度传感器或计数器）。监视任务执行热任务，特别是热点。任务执行是平衡的，热的，以最小化热点。热平衡可以包括同时多线程（SMT）热平衡，芯片级多处理器（CMP）热平衡，推迟识别的热任务的执行，将识别的热任务从当前核心迁移到较冷核心，用户指定的核心跳跃和 SMT硬件线程。

6. 发明申请

US20090064164A1 METHOD OF VIRTUALIZATION AND OS-LEVEL THERMAL MANAGEMENT AND MULTITHREADED PROCESSOR WITH VIRTUALIZATION AND OS-LEVEL THERMAL MANAGEMENT 失效
标题翻译：虚拟化和操作系统级热管理方法和虚拟化和操作级热管理的多处理器
公开(公告)号：US20090064164A1
公开(公告)日：2009-03-05
申请号：US11845243
申请日：2007-08-27
申请人： Pradip Bose , Chen-Yong Cher , Hubertus Franke , Hendrik Hamann , Eren Kursun , Alan J. Weger
发明人： Pradip Bose , Chen-Yong Cher , Hubertus Franke , Hendrik Hamann , Eren Kursun , Alan J. Weger
IPC分类号： G06F9/46
CPC分类号： G06F1/206 , G06F9/5027 , G06F9/5094 , Y02D10/22
摘要： A program product and method of managing task execution on an integrated circuit chip such as a chip-level multiprocessor (CMP) with Simultaneous MultiThreading (SMT). Multiple chip operating units or cores have chip sensors (temperature sensors or counters) for monitoring temperature in units. Task execution is monitored for hot tasks and especially for hotspots. Task execution is balanced, thermally, to minimize hot spots. Thermal balancing may include Simultaneous MultiThreading (SMT) heat balancing, chip-level multiprocessors (CMP) heat balancing, deferring execution of identified hot tasks, migrating identified hot tasks from a current core to a colder core, User-specified Core-hopping, and SMT hardware threading.
摘要翻译：一种在诸如具有同时多线程（SMT）的芯片级多处理器（CMP）的集成电路芯片上管理任务执行的程序产品和方法。多个芯片操作单元或内核具有用于以单位监测温度的芯片传感器（温度传感器或计数器）。监视任务执行热任务，特别是热点。任务执行是平衡的，热的，以最小化热点。热平衡可以包括同时多线程（SMT）热平衡，芯片级多处理器（CMP）热平衡，推迟识别的热任务的执行，将识别的热任务从当前核心迁移到较冷核心，用户指定的核心跳跃和 SMT硬件线程。

7. 发明授权

US09122581B2 Data versioning in solid state memory 有权
标题翻译：固态存储器中的数据版本控制
公开(公告)号：US09122581B2
公开(公告)日：2015-09-01
申请号：US13494697
申请日：2012-06-12
申请人： Gokul B. Kandiraju , Hubertus Franke , David Craft
发明人： Gokul B. Kandiraju , Hubertus Franke , David Craft
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7207
摘要： Embodiments are directed to maintaining versions of data within a solid state memory. One or more embodiments create at least one data structure associated with at least one logical page of a solid state memory. The logical page is associated with at least one physical page in a data block of the solid state memory. A first set of information associated with the logical page is stored in the data structure. A second set of information associated with the physical page is stored in the data structure. The second set of information includes at least versioning information identifying which version of the logical page is represented by a dataset is stored within the physical page.
摘要翻译：实施例旨在维持固态存储器内的数据版本。一个或多个实施例创建与固态存储器的至少一个逻辑页面相关联的至少一个数据结构。逻辑页面与固态存储器的数据块中的至少一个物理页面相关联。与逻辑页面相关联的第一组信息被存储在数据结构中。与物理页面相关联的第二组信息被存储在数据结构中。第二组信息至少包括版本信息，识别由数据集表示的逻辑页面的哪个版本被存储在物理页面中。

8. 发明授权

US08918588B2 Maintaining a cache of blocks from a plurality of data streams 有权
标题翻译：维护来自多个数据流的块的高速缓存
公开(公告)号：US08918588B2
公开(公告)日：2014-12-23
申请号：US12419523
申请日：2009-04-07
申请人： Brian Bass , Giora Biran , Hubertus Franke , Amit Golander , Hao Yu
发明人： Brian Bass , Giora Biran , Hubertus Franke , Amit Golander , Hao Yu
IPC分类号： G06F12/02 , G06F12/12
CPC分类号： G06F12/121 , G06F12/123
摘要： Techniques for replacing one or more blocks in a cache, the one or more blocks being associated with a plurality of data streams, are provided. The one or more blocks in the cache are grouped into one or more groups, each corresponding to one of the plurality of data streams. One or more incoming blocks are received. To free space, the one or more blocks of the one or more groups in the cache are invalidated in accordance with at least one of an inactivity of a given data stream corresponding to the one or more groups and a length of the one or more groups. The one or more incoming blocks are stored in the cache. A number of data streams maintained within the cache is maximized.
摘要翻译：提供了用于替换高速缓存中的一个或多个块的技术，所述一个或多个块与多个数据流相关联。高速缓存中的一个或多个块被分组成一个或多个组，每个组对应于多个数据流中的一个。接收一个或多个传入块。为了释放空间，根据与一个或多个组对应的给定数据流的不活动和一个或多个组的长度中的至少一个，高速缓存中的一个或多个组中的一个或多个组的一个或多个块无效。一个或多个传入块被存储在高速缓存中。保持在高速缓存内的多个数据流被最大化。

9. 发明授权

US08789046B2 Method to embed a light-weight kernel in a full-weight kernel to provide a heterogeneous execution environment 有权
标题翻译：在轻量级内核中嵌入轻量级内核以提供异构执行环境的方法
公开(公告)号：US08789046B2
公开(公告)日：2014-07-22
申请号：US13435014
申请日：2012-03-30
申请人： Hubertus Franke , Todd A. Inglett , Yoonho Park , Hartmut Penner , Bryan S. Rosenburg , Robert W. Wisniewski
发明人： Hubertus Franke , Todd A. Inglett , Yoonho Park , Hartmut Penner , Bryan S. Rosenburg , Robert W. Wisniewski
IPC分类号： G06F9/455
CPC分类号： G06F9/45537 , G06F2009/45562
摘要： Enabling a Light-Weight Kernel (LWK) to run in a virtualized environment on a Full-Weight Kernel (FWK), in one aspect, may include replacing a FWK loader, e.g., FWK's dynamic library loader or linker, with a LWK library on a first computing entity for an application allocated to run on one or more second computing entities. The LWK library may be enabled to initialize the one or more second computing entities and associated memory allocated to run the application under the LWK library. The LWK library may be enabled to manage the one or more second computing entities and said associated memory and resources needed by the application.
摘要翻译：在一个方面，使轻量级内核（LWK）在全权重内核（FWK）的虚拟化环境中运行，可能包括将FWK加载程序（例如FWK的动态库加载器或链接器）替换为LWK库分配用于在一个或多个第二计算实体上运行的应用的第一计算实体。可以启用LWK库来初始化分配用于在LWK库下运行应用程序的一个或多个第二计算实体和相关联的存储器。可以启用LWK库来管理应用程序所需的一个或多个第二计算实体和所述相关联的存储器和资源。

10. 发明授权

US08756208B2 Encoded data processing 失效
标题翻译：编码数据处理
公开(公告)号：US08756208B2
公开(公告)日：2014-06-17
申请号：US13545522
申请日：2012-07-10
申请人： Hubertus Franke , Balakrishna R. Iyer , Hong Min , Terence P. Purcell , Guogen Zhang
发明人： Hubertus Franke , Balakrishna R. Iyer , Hong Min , Terence P. Purcell , Guogen Zhang
IPC分类号： G06F17/00 , G06F17/30
CPC分类号： G06F17/30286 , G06F17/30076 , G06F17/30339 , H03M7/30
摘要： Techniques for encoded data processing which allow for continuous data processing as encoded data changes. Data is decomposed into one or more blocks with each block containing at least one data record. At least one data record within a given block is encoded with a first encoding process selected from one or more encoding processes. The first encoding process is associated with the given data block. Techniques evaluate whether or not to implement an encoding change for a given block when updating a given data record in the given block. Responsive to the evaluation, the given block is re-encoded with a second encoding process. Responsive to the re-encoding, the association of the given block is updated. A map is formed to convert the given data record encoded with the first encoding process to the second encoding process so as to preserve comparative relationships of the given data record.
摘要翻译：用于编码数据处理的技术，其允许作为编码数据的连续数据处理改变。数据被分解为一个或多个块，每个块包含至少一个数据记录。使用从一个或多个编码过程中选择的第一编码过程对给定块内的至少一个数据记录进行编码。第一编码过程与给定的数据块相关联。技术评估在给定块中更新给定数据记录时是否实现给定块的编码更改。响应于评估，给定的块用第二编码过程重新编码。响应于重新编码，给定块的关联更新。形成地图以将用第一编码处理编码的给定数据记录转换为第二编码处理，以便保持给定数据记录的比较关系。

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