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1. 发明授权

US08975976B2 Multi-power mode reference clock with constant duty cycle 有权
标题翻译：具有恒定占空比的多功率模式参考时钟
公开(公告)号：US08975976B2
公开(公告)日：2015-03-10
申请号：US13787230
申请日：2013-03-06
申请人： Qualcomm Incorporated
发明人： Jingyu Hu , Michael Naone Farias
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , H03L1/00
摘要： A power management apparatus and method for maintaining a substantially constant duty cycle of a reference clock signal in a multi-power oscillator, includes a first output power transistor in electrical parallel with a series arrangement of a second output power transistor and a switch, and a crystal oscillator capacitively coupled to a common gate of the first and second output power transistors, wherein a level of the reference clock signal power output is a normal power level when the switch is open and the level of the reference clock signal power output is a higher power level when the switch is closed to operate the second output power transistor in parallel with the first output power transistor.
摘要翻译：一种用于在多功率振荡器中保持基准时钟信号的基本恒定的占空比的电源管理装置和方法包括与第二输出功率晶体管和开关的串联装置电并联的第一输出功率晶体管，以及电容耦合到第一和第二输出功率晶体管的公共栅极的晶体振荡器，其中当开关断开时，参考时钟信号功率输出的电平是正常功率电平，并且参考时钟信号功率输出的电平更高当开关闭合以与第一输出功率晶体管并联操作第二输出功率晶体管时的功率电平。

2. 发明申请

US20140253251A1 MULTI-POWER MODE REFERENCE CLOCK WITH CONSTANT DUTY CYCLE 有权
标题翻译：具有恒定占空比的多功能模式参考时钟
公开(公告)号：US20140253251A1
公开(公告)日：2014-09-11
申请号：US13787230
申请日：2013-03-06
申请人： QUALCOMM INCORPORATED
发明人： Jingyu Hu , Michael Naone Farias
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , H03L1/00
摘要： A power management apparatus and method for maintaining a substantially constant duty cycle of a reference clock signal in a multi-power oscillator, includes a first output power transistor in electrical parallel with a series arrangement of a second output power transistor and a switch, and a crystal oscillator capacitively coupled to a common gate of the first and second output power transistors, wherein a level of the reference clock signal power output is a normal power level when the switch is open and the level of the reference clock signal power output is a higher power level when the switch is closed to operate the second output power transistor in parallel with the first output power transistor.
摘要翻译：一种用于在多功率振荡器中保持基准时钟信号的基本恒定的占空比的电源管理装置和方法包括与第二输出功率晶体管和开关的串联装置电并联的第一输出功率晶体管，以及电容耦合到第一和第二输出功率晶体管的公共栅极的晶体振荡器，其中当开关断开时，参考时钟信号功率输出的电平是正常功率电平，并且参考时钟信号功率输出的电平更高当开关闭合以与第一输出功率晶体管并联操作第二输出功率晶体管时的功率电平。

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