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1. 发明申请

US20170011789A1 CMOS Analog Memories Utilizing Ferroelectric Capacitors 审中-公开
标题翻译：使用铁电电容的CMOS模拟记忆体
公开(公告)号：US20170011789A1
公开(公告)日：2017-01-12
申请号：US15271145
申请日：2016-09-20
申请人： Radiant Technologies, Inc. , Radiant Technologies, Inc.
发明人： Joseph T. Evans, JR. , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273 , G11C11/2275 , G11C11/5657
摘要： A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.
摘要翻译：公开了一种存储单元和由该存储单元构成的存储器。根据本发明的存储器包括铁电电容器，电荷源和读取电路。电荷源接收要存储在铁电电容器中的数据值。电荷源将数据值转换为存储在铁电电容器中的剩余电荷，并使残留电荷存储在铁电体电容器中。读取电路确定存储在铁电体电容器中的电荷。数据值具有三个不同的可能状态，并且所确定的电荷具有多于三个确定的值。存储器还包括使铁电电容器进入预定的已知参考偏振状态的复位电路。

2. 发明申请

US20150016175A1 CMOS Analog Memories Utilizing Ferroelectric Capacitors 有权
标题翻译：使用铁电电容的CMOS模拟记忆体
公开(公告)号：US20150016175A1
公开(公告)日：2015-01-15
申请号：US14498911
申请日：2014-09-26
申请人： Radiant Technologies, Inc. , Radiant Technologies, Inc.
发明人： Joseph T. Evans, JR. , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273 , G11C11/2275 , G11C11/5657
摘要： A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.
摘要翻译：公开了一种存储单元和由该存储单元构成的存储器。根据本发明的存储器包括铁电电容器，电荷源和读取电路。电荷源接收要存储在铁电电容器中的数据值。电荷源将数据值转换为存储在铁电电容器中的剩余电荷，并使残留电荷存储在铁电体电容器中。读取电路确定存储在铁电体电容器中的电荷。数据值具有三个不同的可能状态，并且所确定的电荷具有多于三个确定的值。存储器还包括使铁电电容器进入预定的已知参考偏振状态的复位电路。

3. 发明授权

US10020042B2 CMOS analog memories utilizing ferroelectric capacitors 有权
公开(公告)号：US10020042B2
公开(公告)日：2018-07-10
申请号：US15271145
申请日：2016-09-20
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans, Jr. , Calvin B. Ward
IPC分类号： G11C11/22 , G11C11/56
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273 , G11C11/2275 , G11C11/5657
摘要： A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.

4. 发明授权

US09496019B2 CMOS analog memories utilizing ferroelectric capacitors 有权
标题翻译：使用铁电电容器的CMOS模拟存储器
公开(公告)号：US09496019B2
公开(公告)日：2016-11-15
申请号：US15072292
申请日：2016-03-16
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans, Jr. , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273 , G11C11/2275 , G11C11/5657
摘要： A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.
摘要翻译：公开了一种存储单元和由该存储单元构成的存储器。根据本发明的存储器包括铁电电容器，电荷源和读电路。电荷源接收要存储在铁电电容器中的数据值。电荷源将数据值转换为存储在铁电电容器中的剩余电荷，并使残留电荷存储在铁电体电容器中。读取电路确定存储在铁电体电容器中的电荷。数据值具有三个不同的可能状态，并且所确定的电荷具有多于三个确定的值。存储器还包括使铁电电容器进入预定的已知参考偏振状态的复位电路。

5. 发明申请

US20160196862A1 CMOS Analog Memories Utilizing Ferroelectric Capacitors 审中-公开
公开(公告)号：US20160196862A1
公开(公告)日：2016-07-07
申请号：US15072292
申请日：2016-03-16
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans, JR. , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273 , G11C11/2275 , G11C11/5657
摘要： A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.

6. 发明授权

US08964446B2 Analog memories utilizing ferroelectric capacitors 有权
标题翻译：使用铁电电容器的模拟存储器
公开(公告)号：US08964446B2
公开(公告)日：2015-02-24
申请号：US14274616
申请日：2014-05-09
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/2259 , G11C11/2273 , G11C11/2275 , G11C11/2293 , G11C11/5657 , G11C27/005
摘要： A ferroelectric memory having a plurality of ferroelectric memory cells, each ferroelectric memory cell including a ferroelectric capacitor is disclosed. The ferroelectric memory includes read and write lines and a plurality of ferroelectric memory cell select buses, one select bus corresponding to each of the ferroelectric memory cells. Each of the ferroelectric memory cells includes first and second gates for connecting the ferroelectric memory cell to the read line and the write line, respectively, in response to signals on the ferroelectric memory cell select bus corresponding to that ferroelectric memory cell. A write circuit causes a charge to be stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the write line, the charge having a value determined by a data value having at least three states. A read circuit measures the charge stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the read line to generate an output value, the output value corresponding to one of the states.
摘要翻译：公开了具有多个铁电存储单元的铁电存储器，每个强电介质存储单元包括铁电电容器。铁电存储器包括读写线和多个铁电存储器单元选择总线，每个铁电存储单元相应的一个选择总线。每个铁电存储单元包括用于响应于与该铁电存储单元相对应的强电介质存储单元选择总线上的信号而分别将铁电存储单元连接到读取线和写入线的第一和第二栅极。写入电路使电荷存储在当前连接到写入线的强电介质存储单元的铁电电容器中，电荷具有由具有至少三个状态的数据值确定的值。读取电路测量存储在当前连接到读取线的铁电存储器单元的铁电电容器中的电荷，以产生与其中一个状态对应的输出值。

7. 发明授权

US09697882B1 Analog ferroelectric memory with improved temperature range 有权
公开(公告)号：US09697882B1
公开(公告)日：2017-07-04
申请号：US15252146
申请日：2016-08-30
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans, Jr. , Calvin B. Ward
IPC分类号： G11C11/22 , G11C11/406 , G11C11/419 , G11C11/24 , G11C11/56 , G11C11/4096 , G11C11/16
CPC分类号： G11C11/2275 , G11C11/1673 , G11C11/22 , G11C11/221 , G11C11/2259 , G11C11/2273 , G11C11/4096 , G11C11/419 , G11C11/5642 , G11C11/5657
摘要： A ferroelectric memory and a method for operating a ferroelectric memory are disclosed. The ferroelectric memory includes a ferroelectric memory cell having a ferroelectric capacitor characterized by a maximum remanent charge, Qmax. A write circuit receives a data value having more than two states for storage in the ferroelectric capacitor. The write circuit measures Qmax for the ferroelectric capacitor, determines a charge that is a fraction of the measured Qmax to be stored in the ferroelectric capacitor, the fraction being determined by the data value. The write circuit causes a charge equal to the fraction times Qmax to be stored in the ferroelectric capacitor. A read circuit determines a value stored in the ferroelectric capacitor by measuring a charge stored in the ferroelectric capacitor, measuring Qmax for the ferroelectric capacitor, and determining the data value from the measured charge and the measured Qmax.

8. 发明授权

US09324405B2 CMOS analog memories utilizing ferroelectric capacitors 有权
公开(公告)号：US09324405B2
公开(公告)日：2016-04-26
申请号：US14498911
申请日：2014-09-26
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans, Jr. , Calvin B. Ward
IPC分类号： G11C11/22 , G11C11/56
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273 , G11C11/2275 , G11C11/5657
摘要： A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.

9. 发明申请

US20140247643A1 Analog Memories Utilizing Ferroelectric Capacitors 审中-公开
标题翻译：使用铁电电容的模拟记忆体
公开(公告)号：US20140247643A1
公开(公告)日：2014-09-04
申请号：US14274616
申请日：2014-05-09
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/2259 , G11C11/2273 , G11C11/2275 , G11C11/2293 , G11C11/5657 , G11C27/005
摘要： A ferroelectric memory having a plurality of ferroelectric memory cells, each ferroelectric memory cell including a ferroelectric capacitor is disclosed. The ferroelectric memory includes read and write lines and a plurality of ferroelectric memory cell select buses, one select bus corresponding to each of the ferroelectric memory cells. Each of the ferroelectric memory cells includes first and second gates for connecting the ferroelectric memory cell to the read line and the write line, respectively, in response to signals on the ferroelectric memory cell select bus corresponding to that ferroelectric memory cell. A write circuit causes a charge to be stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the write line, the charge having a value determined by a data value having at least three states. A read circuit measures the charge stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the read line to generate an output value, the output value corresponding to one of the states.
摘要翻译：公开了具有多个铁电存储单元的铁电存储器，每个强电介质存储单元包括铁电电容器。铁电存储器包括读写线和多个铁电存储器单元选择总线，每个铁电存储单元相应的一个选择总线。每个铁电存储单元包括用于响应于与该铁电存储单元相对应的强电介质存储单元选择总线上的信号而分别将铁电存储单元连接到读取线和写入线的第一和第二栅极。写入电路使电荷存储在当前连接到写入线的强电介质存储单元的铁电电容器中，电荷具有由具有至少三个状态的数据值确定的值。读取电路测量存储在当前连接到读取线的铁电存储器单元的铁电电容器中的电荷，以产生与其中一个状态对应的输出值。

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