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    • 1. 发明授权
    • Code coverage circuitry
    • 代码覆盖电路
    • US08811108B2
    • 2014-08-19
    • US13195505
    • 2011-08-01
    • Rafael M. VilelaWalter Luis TercariolFernando Zampronho NetoSandro A. P. Haddad
    • Rafael M. VilelaWalter Luis TercariolFernando Zampronho NetoSandro A. P. Haddad
    • G11C11/24
    • G11C29/12015G06F11/3676G11C7/16G11C8/08G11C2029/1202
    • A circuit includes a memory (130) coupled to an analog line coverage circuit (104). The analog line coverage circuit includes a plurality of buffers (151-154) in which each buffer is coupled to one memory location of the memory, a plurality of bin cells (161-164) in which each bin cell is coupled to a buffer, a multiplexer (170), each input terminal of which is coupled to a bin cell, and an analog-to-digital converter (180) coupled to the multiplexer and to an output terminal of the analog line coverage circuit. The analog line coverage circuit stores an analog voltage that is representative of a number of occasions that a memory location is accessed, and outputs a signal indicative thereof. A processor (102) is coupled to the memory and to the analog line coverage circuit, and the processor enables the analog line coverage circuit when the processor is in a debug mode.
    • 电路包括耦合到模拟线路覆盖电路(104)的存储器(130)。 模拟线路覆盖电路包括多个缓冲器(151-154),其中每个缓冲器耦合到存储器的一个存储器位置,其中每个存储单元耦合到缓冲器的多个存储单元(161-164) 多路复用器(170),其每个输入端耦合到一个二进制信元单元,以及耦合到多路复用器和模拟线路覆盖电路的输出端的模拟 - 数字转换器(180)。 模拟线路覆盖电路存储表示访问存储器位置的次数的模拟电压,并输出表示其的信号。 处理器(102)耦合到存储器和模拟线路覆盖电路,并且当处理器处于调试模式时,处理器使能模拟线路覆盖电路。