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1. 发明授权

US09268551B2 Runtime creation, assignment, deployment and updating of arbitrary radio waveform techniques for a radio waveform generation device 有权
标题翻译：无线电波形发生装置的任意无线电波形技术的运行时创建，分配，部署和更新
公开(公告)号：US09268551B2
公开(公告)日：2016-02-23
申请号：US13929116
申请日：2013-06-27
申请人： Raytheon Company
发明人： Harry B. Marr , Daniel Thompson , William B. Noble , Paul Yue , Steven G. Danielson , Julia Karl , Larisa Angelique Natalya Stephan
IPC分类号： H04L27/00 , G06F9/445 , G06F17/50
CPC分类号： G06F8/65 , G06F17/5054
摘要： Embodiments of a system and method for runtime creation, assignment, deployment and updating of arbitrary radio waveform techniques for a radio waveform generation device are generally described herein. In some embodiments, a parser is arranged to parse packet data files to generate channel properties associated with at least one of a plurality of techniques. A user application may be coupled to the parser and arranged to process the channel properties into channelized waveform data according to the at least one of the plurality of techniques. A packetizer may be coupled to the user application and arranged to packetize the channelized waveform data. A digital-to-analog converter may be arranged to convert the channelized waveform data to analog RF signals representing the waveform corresponding to the at least one of the plurality of techniques.
摘要翻译：这里通常描述用于无线电波形生成装置的任意无线电波形技术的运行时创建，分配，部署和更新的系统和方法的实施例。在一些实施例中，解析器被布置成解析分组数据文件以生成与多种技术中的至少一种相关联的信道属性。用户应用可以耦合到解析器，并且被布置成根据多种技术中的至少一种将信道特性处理成信道化波形数据。分组器可以耦合到用户应用，并且被布置为对信道化的波形数据进行打包。数模转换器可以被布置成将信道化波形数据转换成表示对应于多种技术中的至少一种技术的波形的模拟RF信号。

2. 发明授权

US09281820B2 Minimizing power consumption in asynchronous dataflow architectures 有权
标题翻译：最小化异步数据流架构中的功耗
公开(公告)号：US09281820B2
公开(公告)日：2016-03-08
申请号：US13782546
申请日：2013-03-01
申请人： Raytheon Company
发明人： Harry Marr , Kenneth E. Prager , Julia Karl , Lloyd J. Lewins
IPC分类号： G06F7/57 , H03K19/096
CPC分类号： H03K19/096 , G06F7/57 , G06F9/3871
摘要： An asynchronous pipeline structure includes a plurality of functional blocks comprising dynamic logic, each block precharged to an idle state responsive to a precharge control signal applied thereto, with each block, upon being precharged, receiving input data thereto for processing, and holding output data generated thereby during an evaluate phase, independent of a reset of the input data; for each block, a completion detector circuit coupled to the output of the functional block, the completion detector circuit generating an acknowledgement signal that indicates validity or absence of data at the output of the block; and for each block, a precharge control circuit generating a precharge signal, wherein for a given block, a first input to the precharge control circuit comprises the acknowledgment signal from a downstream completion detector, and second input to the precharge control circuit comprises the precharge signal from an upstream precharge control circuit.
摘要翻译：异步流水线结构包括多个功能块，其包括动态逻辑，每个块响应于施加到其上的预充电控制信号预充电到空闲状态，每个块在预充电时接收输入数据以进行处理，并保持生成的输出数据从而在评估阶段期间，独立于输入数据的复位; 对于每个块，完成检测器电路耦合到功能块的输出，完成检测器电路产生指示块的输出处数据有效或不存在的确认信号; 并且对于每个块，产生预充电信号的预充电控制电路，其中对于给定块，对于预充电控制电路的第一输入包括来自下游完成检测器的确认信号，并且到预充电控制电路的第二输入包括预充电信号来自上游预充电控制电路。

3. 发明申请

US20140362774A1 CIRCUITS AND METHOD TO ENABLE EFFICIENT GENERATION OF DIRECT DIGITAL SYNTHESIZER BASED WAVEFORMS OF ARBITRARY BANDWIDTH 有权
标题翻译：直接数字合成器基于波束形成波形的有效生成的电路和方法
公开(公告)号：US20140362774A1
公开(公告)日：2014-12-11
申请号：US13910731
申请日：2013-06-05
申请人： Raytheon Company
发明人： Harry B. Marr , Daniel Thompson , Julia Karl
IPC分类号： H04K3/00
CPC分类号： H04K3/42 , G06F1/022 , H04K3/00 , H04K3/44
摘要： Embodiments of a system and method for providing efficient wideband inverse channelization for direct digital synthesizer based jamming techniques are generally described herein. In some embodiments, metadata associated with a technique for generating a waveform, such as frequency, phase and amplitude parameters, is received. Data select signals and data input are generated based on the received metadata. In-phase and quadrature signals are produced at an output of a first de-multiplexer and a second de-multiplexer, respectively, based on the data select signals and the data input. Frequency modulated signals generated by direct digital synthesizers may be combined in a channel using a separate, distinct channel combiner.
摘要翻译：本文通常描述用于为基于直接数字合成器的干扰技术提供有效的宽带反向信道化的系统和方法的实施例。在一些实施例中，接收与用于生成波形的技术（例如频率，相位和幅度参数）相关联的元数据。基于接收的元数据生成数据选择信号和数据输入。基于数据选择信号和数据输入，分别在第一解复用器和第二解复用器的输出端产生同相和正交信号。由直接数字合成器产生的频率调制信号可以使用单独的，不同的信道组合器在信道中组合。

4. 发明授权

US09385831B2 Circuits and method to enable efficient generation of direct digital synthesizer based waveforms of arbitrary bandwidth 有权
标题翻译：基于直接数字合成器的任意带宽波形的电路和方法
公开(公告)号：US09385831B2
公开(公告)日：2016-07-05
申请号：US13910731
申请日：2013-06-05
申请人： Raytheon Company
发明人： Harry B. Marr , Daniel Thompson , Julia Karl
IPC分类号： H04K3/00 , G06F1/02
CPC分类号： H04K3/42 , G06F1/022 , H04K3/00 , H04K3/44
摘要： Embodiments of a system and method for providing efficient wideband inverse channelization for direct digital synthesizer based jamming techniques are generally described herein. In some embodiments, metadata associated with a technique for generating a waveform, such as frequency, phase and amplitude parameters, is received. Data select signals and data input are generated based on the received metadata. In-phase and quadrature signals are produced at an output of a first de-multiplexer and a second de-multiplexer, respectively, based on the data select signals and the data input. Frequency modulated signals generated by direct digital synthesizers may be combined in a channel using a separate, distinct channel combiner.
摘要翻译：本文通常描述用于为基于直接数字合成器的干扰技术提供有效的宽带反向信道化的系统和方法的实施例。在一些实施例中，接收与用于生成波形的技术（例如频率，相位和幅度参数）相关联的元数据。基于接收的元数据生成数据选择信号和数据输入。基于数据选择信号和数据输入，分别在第一解复用器和第二解复用器的输出端产生同相和正交信号。由直接数字合成器产生的频率调制信号可以使用单独的，不同的信道组合器在信道中组合。

5. 发明申请

US20140247088A1 MINIMIZING POWER CONSUMPTION IN ASYNCHRONOUS DATAFLOW ARCHITECTURES 有权
标题翻译：最小化异步数据流架构中的功耗
公开(公告)号：US20140247088A1
公开(公告)日：2014-09-04
申请号：US13782631
申请日：2013-03-01
申请人： RAYTHEON COMPANY
发明人： Kenneth E. Prager , Lloyd J. Lewins , Harry Marr , Julia Karl , Michael Vahey
IPC分类号： H03K19/00
CPC分类号： H03K19/0008
摘要： A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable operating voltage for the one or more elements; control logic configured to receive feedback signals from each of the one or more elements, the feedback signals indicative of a rate at which data is moving through each individual element; and the control logic configured to output a control signal to the power supply so as to cause the power supply to reduce the operating voltage for the one or more elements responsive to a decreasing workload detected therein, and to cause the power supply to increase the operating voltage for the one or more pipelines responsive to an increasing workload detected therein.
摘要翻译：数字信号处理装置包括具有被配置为处理数字数据的一个或多个元件的数字电路装置; 电源，被配置为传递用于所述一个或多个元件的可控工作电压; 控制逻辑被配置为从所述一个或多个元件中的每一个接收反馈信号，所述反馈信号指示数据正在通过每个单独元件移动的速率; 以及所述控制逻辑被配置为将控制信号输出到所述电源，以便响应于在其中检测到的工作负荷减少而使所述电源降低所述一个或多个元件的工作电压，并且使所述电源增加所述操作响应于其中检测到的增加的工作负载，一个或多个管道的电压。

6. 发明申请

US20160210138A1 RUNTIME CREATION, ASSIGNMENT, DEPLOYMENT AND UPDATING OF ARBITRARY RADIO WAVEFORM TECHNIQUES FOR A RADIO WAVEFORM GENERATION DEVICE 有权
标题翻译：无线电波形发生装置的无线电波形技术的创建，分配，部署和更新
公开(公告)号：US20160210138A1
公开(公告)日：2016-07-21
申请号：US15049801
申请日：2016-02-22
申请人： Raytheon Company
发明人： Harry B. Marr, JR. , Daniel Thompson , William B. Noble , Paul Yue , Steven G. Danielson , Julia Karl , Larisa Angelique Natalya Stephan
IPC分类号： G06F9/445
CPC分类号： G06F8/65 , G06F17/5054
摘要： Embodiments of a system and method for runtime creation, assignment, deployment and updating of arbitrary radio waveform techniques for a radio waveform generation device are generally described herein. In some embodiments, a parser is arranged to parse packet data files to generate channel properties associated with at least one of a plurality of techniques. A user application may be coupled to the parser and arranged to process the channel properties into channelized waveform data according to the at least one of the plurality of techniques. A packetizer may be coupled to the user application and arranged to packetize the channelized waveform data. A digital-to-analog converter may be arranged to convert the channelized waveform data to analog RE signals representing the waveform corresponding to the at least one of the plurality of techniques.
摘要翻译：这里通常描述用于无线电波形生成装置的任意无线电波形技术的运行时创建，分配，部署和更新的系统和方法的实施例。在一些实施例中，解析器被布置成解析分组数据文件以生成与多种技术中的至少一种相关联的信道属性。用户应用可以耦合到解析器，并且被布置成根据多种技术中的至少一种将信道特性处理成信道化波形数据。分组器可以耦合到用户应用，并且被布置为对信道化的波形数据进行打包。数模转换器可以被布置成将信道化波形数据转换成表示对应于多种技术中的至少一种技术的波形的模拟RE信号。

7. 发明授权

US08836372B1 Minimizing power consumption in asynchronous dataflow architectures 有权
标题翻译：最小化异步数据流架构中的功耗
公开(公告)号：US08836372B1
公开(公告)日：2014-09-16
申请号：US13782631
申请日：2013-03-01
申请人： Raytheon Company
发明人： Kenneth E. Prager , Lloyd J. Lewins , Harry Marr , Julia Karl , Michael Vahey
IPC分类号： H03K19/00
CPC分类号： H03K19/0008
摘要： A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable operating voltage for the one or more elements; control logic configured to receive feedback signals from each of the one or more elements, the feedback signals indicative of a rate at which data is moving through each individual element; and the control logic configured to output a control signal to the power supply so as to cause the power supply to reduce the operating voltage for the one or more elements responsive to a decreasing workload detected therein, and to cause the power supply to increase the operating voltage for the one or more pipelines responsive to an increasing workload detected therein.
摘要翻译：数字信号处理装置包括具有被配置为处理数字数据的一个或多个元件的数字电路装置; 电源，被配置为传递用于所述一个或多个元件的可控工作电压; 控制逻辑被配置为从所述一个或多个元件中的每一个接收反馈信号，所述反馈信号指示数据正在通过每个单独元件移动的速率; 以及所述控制逻辑被配置为将控制信号输出到所述电源，以便响应于在其中检测到的工作负荷减少而使所述电源降低所述一个或多个元件的工作电压，并且使所述电源增加所述操作响应于其中检测到的增加的工作负载，一个或多个管道的电压。

8. 发明授权

US09582265B2 Runtime creation, assignment, deployment and updating of arbitrary radio waveform techniques for a radio waveform generation device 有权
标题翻译：无线电波形发生装置的任意无线电波形技术的运行时创建，分配，部署和更新
公开(公告)号：US09582265B2
公开(公告)日：2017-02-28
申请号：US15049801
申请日：2016-02-22
申请人： Raytheon Company
发明人： Harry B. Marr, Jr. , Daniel Thompson , William B. Noble , Paul Yue , Steven G. Danielson , Julia Karl , Larisa Angelique Natalya Stephan
IPC分类号： H04L27/00 , G06F9/445 , G06F17/50
CPC分类号： G06F8/65 , G06F17/5054
摘要： A system includes a library of elements to create a model describing a waveform parameter technique. A constraint checker verifies that the created model is correct by construction by needing no verification after compilation. The constraint checker also implements a valid programmable device build according to the waveform parameter technique. A placement decision module receives the verified models produces a placement decision for placing the waveform parameter technique based on the verified model in a programmable device. A synthesis tool receives the verified model from the placement decision module and synthesizes the waveform parameter technique based on the verified model. A link/loader receives the placement decision from the placement decision module and receives the synthesized technique from the synthesis tool. The link/loader also places the waveform parameter technique in the programmable device according to the placement decision.
摘要翻译：系统包括一个元素库，用于创建描述波形参数技术的模型。约束检查器通过编译后无需验证来验证创建的模型是否正确。约束检查器还根据波形参数技术实现有效的可编程器件构建。接收经验证的模型的放置决策模块产生用于将基于经验证的模型的波形参数技术放置在可编程设备中的放置决定。综合工具从布局决策模块接收验证模型，并根据验证模型合成波形参数技术。链接/加载器从布局决定模块接收布局决定，并从综合工具接收合成技术。链路/加载器还可以根据布局决定将波形参数技术放置在可编程设备中。

9. 发明申请

US20150007158A1 RUNTIME CREATION, ASSIGNMENT, DEPLOYMENT AND UPDATING OF ARBITRARY RADIO WAVEFORM TECHNIQUES FOR A RADIO WAVEFORM GENERATION DEVICE 有权
标题翻译：无线电波形发生装置的无线电波形技术的创建，分配，部署和更新
公开(公告)号：US20150007158A1
公开(公告)日：2015-01-01
申请号：US13929116
申请日：2013-06-27
申请人： Raytheon Company
发明人： Harry B. Marr , Daniel Thompson , William B. Noble , Paul Yue , Steven G. Danielson , Julia Karl , Larisa Angelique Natalya Stephan
IPC分类号： G06F9/445
CPC分类号： G06F8/65 , G06F17/5054
摘要： Embodiments of a system and method for runtime creation, assignment, deployment and updating of arbitrary radio waveform techniques for a radio waveform generation device are generally described herein. In some embodiments, a parser is arranged to parse packet data files to generate channel properties associated with at least one of a plurality of techniques. A user application may be coupled to the parser and arranged to process the channel properties into channelized waveform data according to the at least one of the plurality of techniques. A packetizer may be coupled to the user application and arranged to packetize the channelized waveform data. A digital-to-analog converter may be arranged to convert the channelized waveform data to analog RF signals representing the waveform corresponding to the at least one of the plurality of techniques.
摘要翻译：这里通常描述用于无线电波形生成装置的任意无线电波形技术的运行时创建，分配，部署和更新的系统和方法的实施例。在一些实施例中，解析器被布置成解析分组数据文件以生成与多种技术中的至少一种相关联的信道属性。用户应用可以耦合到解析器，并且被布置成根据多种技术中的至少一种将信道特性处理成信道化波形数据。分组器可以耦合到用户应用，并且被布置为对信道化的波形数据进行打包。数模转换器可以被布置成将信道化波形数据转换成表示对应于多种技术中的至少一种技术的波形的模拟RF信号。

10. 发明申请

US20140250313A1 MINIMIZING POWER CONSUMPTION IN ASYNCHRONOUS DATAFLOW ARCHITECTURES 有权
标题翻译：最小化异步数据流架构中的功耗
公开(公告)号：US20140250313A1
公开(公告)日：2014-09-04
申请号：US13782546
申请日：2013-03-01
申请人： RAYTHEON COMPANY
发明人： Harry Marr , Kenneth E. Prager , Julia Karl , Lloyd J. Lewins
IPC分类号： G06F1/32
CPC分类号： H03K19/096 , G06F7/57 , G06F9/3871
摘要： An asynchronous pipeline structure includes a plurality of functional blocks comprising dynamic logic, each block precharged to an idle state responsive to a precharge control signal applied thereto, with each block, upon being precharged, receiving input data thereto for processing, and holding output data generated thereby during an evaluate phase, independent of a reset of the input data; for each block, a completion detector circuit coupled to the output of the functional block, the completion detector circuit generating an acknowledgement signal that indicates validity or absence of data at the output of the block; and for each block, a precharge control circuit generating a precharge signal, wherein for a given block, a first input to the precharge control circuit comprises the acknowledgment signal from a downstream completion detector, and second input to the precharge control circuit comprises the precharge signal from an upstream precharge control circuit.
摘要翻译：异步流水线结构包括多个功能块，其包括动态逻辑，每个块响应于施加到其上的预充电控制信号预充电到空闲状态，每个块在预充电时接收输入数据以进行处理，并保持生成的输出数据从而在评估阶段期间，独立于输入数据的复位; 对于每个块，完成检测器电路耦合到功能块的输出，完成检测器电路产生指示块的输出处数据有效或不存在的确认信号; 并且对于每个块，产生预充电信号的预充电控制电路，其中对于给定的块，对预充电控制电路的第一输入包括来自下游完成检测器的确认信号，并且预充电控制电路的第二输入包括预充电信号来自上游预充电控制电路。

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