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1. 发明授权

US07796172B1 Method and apparatus for eliminating image artifacts due to defective imager columns and rows 有权
标题翻译：用于消除由于有缺陷的成像器列和行引起的图像伪像的方法和装置
公开(公告)号：US07796172B1
公开(公告)日：2010-09-14
申请号：US10794703
申请日：2004-03-04
申请人： Timothy M. Slagle , Robert S. Hannebauer , Richard B. Merrill , Peter J. Manca
发明人： Timothy M. Slagle , Robert S. Hannebauer , Richard B. Merrill , Peter J. Manca
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/367 , H04N5/374 , H04N5/378
摘要： In a readout bus architecture having a first column, a readout means is coupled to a photodetector and configured to transfer charge from the photodetector. A select means is coupled to the photodetector and is configured to transfer charge from the photodetector. An address circuit is coupled to the first column through the select means and is configured to generate and decode an address and turn on the select means for the first column if the address matched the first column and if the address circuit received a corrected enable signal indicating that the first column is not defective. A correction circuit is coupled to the address circuit and is configured to generate the corrected enable signal indicating that the first column is not defective if the correction circuit determined that the first column is not defective.
摘要翻译：在具有第一列的读出总线架构中，读出装置耦合到光电检测器并且被配置为从光电检测器传送电荷。选择装置耦合到光电检测器并且被配置为从光电检测器传送电荷。地址电路通过选择装置耦合到第一列，并被配置为产生和解码地址，并且如果地址与第一列匹配，则接通第一列的选择装置，并且如果地址电路接收到校正的使能信号，指示第一列没有缺陷。校正电路耦合到地址电路，并且被配置为如果校正电路确定第一列没有缺陷，则生成指示第一列不是有缺陷的校正的使能信号。

2. 发明申请

US20100155576A1 MULTI-COLOR CMOS PIXEL SENSOR WITH SHARED ROW WIRING AND DUAL OUTPUT LINES 审中-公开
标题翻译：多色CMOS像素传感器，具有共享线路和双输出线
公开(公告)号：US20100155576A1
公开(公告)日：2010-06-24
申请号：US12717703
申请日：2010-03-04
申请人： Richard B. Merrill
发明人： Richard B. Merrill
IPC分类号： H01L27/146
CPC分类号： H04N5/37452 , H01L27/14603 , H01L27/14641 , H04N5/3741 , H04N5/37457 , H04N9/045
摘要： An array of multicolor CMOS pixel sensors has a plurality of photosensors per pixel, each photosensor coupled to a single sense node through a select transistor having a select input, each pixel sensor including a reset transistor coupled to the sense node and having a reset input, an amplifier coupled to the sense node and a row-select transistor coupled to the amplifier. The select inputs and the reset inputs for pixel sensors in a pair of adjacent rows are coupled to select signal lines and reset signal lines associated with the pair of rows. The amplifier transistors in individual columns of each row are coupled to a column output line through a row-select transistor having a row-select input. The row-select inputs for pixel sensors in each row of the array are coupled to a row-select line associated with the row.
摘要翻译：多色CMOS像素传感器阵列具有每像素多个光电传感器，每个光电传感器通过具有选择输入的选择晶体管耦合到单个感测节点，每个像素传感器包括耦合到感测节点并具有复位输入的复位晶体管，耦合到感测节点的放大器和耦合到放大器的行选择晶体管。一对相邻行中的像素传感器的选择输入和复位输入被耦合到选择与该对行相关联的信号线和复位信号线。每行的各列中的放大器晶体管通过具有行选择输入的行选择晶体管耦合到列输出线。阵列的每一行中的像素传感器的行选择输入被耦合到与该行相关联的行选择行。

3. 发明授权

US06960757B2 Simplified wiring schemes for vertical color filter pixel sensors 有权
标题翻译：垂直滤色镜像素传感器简化布线方案
公开(公告)号：US06960757B2
公开(公告)日：2005-11-01
申请号：US10418881
申请日：2003-04-16
申请人： Richard B. Merrill , Robert S. Hannebauer , Glenn J. Keller , James Tornes
发明人： Richard B. Merrill , Robert S. Hannebauer , Glenn J. Keller , James Tornes
IPC分类号： H01L27/146 , G01J3/50
CPC分类号： H01L27/14647 , H01L27/14621
摘要： Vertical-color-filter pixel sensors having simplified wiring and reduced transistor counts are disclosed. In an embodiment, a single line is used for reference voltage, pixel reset voltage, and column-output signals in a VCF pixel sensor. In another embodiment, row-reset signals and row-enable signals are sent across a line that is shared between adjacent rows in an array of VCF pixel sensors. The present invention also provides an optimized layout for a VCF pixel sensor with shared row-reset, row-enable, reference voltage and column-output lines as well as a VCF pixel sensor in which source-follower voltage, source-follower amplifier voltage and row-enable signals all share a common line. These combined line embodiments can be used with a single column-output line as well as two row-enable lines. The embodiments can also be implemented in a VCF pixel sensor without a row-enable transistor.
摘要翻译：公开了具有简化的布线和减小的晶体管数量的垂直滤色器像素传感器。在一个实施例中，单行用于VCF像素传感器中的参考电压，像素复位电压和列输出信号。在另一个实施例中，行复位信号和行使能信号跨越在VCF像素传感器阵列中的相邻行之间共享的行发送。本发明还提供了具有共享行复位，行使能，参考电压和列输出线以及VCF像素传感器的VCF像素传感器的优化布局，其中源跟随器电压，源跟随器放大器电压和行使能信号都共享共同的一行。这些组合线实施例可以与单个列输出线以及两个行使能线一起使用。实施例也可以在没有行使能晶体管的VCF像素传感器中实现。

4. 发明授权

US06882367B1 High-sensitivity storage pixel sensor having auto-exposure detection 有权
标题翻译：具有自动曝光检测功能的高灵敏度存储像素传感器
公开(公告)号：US06882367B1
公开(公告)日：2005-04-19
申请号：US09515807
申请日：2000-02-29
申请人： Richard B. Merrill , Richard M. Turner , Milton B. Dong , Richard F. Lyon
发明人： Richard B. Merrill , Richard M. Turner , Milton B. Dong , Richard F. Lyon
IPC分类号： H04N5/351 , H04N5/3745 , H04N5/335 , H01L27/00
CPC分类号： H04N5/351 , H04N5/2351 , H04N5/3745
摘要： A storage pixel sensor disposed on a semiconductor substrate comprises a photodiode having a first terminal coupled to a first potential and a second terminal. A barrier transistor has a first terminal coupled to the second terminal of the photodiode, a second terminal and a control gate coupled to a barrier set voltage. A reset transistor has a first terminal coupled to the second terminal of the barrier transistor, a second terminal coupled to a reset reference potential that reverse biases the photodiode, and a control gate coupled to a source of a RESET signal. A photocharge integration node is coupled to said second terminal of said barrier transistor. The photocharge integration node comprises the control gate of a first source-follower transistor. The first source-follower transistor is coupled to a source of bias current and has an output. A capacitive storage node is coupled to the output of the first source-follower transistor and comprises the control gate of a second source-follower transistor having an output. An exposure transistor is coupled between the output of the first source-follower transistor and a global current-summing node and has a control gate coupled to a saturation level voltage.
摘要翻译：设置在半导体衬底上的存储像素传感器包括具有耦合到第一电位的第一端子和第二端子的光电二极管。阻挡晶体管具有耦合到光电二极管的第二端子的第一端子，耦合到栅极设置电压的第二端子和控制栅极。复位晶体管具有耦合到势垒晶体管的第二端子的第一端子，耦合到反向偏置光电二极管的复位参考电位的第二端子，以及耦合到RESET信号源的控制栅极。光电荷积分节点耦合到所述阻挡晶体管的所述第二端子。光电荷积分节点包括第一源极 - 跟随器晶体管的控制栅极。第一源极跟随器晶体管耦合到偏置电流源并具有输出。电容存储节点耦合到第一源跟随器晶体管的输出，并且包括具有输出的第二源极 - 跟随器晶体管的控制栅极。曝光晶体管耦合在第一源极 - 跟随器晶体管的输出端和总计电流求和节点之间，并具有耦合到饱和电平电压的控制栅极。

5. 发明授权

US06833871B1 Exposure control in electronic cameras by detecting overflow from active pixels 有权
标题翻译：通过检测有源像素的溢出来在电子照相机中进行曝光控制
公开(公告)号：US06833871B1
公开(公告)日：2004-12-21
申请号：US09872070
申请日：2001-07-16
申请人： Richard B. Merrill , Carver A. Mead , Richard F. Lyon
发明人： Richard B. Merrill , Carver A. Mead , Richard F. Lyon
IPC分类号： H04N314
CPC分类号： H04N5/353 , H04N5/35572 , H04N5/3559 , H04N5/3594 , H04N5/361 , H04N5/37452
摘要： A method for controlling the exposure of an active pixel array electronic still camera includes the steps of: integrating photocurrent in each pixel during an integration time period; collecting overflow charge from all pixels in the array during the integration time period; developing an overflow signal as a function of the overflow charge; and terminating the integration time period when the overflow signal exceeds a preset threshold level selected to represent a desired reference exposure level. Apparatus for performing the method of the present invention includes circuitry for integrating photocurrent in each pixel during a integration time period; circuitry for diverting and detecting overflow charge from all pixels in the array during the integration time period; circuitry for developing an overflow signal as a function of the overflow charge; and circuitry for terminating said integration time period when the overflow signal exceeds a preset threshold level selected to represent a desired reference exposure level.
摘要翻译：一种用于控制有源像素阵列电子静态照相机的曝光的方法包括以下步骤：在积分时间段内对每个像素中的光电流进行积分; 在积分时间段期间从阵列中的所有像素收集溢出电荷; 产生作为溢流电荷的函数的溢出信号; 并且当溢出信号超过所选择的预设阈值水平以表示期望的参考曝光水平时终止积分时间段。用于执行本发明的方法的装置包括用于在积分时间段期间在每个像素中积分光电流的电路; 用于在积分时间段期间转移和检测阵列中所有像素的溢出电荷的电路; 作为溢出电荷的函数产生溢出信号的电路; 以及用于当溢出信号超过被选择以表示期望的参考曝光水平的预设阈值电平时终止所述积分时间段的电路。

6. 发明授权

US06741283B1 Intra-pixel frame storage element, array, and electronic shutter method suitable for electronic still camera applications 有权
标题翻译：适用于电子静物照相机应用的像素内像素帧存储元件，阵列和电子快门方法
公开(公告)号：US06741283B1
公开(公告)日：2004-05-25
申请号：US09724393
申请日：2000-11-28
申请人： Richard B. Merrill , Richard M. Turner , Carver A. Mead , Richard F. Lyon
发明人： Richard B. Merrill , Richard M. Turner , Carver A. Mead , Richard F. Lyon
IPC分类号： H04N314
CPC分类号： H04N5/353 , H01L27/14609 , H01L27/14623 , H01L27/14643 , H04N5/374 , H04N5/37452
摘要： A storage pixel sensor disposed on a semiconductor substrate comprises a capacitive storage element having a first terminal connected to a fixed potential and a second terminal. A photodiode has an anode connected to a first potential and a cathode. A semiconductor reset switch has a first terminal connected to the cathode and a second terminal connected to a reset potential. A semiconductor transfer switch has a first terminal connected to the cathode and a second terminal connected to the second terminal of the capacitive storage element. A semiconductor amplifier has an input connected to the capacitive storage element and an output. The semiconductor reset switch and the semiconductor transfer switch each have a control element connected to a control circuit for selectively activating the semiconductor reset switch and the semiconductor transfer switch. A light shield is disposed over portions of the semiconductor substrate comprising a circuit node including the second terminal of the semiconductor transfer switch, the second terminal of the capacitive storage element and the input of the semiconductor amplifier and to prevent substantially all photons from entering the circuit node. Structures are present for preventing substantially all minority carriers generated in the semiconductor substrate from entering the circuit node. A plurality of storage pixel sensors are disposed in an array.
摘要翻译：设置在半导体衬底上的存储像素传感器包括具有连接到固定电位的第一端子和第二端子的电容性存储元件。光电二极管具有连接到第一电位和阴极的阳极。半导体复位开关具有连接到阴极的第一端子和连接到复位电位的第二端子。半导体转移开关具有连接到阴极的第一端子和连接到电容性存储元件的第二端子的第二端子。半导体放大器具有连接到电容性存储元件的输入端和输出端。半导体复位开关和半导体转移开关各自具有连接到用于选择性地激活半导体复位开关和半导体转移开关的控制电路的控制元件。光屏蔽设置在半导体衬底的包括电路节点的部分上的部分上，该电路节点包括半导体转移开关的第二端子，电容性存储元件的第二端子和半导体放大器的输入端，并且基本上防止所有的光子进入电路节点。存在用于防止在半导体衬底中产生的基本上所有少数载流子进入电路节点的结构。多个存储像素传感器被布置成阵列。

7. 发明授权

US06636261B1 Driven capacitor storage pixel sensor and array 有权
标题翻译：驱动电容器存储像素传感器和阵列
公开(公告)号：US06636261B1
公开(公告)日：2003-10-21
申请号：US09493855
申请日：2000-01-28
申请人： J. Orion Pritchard , Richard B. Merrill , Richard F. Lyon
发明人： J. Orion Pritchard , Richard B. Merrill , Richard F. Lyon
IPC分类号： H04N5335
CPC分类号： H04N5/37452
摘要： A storage pixel sensor comprises a photosensor selectively connectable to a reset potential; a switched buffer amplifier having a control terminal coupled to said photosensor, a first terminal connected to a source of a transfer signal, and a second terminal; a storage capacitor coupled to said second terminal of said switched buffer amplifier; and an amplifier coupled to said storage capacitor.
摘要翻译：存储像素传感器包括可选择性地连接到复位电位的光传感器; 开关缓冲放大器，其具有耦合到所述光传感器的控制端子，连接到传送信号源的第一端子和第二端子; 耦合到所述开关缓冲放大器的所述第二端的存储电容器; 以及耦合到所述存储电容器的放大器。

8. 发明授权

US06452633B1 Exposure control in electronic cameras by detecting overflow from active pixels 失效
标题翻译：通过检测有源像素的溢出来在电子照相机中进行曝光控制
公开(公告)号：US06452633B1
公开(公告)日：2002-09-17
申请号：US09031333
申请日：1998-02-26
申请人： Richard B. Merrill , Carver A. Mead , Richard F. Lyon
发明人： Richard B. Merrill , Carver A. Mead , Richard F. Lyon
IPC分类号： H01L27148
CPC分类号： H04N5/353 , H04N5/35572 , H04N5/3559 , H04N5/3594 , H04N5/361 , H04N5/37452
摘要： A method for controlling the exposure of an active pixel array electronic still camera includes the steps of: integrating photocurrent in each pixel during an integration time period; collecting overflow charge from all pixels in the array during the integration time period; developing an overflow signal as a function of the overflow charge; and terminating the integration time period when the overflow signal exceeds a preset threshold level selected to represent a desired reference exposure level. Apparatus for performing the method of the present invention includes circuitry for integrating photocurrent in each pixel during a integration time period; circuitry for diverting and detecting overflow charge from all pixels in the array during the integration time period; circuitry for developing an overflow signal as a function of the overflow charge; and circuitry for terminating said integration time period when the overflow signal exceeds a preset threshold level selected to represent a desired reference exposure level.
摘要翻译：一种用于控制有源像素阵列电子静态照相机的曝光的方法包括以下步骤：在积分时间段内对每个像素中的光电流进行积分; 在积分时间段期间从阵列中的所有像素收集溢出电荷; 产生作为溢流电荷的函数的溢出信号; 并且当溢出信号超过所选择的预设阈值水平以表示期望的参考曝光水平时终止积分时间段。用于执行本发明的方法的装置包括用于在积分时间段期间在每个像素中积分光电流的电路; 用于在积分时间段期间转移和检测阵列中所有像素的溢出电荷的电路; 作为溢出电荷的函数产生溢出信号的电路; 以及用于当溢出信号超过被选择以表示期望的参考曝光水平的预设阈值电平时终止所述积分时间段的电路。

9. 发明授权

US6069376A Intra-pixel frame storage element, array, and electronic shutter method including speed switch suitable for electronic still camera applications 失效
标题翻译：像素内帧存储元件，阵列和电子快门方法，包括适用于电子静态照相机应用的速度开关
公开(公告)号：US6069376A
公开(公告)日：2000-05-30
申请号：US48921
申请日：1998-03-26
申请人： Richard B. Merrill
发明人： Richard B. Merrill
IPC分类号： H01L27/146 , H04N5/353 , H04N5/374 , H04N5/3745 , H01L31/062 , H01L31/113
CPC分类号： H04N5/353 , H01L27/14609 , H01L27/14623 , H04N5/37452 , H04N5/374
摘要： A storage pixel sensor disposed on a semiconductor substrate comprises a MOS capacitor storage element having a diffusion terminal and a gate terminal. A speed node is connected to the diffusion terminal and biased at either a first control potential or a second control potential, the first potential selected to keep the MOS capacitor in a state of inversion, the second potential selected to keep the MOS capacitor in a state of depletion. A photodiode has an anode connected to a reference potential and a cathode. A semiconductor reset switch has a first terminal connected to the cathode and a second terminal connected to a reset reference potential. A semiconductor transfer switch has a first terminal connected to the cathode and a second terminal connected to the gate terminal of the capacitive storage element. A semiconductor amplifier has an input connected to the gate terminal of the capacitive storage element and an output. The semiconductor reset switch and the semiconductor transfer switch each have a control element connected to a control circuit for selectively activating the semiconductor reset switch and the semiconductor transfer switch. A light shield is disposed over a portion of the semiconductor substrate including the second terminal of the semiconductor transfer switch to prevent substantially all photons from entering the portion of the semiconductor substrate. Structures are present for preventing substantially all minority carriers generated in the semiconductor substrate from entering the portion of the semiconductor substrate. A plurality of storage pixel sensors are disposed in an array.
摘要翻译：设置在半导体衬底上的存储像素传感器包括具有扩散端子和栅极端子的MOS电容器存储元件。速度节点连接到扩散端并被偏置在第一控制电位或第二控制电位，所选择的第一电位用于保持MOS电容处于反相状态，所选择的第二电位使MOS电容保持在一个状态的消耗。光电二极管具有连接到参考电位的阳极和阴极。半导体复位开关具有连接到阴极的第一端子和连接到复位参考电位的第二端子。半导体转移开关具有连接到阴极的第一端子和连接到电容性存储元件的栅极端子的第二端子。半导体放大器具有连接到电容性存储元件的栅极端子的输入端和输出端。半导体复位开关和半导体转移开关各自具有连接到用于选择性地激活半导体复位开关和半导体转移开关的控制电路的控制元件。在包括半导体转移开关的第二端子的半导体衬底的一部分上设置有光屏蔽，以防止基本上所有的光子进入半导体衬底的部分。存在用于防止在半导体衬底中产生的基本上所有少数载流子进入半导体衬底部分的结构。多个存储像素传感器被布置成阵列。

10. 发明授权

US5786617A High voltage charge pump using low voltage type transistors 失效
标题翻译：高压电荷泵采用低压型晶体管
公开(公告)号：US5786617A
公开(公告)日：1998-07-28
申请号：US556295
申请日：1995-10-05
申请人： Richard B. Merrill , Whu-ming Young
发明人： Richard B. Merrill , Whu-ming Young
IPC分类号： H01L27/02 , H01L27/092 , H01L29/08 , H01L29/10 , H01L29/78 , H02M3/07
CPC分类号： H01L29/0847 , H01L27/0218 , H01L27/0222 , H01L27/092 , H01L27/0928 , H01L29/1083 , H01L29/1087 , H01L29/7835 , H02M3/07
摘要： An integrated circuit includes an N isolation buried layer underlying high density and low voltage type P channel and N channel transistors to define islands of arbitrary voltage on the substrate. Thus such transistors, which otherwise are capable only of low voltage operation, become capable of operating at high voltage relative to the substrate. This allows integration, on a single chip, of high voltage circuit elements with low voltage and high density transistors all formed by the same fabrication process sequence. In one example this allows creation of an 18 volt range charge pump using a CMOS process which normally provides only 3 volt operating range transistors. This then allows integration on a single integrated circuit chip of a complex digital logic function such as a UART (universal asynchronous receiver and transmitter) with a high voltage function such as an RS-232 interface, including integrated capacitors for the RS-232 interface charge pump.
摘要翻译：集成电路包括在高密度和低电压型P沟道下面的N隔离掩埋层和N沟道晶体管，以在衬底上限定任意电压的岛。因此，否则仅能够进行低电压操作的这种晶体管能够相对于衬底在高电压下工作。这允许在单个芯片上集成由具有低电压和高密度晶体管的高压电路元件，全部由相同的制造工艺顺序形成。在一个示例中，这允许使用通常仅提供3伏工作范围晶体管的CMOS工艺来创建18伏范围的电荷泵。这样就可以集成在具有高电压功能的UART（通用异步接收器和发送器）等复杂数字逻辑功能的单一集成电路芯片上，如RS-232接口，包括用于RS-232接口电荷的集成电容泵。

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