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1. 发明申请

US20170117024A1 BIT LINE CHARGING FOR A DEVICE 有权
公开(公告)号：US20170117024A1
公开(公告)日：2017-04-27
申请号：US14924498
申请日：2015-10-27
申请人： SANDISK TECHNOLOGIES INC.
发明人： Anirudh Amarnath , Tai-Yuan Tseng
IPC分类号： G11C7/12
CPC分类号： G11C7/12 , G11C7/02 , G11C11/5628 , G11C16/10 , G11C16/12 , G11C16/24
摘要： An apparatus includes a first bit line coupled to a first storage element and a second bit line coupled to a second storage element. A first bit line charging circuit is coupled to the first bit line and is configured to charge the first bit line to a first bias voltage of multiple bias voltages based on a first programming state. A second bit line charging circuit is coupled to the second bit line and is configured to charge the second bit line to a second bias voltage of the multiple bias voltages based on a second programming state. The second programming state is different than the first programming state.

2. 发明申请

US20160372205A1 SENSE AMPLIFIER DESIGN FOR RAMP SENSING 有权
标题翻译：感测放大器设计用于RAMP感应
公开(公告)号：US20160372205A1
公开(公告)日：2016-12-22
申请号：US14924118
申请日：2015-10-27
申请人： SANDISK TECHNOLOGIES INC.
发明人： Anirudh Amarnath , Tai-Yuan Tseng
IPC分类号： G11C16/26 , G11C16/30
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/32
摘要： Methods and systems for sensing memory cells using a sense amplifier that can support both ramp sensing and conventional sensing are described. With ramp sensing, a word line of a memory array may be ramped up linearly and a sensing operation may be performed by the sense amplifier while the word line is continuously being ramped up. In this case, during the sensing operation, the sense amplifier may sense a bit line of the memory array connected to a memory cell while the word line is ramping up and then transfer the result into a data latch. In contrast, with conventional sensing, a bit line of the memory array may be first precharged to a particular voltage level (e.g., a read voltage level) and then sensed while the word line is held at the particular voltage level.
摘要翻译：描述了使用可支持斜坡感测和常规感测的读出放大器来感测存储单元的方法和系统。通过斜坡感测，存储器阵列的字线可以线性地斜坡上升，并且当字线连续地上升时，感测放大器可以执行感测操作。在这种情况下，在感测操作期间，读出放大器可以感测连接到存储器单元的存储器阵列的位线，同时字线正在上升，然后将结果传送到数据锁存器。相比之下，对于常规感测，存储器阵列的位线可以首先被预充电到特定电压电平（例如，读取电压电平），然后在字线保持在特定电压电平的同时被感测。

3. 发明授权

US09543030B1 Sense amplifier design for ramp sensing 有权
标题翻译：感应放大器设计用于斜坡感测
公开(公告)号：US09543030B1
公开(公告)日：2017-01-10
申请号：US14924118
申请日：2015-10-27
申请人： SANDISK TECHNOLOGIES INC.
发明人： Anirudh Amarnath , Tai-Yuan Tseng
IPC分类号： G11C16/06 , G11C16/26 , G11C16/30
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/32
摘要： Methods and systems for sensing memory cells using a sense amplifier that can support both ramp sensing and conventional sensing are described. With ramp sensing, a word line of a memory array may be ramped up linearly and a sensing operation may be performed by the sense amplifier while the word line is continuously being ramped up. In this case, during the sensing operation, the sense amplifier may sense a bit line of the memory array connected to a memory cell while the word line is ramping up and then transfer the result into a data latch. In contrast, with conventional sensing, a bit line of the memory array may be first precharged to a particular voltage level (e.g., a read voltage level) and then sensed while the word line is held at the particular voltage level.
摘要翻译：描述了使用可支持斜坡感测和常规感测的读出放大器来感测存储单元的方法和系统。通过斜坡感测，存储器阵列的字线可以线性地斜坡上升，并且当字线连续地上升时，感测放大器可以执行感测操作。在这种情况下，在感测操作期间，读出放大器可以感测连接到存储器单元的存储器阵列的位线，同时字线正在上升，然后将结果传送到数据锁存器。相比之下，对于常规感测，存储器阵列的位线可以首先被预充电到特定电压电平（例如，读取电压电平），然后在字线保持在特定电压电平的同时被感测。

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