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1. 发明申请

US20130265339A1 CONTROL DEVICE, DISPLAY DEVICE, ELECTRONIC APPARATUS AND CONTROLLING METHOD 有权
标题翻译：控制装置，显示装置，电子装置和控制方法
公开(公告)号：US20130265339A1
公开(公告)日：2013-10-10
申请号：US13853569
申请日：2013-03-29
申请人： SEIKO EPSON CORPORATION
发明人： Toshimichi Yamada
IPC分类号： G09G3/34
CPC分类号： G09G3/344 , G09G2300/0842 , G09G2320/0204 , G09G2320/0285
摘要： An application control changes a first image displayed with a plurality of pixels composing the entirety or a part of a display section to an image in the first gray level displayed with the plurality of pixels, and thereafter display a second image displayed with the plurality of pixels. Also, the application control device controls an application device such that the numbers of application of the first voltage and the second voltage to each of the plurality of pixels are equal to each other from a state in which each of the plurality of pixels lastly assumes the first gray level before the first image is displayed until a state in which each of the plurality of pixels first assumes the first gray level after the first image is displayed.
摘要翻译：应用程序控制将构成整个或一部分显示部分的多个像素显示的第一图像改变为与多个像素显示的第一灰度级中的图像，然后显示与多个像素一起显示的第二图像。此外，应用控制装置控制应用装置，使得对于多个像素中的每一个的第一电压和第二电压的施加次数从多个像素中的每一个最后呈现为相同的状态彼此相等在显示第一图像之前的第一灰度级，直到显示第一图像之后的多个像素中的每一个首先呈现第一灰度级的状态。

2. 发明授权

US11368332B2 Circuit device, electronic device, and cable harness 有权
公开(公告)号：US11368332B2
公开(公告)日：2022-06-21
申请号：US15876973
申请日：2018-01-22
申请人： SEIKO EPSON CORPORATION
发明人： Yoshiyuki Kamihara , Ryuichi Kagaya , Toshimichi Yamada
IPC分类号： H04L12/40 , G01R31/00 , G01R31/67 , G06F1/06 , G06F11/00 , G06F13/40 , H03L7/16 , H04L12/64 , G06F11/30
摘要： A circuit device includes: a first physical layer circuit to which a first bus compliant with a USB standard is connected; a second physical layer circuit to which a second bus compliant with the USB standard is connected; a processing circuit that performs transfer processing in which a packet received from the first bus via the first physical layer circuit is transferred to the second bus via the second physical layer circuit, and a packet received from the second bus via the second physical layer circuit is transferred to the first bus via the first physical layer circuit; a bus monitor circuit that performs a monitor operation with respect to the first and second buses; and a bus switch circuit that switches on or off a connection between the first bus and the second bus based on a monitor result from the bus monitor circuit.

3. 发明授权

US10593290B2 Driving circuit and electronic device 有权
公开(公告)号：US10593290B2
公开(公告)日：2020-03-17
申请号：US15928241
申请日：2018-03-22
申请人： SEIKO EPSON CORPORATION
发明人： Toshimichi Yamada
IPC分类号： G09G5/02 , H01L27/12 , G02F1/1362 , G02F1/133 , G02F1/1368 , G09G3/36 , G09G3/20 , H01L27/32
摘要： This driving circuit includes a data line driving circuit that supplies a gray-scale signal to a plurality of data lines, a regulator that stabilizes a supplied power supply voltage and supplies the stabilized power supply voltage to a smoothing capacitor and the data line driving circuit, a switching circuit that switches the connection state of a plurality of circuit elements that constitute the regulator, and a control circuit that controls the switching circuit. The control circuit controls the switching circuit so as to set voltage stabilization capability of the regulator to a predetermined level when the gray-scale signal is supplied to pixel elements, and controls the switching circuit so as to set the voltage stabilization capability of the regulator to a level lower than the predetermined level or to stop an operation of the regulator, when the gray-scale signal is not supplied to the pixel elements.

4. 发明授权

US10509756B2 Circuit device, electronic device, and cable harness 有权
公开(公告)号：US10509756B2
公开(公告)日：2019-12-17
申请号：US16367485
申请日：2019-03-28
申请人： SEIKO EPSON CORPORATION
发明人： Toshimichi Yamada
IPC分类号： G06F13/38 , G06F13/40 , G06F13/20 , G06F13/42 , B60R16/023 , B60R16/02
摘要： A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus that comply with a USB standard, on in a first period and off in a second period, and a processing circuit that performs, in the second period, processing for transferring packets on a transfer route that includes the first bus, the first and second physical layer circuits, and the second bus. When a host chirp K/J is detected on the first bus by the first physical layer circuit, the second physical layer circuit outputs a host chirp K/J to the second bus in the state where connection between the first bus and the second bus is switched off by the bus switch circuit.

5. 发明授权

US10419247B2 Transmission circuit, integrated circuit device and electronic device 有权
公开(公告)号：US10419247B2
公开(公告)日：2019-09-17
申请号：US16114550
申请日：2018-08-28
申请人： SEIKO EPSON CORPORATION
发明人： Yoshiyuki Kamihara , Toshimichi Yamada
IPC分类号： H04L25/02 , H03K19/0175 , H04L7/04 , G06F13/40 , H04L25/03
摘要： A transmission circuit includes a current output circuit that outputs a current to a first node, a first switch element provided between the first node and a first signal line, and a second switch element provided between the first node and a second signal line. When a transmission signal is at a first logic level, the first switch element is ON and the second switch element is OFF. When the transmission signal is at a second logic level, the first switch element is OFF and the second switch element is ON. The current output circuit outputs a second current in an n-bit period after the logic level of the transmission signal is inverted, and outputs a first current after the n-bit period.

6. 发明授权

US11030139B2 Circuit device, circuit device determination method, and electronic apparatus 有权
公开(公告)号：US11030139B2
公开(公告)日：2021-06-08
申请号：US16828022
申请日：2020-03-24
申请人： SEIKO EPSON CORPORATION
发明人： Kota Muto , Toshimichi Yamada
IPC分类号： G06F13/40 , H03K19/0175 , G06F13/42 , G06F13/38
摘要： A circuit device includes a control circuit configured to instruct, when a detection circuit detects that an amplitude level of a packet exceeds a disconnecting detection level, a packet output circuit to lower an amplitude level of a part or all of packets, and after the instruction, to determine that, when the detection circuit detects that an amplitude level of a packet again exceeds the disconnecting detection level, a USB device connected to a bus is disconnected.

7. 发明授权

US10958263B2 Drive control device, drive circuit, and vehicle 有权
公开(公告)号：US10958263B2
公开(公告)日：2021-03-23
申请号：US16813839
申请日：2020-03-10
申请人： SEIKO EPSON CORPORATION
发明人： Toshimichi Yamada , Tatsuro Shinmitsu , Kazuhiko Okawa , Hiroaki Nitta , Masahiro Hayashi
IPC分类号： H03K17/0812 , H03K17/00 , G05F1/56 , H03K17/0814
摘要： Provided is a drive control device including: a first output node coupled to a gate node of a high-side transistor; a second output node coupled to a drive node; a first transistor provided between a first power supply node and the first output node; and a current limiting circuit and a second transistor provided in series between the first output node and the second output node, in which the current limiting circuit limits a current from the drive node toward the first output node to a predetermined value. The current limiting circuit is, for example, a transistor having a direction opposite to that of the second transistor.

8. 发明授权

US11126582B2 Circuit device, determination method for circuit device, and electronic apparatus 有权
公开(公告)号：US11126582B2
公开(公告)日：2021-09-21
申请号：US16851250
申请日：2020-04-17
申请人： Seiko Epson Corporation
发明人： Kota Muto , Toshimichi Yamada
IPC分类号： G06F13/40 , G06F13/38 , G06F13/42 , H04L25/02
摘要： A circuit device includes a packet output circuit configured to amplify a current for a packet and output the packet to a USB-compliant bus, a detection circuit configured to detect whether an amplitude level of the packet transmitted to the bus has exceeded a disconnection detection level for a prescribed time period, a determination circuit configured to set a current for an EOP of an SOF packet output by the packet output circuit to lower than a current for a section other than the EOP, and when it is detected, by the detection circuit, that an amplitude level of the EOP has exceeded the disconnection detection level, determine that a device that was connected to the bus is disconnected.

9. 发明授权

US10326437B2 Circuit device and electronic apparatus 有权
公开(公告)号：US10326437B2
公开(公告)日：2019-06-18
申请号：US15969655
申请日：2018-05-02
申请人： SEIKO EPSON CORPORATION
发明人： Kota Muto , Toshimichi Yamada
IPC分类号： H03K17/16 , H03H11/28 , H04B1/00 , H04B1/40
摘要： A circuit device includes: a transmitting circuit that performs transmission of a signal by current-driving signal lines in a transmission period; a receiving circuit that receives a signal that a transmitting circuit of a communication partner has transmitted by current-driving the signal lines, in a reception period that is different from the transmission period; and terminating resistor circuits that can be connected to the signal lines, and whose resistance value in the transmission period is set to a value that is smaller than a resistance value in the reception period.

10. 发明授权

US09947256B2 Integrated circuit device, electronic apparatus, and control method for electrooptic panel 有权
公开(公告)号：US09947256B2
公开(公告)日：2018-04-17
申请号：US14737869
申请日：2015-06-12
申请人： SEIKO EPSON CORPORATION
发明人： Kota Muto , Toshimichi Yamada
IPC分类号： G09G3/34 , G09G3/04 , G09G5/18
CPC分类号： G09G3/04 , G09G3/344 , G09G5/18 , G09G2230/00 , G09G2310/08 , G09G2320/0276 , G09G2320/041 , G09G2370/08
摘要： An integrated circuit device includes: a timing information storage section that stores phase length information in correspondence with an index number; a waveform information storage section that stores waveform information related to a plurality of drive waveforms used in response to at least one display state; a timing control section that reads an index number included for each phase in the waveform information, reads phase length information corresponding to the index number from the timing information storage section, and sequentially generates a selection signal during a drive voltage application period corresponding to a plurality of phases; and a drive waveform selection section that selects a waveform value representing a drive voltage, out of a plurality of units of waveform information stored in the waveform information storage section, in accordance with the selection signal.

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