会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Turbo-product codes (TPC) with interleaving
    • 具有交错的涡轮产品代码(TPC)
    • US09300329B2
    • 2016-03-29
    • US14061600
    • 2013-10-23
    • SK hynix memory solutions inc.
    • Naveen KumarZheng WuJason BelloradoLingqi ZengMarcus Marrow
    • H03M13/29H03M13/53
    • H03M13/2918H03M13/2927H03M13/2963H03M13/2966
    • Decoding associated with a second error correction code and a first error correction code is performed. Ns first and second-corrected segments of data, first sets of parity information, and second sets of parity information are intersegment interleaved to obtain intersegment interleaved data, where the Ns segments of data, the Ns first sets of parity information, and the Ns second sets of parity information have had decoding associated with the first and the second error correction code performed on them (Ns is the number of segments interleaved together). Decoding associated with a third error correction code is performed on the intersegment interleaved data and interleaved parity information to obtain at least third-corrected interleaved data. The third-corrected interleaved data is de-interleaved.
    • 执行与第二纠错码和第一纠错码相关联的解码。 Ns个第一和第二校正的数据段,第一组奇偶校验信息和第二组奇偶校验信息被进行交插,以获得段间交织数据,其中Ns个数据段,N个第一组奇偶校验信息和Ns秒 奇偶校验信息组具有与对它们执行的第一和第二纠错码相关联的解码(Ns是交织在一起的段数)。 对段间交错数据和交错奇偶校验信息执行与第三纠错码相关联的解码,以获得至少第三校正交错数据。 第三校正的交错数据被解交织。
    • 8. 发明授权
    • Solid state device coding architecture for chipkill and endurance improvement
    • 固态设备编码架构,用于芯片杀戮和耐力改进
    • US09170881B2
    • 2015-10-27
    • US14266702
    • 2014-04-30
    • SK hynix memory solutions inc.
    • Marcus MarrowRajiv Agarwal
    • H03M13/00G06F11/10H03M13/29H03M13/11H03M13/15
    • G06F11/1068G06F11/1012H03M13/1102H03M13/1515H03M13/152H03M13/2906H03M13/2927H03M13/2948
    • A first decoder performs decoding on each data set in a first plurality of data sets using a first code; each data set in the first plurality is stored on a different chip. It is determined if the first decoding is successful; if not, a second decoder performs a second decoding on each data set in a second plurality of data sets using a second code; each data set in the second plurality includes at least some data, after the first decoding using the first code, from each data set in the first plurality. The first decoder performs a third decoding on each data set in the first plurality using the first code, where each data set in the first plurality includes at least some data, after the second decoding using the second code, from each data set in the second plurality.
    • 第一解码器使用第一码对第一多个数据集中的每个数据集进行解码; 第一组中的每个数据集存储在不同的芯片上。 确定第一解码是否成功; 如果不是,第二解码器使用第二代码对第二多个数据集中的每个数据集执行第二解码; 在第二多个数据集中的每个数据集包括来自第一多个数据集中的每个数据集之后的至少一些数据,在使用第一代码的第一次解码之后。 第一解码器使用第一代码对第一多个中的每个数据集执行第三解码,其中在第二复制中的每个数据集之后,在第一多个数据集中的每个数据集包括至少一些数据,在使用第二代码的第二次解码之后, 复数。