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1. 发明授权

US08699559B2 Decision feedback equalization scheme with minimum correction delay 有权
标题翻译：具有最小校正延迟的判决反馈均衡方案
公开(公告)号：US08699559B2
公开(公告)日：2014-04-15
申请号：US13772872
申请日：2013-02-21
申请人： STMicroelectronics S.R.L.
发明人： Simone Erba , Massimo Pozzoni
IPC分类号： H04B1/38
CPC分类号： H04L25/03885 , H04L25/03063 , H04L25/0307 , H04L2025/03356 , H04L2025/03579
摘要： A decision feedback equalizer includes a correction circuit to correct a sampled value of an incoming bit based on intersymbol interference of at least one preceding bit, and to generate a received bit. The correction circuit includes a first multiplexer and a first pair of latches coupled thereto. The first multiplexer is controlled by a clock signal to generate a digital level representative of a sign of a first correction coefficient to be subtracted from the sampled value of the incoming bit for deleting the intersymbol interference. The first pair of latches receives as input the received bit and is clocked in phase opposition by the clock signal to generate respective latched replicas of the received bit during respective active phases of the clock signal. The respective latched replicas are input to the first multiplexer.
摘要翻译：判决反馈均衡器包括校正电路，用于基于至少一个先前位的符号间干扰来校正输入位的采样值，并产生接收位。校正电路包括第一多路复用器和耦合到其上的第一对锁存器。第一多路复用器由时钟信号控制，以产生代表第一校正系数的符号的数字电平，以便从用于删除符号间干扰的输入位的采样值中减去。第一对锁存器作为输入接收接收的位，并且通过时钟信号相位对准时钟，以在时钟信号的相应有效相位期间产生接收位的相应锁存副本。相应的锁存副本被输入到第一多路复用器。

2. 发明授权

US09444438B2 Frequency doubler and related method of generating an oscillating voltage 有权
标题翻译：产生振荡电压的倍频器及相关方法
公开(公告)号：US09444438B2
公开(公告)日：2016-09-13
申请号：US14298559
申请日：2014-06-06
申请人： STMicroelectronics S.r.l.
发明人： Emanuele Depaoli , Giovanni Steffan , Massimo Pozzoni , Simone Erba , Enrico Monaco
IPC分类号： H03B19/00 , H03K5/00 , H03B5/12 , H03B25/00
CPC分类号： H03K5/00006 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03B25/00 , H03B2200/0074
摘要： A frequency doubling device suitable to generate an output terminal voltage oscillating at a differential frequency double the frequency of the input differential voltage, includes a first differential pair of P-type transistors and a second differential pair of N-type transistors controlled by the differential input voltage, as well as an LC oscillator including a LC resonant dipole through which the absorbed current is forced by two differential pairs of transistors.
摘要翻译：适用于产生以差分频率振荡输入差分电压的频率的输出端子电压的倍频装置包括由差分输入端控制的P型晶体管的第一差分对和N型晶体管的第二差分对，电压以及包括LC谐振偶极子的LC振荡器，吸收的电流通过两个差分对的晶体管被迫使。

3. 发明授权

US09223153B2 Integrated driver and related method 有权
标题翻译：集成驱动及相关方法
公开(公告)号：US09223153B2
公开(公告)日：2015-12-29
申请号：US14788724
申请日：2015-06-30
申请人： STMICROELECTRONICS S.R.L.
发明人： Maurizio Zuffada , Massimo Pozzoni , Angelo Contini
IPC分类号： G02B6/00 , G02F1/01 , H03F1/22 , H03F3/217 , H03F3/24 , H03F3/30 , H03F3/45 , H03K19/0185 , H04B10/532 , H04B10/61 , G02F1/03 , G02F1/225 , G02B6/122 , G02B6/12 , G02F1/21
CPC分类号： G02F1/0121 , G02B6/1225 , G02B2006/12142 , G02B2006/12145 , G02F1/0327 , G02F1/225 , G02F2001/212 , H03F1/22 , H03F1/223 , H03F3/2171 , H03F3/245 , H03F3/3001 , H03F3/45076 , H03F3/45179 , H03F2200/45 , H03F2200/516 , H03F2203/30099 , H03F2203/30132 , H03K19/018528 , H04B10/532 , H04B10/616
摘要： A driver circuit may include a first node, and a first circuit to generate on the first node an inverted replica of an input signal during driver switching between a first supply voltage and a first reference voltage, the inverted replica having a threshold voltage value based upon a second reference voltage greater than the first supply voltage. The driver circuit may include a cascode stage to be controlled by the second reference voltage and to be coupled between a second supply voltage and the first node, a delay circuit to generate a delayed replica of the input signal, an amplifier, and a switching network to couple the control terminal of the active load transistor to one of the first reference voltage and the first node based upon the input signal.
摘要翻译：驱动器电路可以包括第一节点和第一电路，用于在第一电源电压和第一参考电压之间的驱动器切换期间在第一节点上产生输入信号的反相副本，反相副本具有基于大于第一电源电压的第二参考电压。驱动器电路可以包括由第二参考电压控制并耦合在第二电源电压和第一节点之间的共源共栅级，用于产生输入信号的延迟复制品的延迟电路，放大器和开关网络基于输入信号将有源负载晶体管的控制端子耦合到第一参考电压和第一节点之一。

4. 发明申请

US20140361815A1 FREQUENCY DOUBLER AND RELATED METHOD OF GENERATING AN OSCILLATING VOLTAGE 有权
标题翻译：频率二极管及相关方法产生振荡电压
公开(公告)号：US20140361815A1
公开(公告)日：2014-12-11
申请号：US14298559
申请日：2014-06-06
申请人： STMicroelectronics S.r.l.
发明人： Emanuele Depaoli , Giovanni Steffan , Massimo Pozzoni , Simone Erba , Enrico Monaco
IPC分类号： H03K5/00
CPC分类号： H03K5/00006 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03B25/00 , H03B2200/0074
摘要： A frequency doubling device suitable to generate an output terminal voltage oscillating at a differential frequency double the frequency of the input differential voltage, includes a first differential pair of P-type transistors and a second differential pair of N-type transistors controlled by the differential input voltage, as well as an LC oscillator including a LC resonant dipole through which the absorbed current is forced by two differential pairs of transistors.
摘要翻译：适用于产生以差分频率振荡输入差分电压的频率的输出端子电压的倍频装置包括由差分输入端控制的P型晶体管的第一差分对和N型晶体管的第二差分对，电压以及包括LC谐振偶极子的LC振荡器，吸收的电流通过两个差分对的晶体管被迫使。

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