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1. 发明授权

US09099496B2 Method of forming an active area with floating gate negative offset profile in FG NAND memory 有权
标题翻译：在FG NAND存储器中形成具有浮动栅负偏移分布的有源区的方法
公开(公告)号：US09099496B2
公开(公告)日：2015-08-04
申请号：US14472611
申请日：2014-08-29
申请人： SANDISK TECHNOLOGIES INC.
发明人： Ming Tian , Jayavel Pachamuthu , Atsushi Suyama , James Kai , Raghuveer S. Makala , Yao-Sheng Lee , Johann Alsmeier , Henry Chien , Masanori Terahara , Hirofumi Watatani
IPC分类号： H01L21/336 , H01L29/66 , H01L29/788 , H01L29/792 , H01L27/115
CPC分类号： H01L29/66825 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L29/66833 , H01L29/7889 , H01L29/7926
摘要： A stack can be patterned by a first etch process to form an opening defining sidewall surfaces of a patterned material stack. A masking layer can be non-conformally deposited on sidewalls of an upper portion of the patterned material stack, while not being deposited on sidewalls of a lower portion of the patterned material stack. The sidewalls of a lower portion of the opening can be laterally recessed employing a second etch process, which can include an isotropic etch component. The sidewalls of the upper portion of the opening can protrude inward toward the opening to form an overhang over the sidewalls of the lower portion of the opening. The overhang can be employed to form useful structures such as an negative offset profile in a floating gate device or vertically aligned control gate electrodes for vertical memory devices.
摘要翻译：可以通过第一蚀刻工艺对叠层进行构图，以形成限定图案化材料堆叠的侧壁表面的开口。掩模层可以非均匀地沉积在图案化材料堆叠的上部的侧壁上，同时不沉积在图案化材料堆叠的下部的侧壁上。开口的下部的侧壁可以使用第二蚀刻工艺横向凹入，其可以包括各向同性蚀刻部件。开口的上部的侧壁可以朝向开口向内突出，以在开口的下部的侧壁上形成伸出。可以使用突出端形成有用的结构，例如浮动栅极器件中的负偏移轮廓或用于垂直存储器件的垂直对准的控制栅电极。

2. 发明授权

US09548313B2 Method of making a monolithic three dimensional NAND string using a select gate etch stop layer 有权
标题翻译：使用选择栅极蚀刻停止层制造单片三维NAND串的方法
公开(公告)号：US09548313B2
公开(公告)日：2017-01-17
申请号：US14725466
申请日：2015-05-29
申请人： SanDisk Technologies, Inc.
发明人： Shinsuke Yada , Shigehiro Fujino , Hajime Kimura , Masanori Terahara , Ryoichi Honma , Hiroyuki Ogawa , Ryousuke Itou
IPC分类号： H01L21/336 , H01L27/115
CPC分类号： H01L27/11556 , H01L27/11524 , H01L27/1157 , H01L27/11582
摘要： A method of making a monolithic three dimensional NAND string includes forming a select gate layer of a third material over a major surface of a substrate, forming a stack of alternating first material and second material layers over the select gate layer, where the first material, the second material and the third material are different from each other, and etching the stack using a first etch chemistry to form at least one opening in the stack at least to the select gate layer, such that the select gate layer acts as an etch stop layer during the step of etching.
摘要翻译：制造单片三维NAND串的方法包括在衬底的主表面上形成第三材料的选择栅极层，在选择栅极层上形成交替的第一材料和第二材料层的堆叠，其中第一材料，所述第二材料和所述第三材料彼此不同，并且使用第一蚀刻化学法蚀刻所述堆叠，以在所述堆叠中至少形成至少一个所述选择栅极层的开口，使得所述选择栅极层用作蚀刻停止在蚀刻步骤期间。

3. 发明申请

US20140295636A1 SPACER PASSIVATION FOR HIGH ASPECT RATIO ETCHING OF MULTILAYER STACKS FOR THREE DIMENSIONAL NAND DEVICE 有权
标题翻译：用于三维NAND器件的多层堆叠的高比例蚀刻的间隔钝化
公开(公告)号：US20140295636A1
公开(公告)日：2014-10-02
申请号：US14135931
申请日：2013-12-20
申请人： SanDisk Technologies, Inc.
发明人： Raghuveer S. Makala , Yao-Sheng Lee , Johann Alsmeier , Henry Chien , Masanori Terahara , Hirofumi Watatani
IPC分类号： H01L29/66 , H01L27/115
CPC分类号： H01L29/66833 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L29/66825 , H01L29/7889 , H01L29/7926
摘要： A method of making a semiconductor device includes forming a stack of alternating layers of a first material and a second material over a substrate, etching the stack to form at least one opening extending partially through the stack and forming a masking layer on a sidewall and bottom surface of the at least one opening. The method also includes removing the masking layer from the bottom surface of the at least one opening while leaving the masking layer on the sidewall of the at least one opening, and further etching the at least one opening to extend the at least one opening further through the stack while the masking layer remains on the sidewall of the at least one opening.
摘要翻译：制造半导体器件的方法包括在衬底上形成第一材料和第二材料的交替层的叠层，蚀刻叠层以形成部分延伸通过堆叠的至少一个开口，并在侧壁和底部形成掩蔽层至少一个开口的表面。该方法还包括从至少一个开口的底表面去除掩蔽层，同时将掩模层留在至少一个开口的侧壁上，并进一步蚀刻至少一个开口以将至少一个开口进一步延伸通过该掩模层保留在该至少一个开口的侧壁上。

4. 发明授权

US09437606B2 Method of making a three-dimensional memory array with etch stop 有权
标题翻译：制造具有蚀刻停止的三维存储阵列的方法
公开(公告)号：US09437606B2
公开(公告)日：2016-09-06
申请号：US13933236
申请日：2013-07-02
申请人： SanDisk Technologies, Inc.
发明人： Raghuveer S. Makala , Johann Alsmeier , Yao-Sheng Lee , Masanori Terahara , Hirofumi Watatani , Jayavel Pachamuthu
IPC分类号： H01L29/792 , H01L27/115 , H01L21/822 , H01L27/06
CPC分类号： H01L27/11582 , H01L21/8221 , H01L27/0688 , H01L27/1157
摘要： A method of making a semiconductor device including forming a sacrificial feature over a substrate, forming a plurality of etch through regions having an etch through material and an etch stop region having an etch stop material over the sacrificial feature, forming a stack of alternating layers of a first material and a second material over the plurality of the etch through regions and the plurality of the etch stop regions, etching the stack to form a plurality of openings through the stack and through the etch through regions to expose the sacrificial feature, such that the etch through material is etched preferentially compared to the first and the second materials of the stack, removing the sacrificial feature through the plurality of openings and etching the stack to form a slit trench up to or only partially through the etch stop region, such that the first and the second materials of the stack are etched preferentially compared to the etch stop material.
摘要翻译：一种制造半导体器件的方法，包括在衬底上形成牺牲特征，通过具有蚀刻穿过材料的区域和在所述牺牲特征上具有蚀刻停止材料的蚀刻停止区域形成多个蚀刻，形成交替层在所述多个蚀刻通过区域和所述多个蚀刻停止区域之上的第一材料和第二材料，蚀刻所述堆叠以形成穿过所述堆叠并穿过所述蚀刻通过区域以暴露所述牺牲特征的多个开口，使得与叠层的第一和第二材料相比，优先蚀刻蚀刻材料，通过多个开口去除牺牲特征并蚀刻叠层以形成直到或仅部分地穿过蚀刻停止区域的狭缝沟槽，使得与蚀刻停止材料相比，优先蚀刻叠层的第一和第二材料。

5. 发明授权

US09530788B2 Metallic etch stop layer in a three-dimensional memory structure 有权
标题翻译：金属蚀刻停止层在三维记忆结构中
公开(公告)号：US09530788B2
公开(公告)日：2016-12-27
申请号：US14659963
申请日：2015-03-17
申请人： SANDISK TECHNOLOGIES INC.
发明人： Tomohiro Oginoe , Ryoichi Honma , Masanori Terahara
IPC分类号： H01L27/115 , H01L29/792 , H01L23/522 , H01L29/51 , H01L29/49 , H01L29/788 , H01L29/16 , H01L29/423 , H01L21/768 , H01L21/28 , H01L29/66 , H01L23/528
CPC分类号： H01L27/11582 , H01L23/5226 , H01L23/528 , H01L27/11556 , H01L27/1157 , H01L27/11575 , H01L29/42332 , H01L29/66825 , H01L29/66833 , H01L29/7889 , H01L29/7926
摘要： A dielectric liner, a bottom conductive layer, and a stack of alternating layers including insulator layers and spacer material layers are sequentially formed over a substrate. A memory opening extending through the stack can be formed by an anisotropic etch process that employs the bottom conductive layer as an etch stop layer. The memory opening is extended downward by etching through the bottom conductive layer and the dielectric liner, while minimizing an overetch into the substrate. A memory stack structure can be formed in the memory opening. Subsequently, a backside contact trench can be formed through the stack employing the bottom conductive layer as an etch stop layer. The spacer material layers can be removed to form backside recesses, which are filled with a conductive material to form electrically conductive layers. The remaining portion of the bottom conductive layer can be employed as a source select gate electrode.
摘要翻译：电介质衬垫，底部导电层和包括绝缘体层和间隔物材料层的交替层的叠层依次形成在衬底上。延伸穿过堆叠的存储器开口可以通过使用底部导电层作为蚀刻停止层的各向异性蚀刻工艺形成。通过蚀刻穿过底部导电层和电介质衬垫向下延伸存储器开口，同时最小化进入衬底的过蚀刻。存储器堆叠结构可以形成在存储器开口中。随后，可以通过使用底部导电层作为蚀刻停止层的堆叠形成背面接触沟槽。间隔材料层可以被去除以形成背面凹槽，其中填充有导电材料以形成导电层。底部导电层的剩余部分可以用作源选择栅电极。

6. 发明授权

US09093480B2 Spacer passivation for high aspect ratio etching of multilayer stacks for three dimensional NAND device 有权
标题翻译：用于三维NAND器件的多层堆叠的高纵横比蚀刻的间隔钝化
公开(公告)号：US09093480B2
公开(公告)日：2015-07-28
申请号：US14135931
申请日：2013-12-20
申请人： SanDisk Technologies, Inc.
发明人： Raghuveer S. Makala , Yao-Sheng Lee , Johann Alsmeier , Henry Chien , Masanori Terahara , Hirofumi Watatani
IPC分类号： H01L21/336 , H01L29/66 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/66833 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L29/66825 , H01L29/7889 , H01L29/7926
摘要： A method of making a semiconductor device includes forming a stack of alternating layers of a first material and a second material over a substrate, etching the stack to form at least one opening extending partially through the stack and forming a masking layer on a sidewall and bottom surface of the at least one opening. The method also includes removing the masking layer from the bottom surface of the at least one opening while leaving the masking layer on the sidewall of the at least one opening, and further etching the at least one opening to extend the at least one opening further through the stack while the masking layer remains on the sidewall of the at least one opening.
摘要翻译：制造半导体器件的方法包括在衬底上形成第一材料和第二材料的交替层的叠层，蚀刻叠层以形成部分延伸通过堆叠的至少一个开口，并在侧壁和底部形成掩蔽层至少一个开口的表面。该方法还包括从至少一个开口的底表面去除掩蔽层，同时将掩模层留在至少一个开口的侧壁上，并进一步蚀刻至少一个开口以将至少一个开口进一步延伸通过该掩模层保留在该至少一个开口的侧壁上。

7. 发明申请

US20140367762A1 METHOD OF FORMING AN ACTIVE AREA WITH FLOATING GATE NEGATIVE OFFSET PROFILE IN FG NAND MEMORY 有权
标题翻译：在FG NAND存储器中形成具有浮动栅极负偏移轮廓的活动区域的方法
公开(公告)号：US20140367762A1
公开(公告)日：2014-12-18
申请号：US14472611
申请日：2014-08-29
申请人： SANDISK TECHNOLOGIES INC.
发明人： Ming Tian , Jayavel Pachamuthu , Atsushi Suyama , James Kai , Raghuveer S. Makala , Yao-Sheng Lee , Johann Alsmeier , Henry Chien , Masanori Terahara , Hirofumi Watatani
IPC分类号： H01L29/788 , H01L27/115 , H01L29/66
CPC分类号： H01L29/66825 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L29/66833 , H01L29/7889 , H01L29/7926
摘要： A stack can be patterned by a first etch process to form an opening defining sidewall surfaces of a patterned material stack. A masking layer can be non-conformally deposited on sidewalls of an upper portion of the patterned material stack, while not being deposited on sidewalls of a lower portion of the patterned material stack. The sidewalls of a lower portion of the opening can be laterally recessed employing a second etch process, which can include an isotropic etch component. The sidewalls of the upper portion of the opening can protrude inward toward the opening to form an overhang over the sidewalls of the lower portion of the opening. The overhang can be employed to form useful structures such as an negative offset profile in a floating gate device or vertically aligned control gate electrodes for vertical memory devices.
摘要翻译：可以通过第一蚀刻工艺对叠层进行构图，以形成限定图案化材料堆叠的侧壁表面的开口。掩模层可以非均匀地沉积在图案化材料堆叠的上部的侧壁上，同时不沉积在图案化材料堆叠的下部的侧壁上。开口的下部的侧壁可以使用第二蚀刻工艺横向凹入，其可以包括各向同性蚀刻部件。开口的上部的侧壁可以朝向开口向内突出，以在开口的下部的侧壁上形成伸出。可以使用突出端形成有用的结构，例如浮动栅极器件中的负偏移轮廓或用于垂直存储器件的垂直对准的控制栅电极。

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