专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20160188401A1 System and Method for Utilizing History Information in a Memory Device 审中-公开
标题翻译：利用历史信息在存储器件中的系统和方法
公开(公告)号：US20160188401A1
公开(公告)日：2016-06-30
申请号：US14584825
申请日：2014-12-29
申请人： SanDisk Technologies Inc.
发明人： Zhenlei Shen , Xinde Hu , Lei Chen , Yiwei Song
IPC分类号： G06F11/07
CPC分类号： G06F11/0751 , G06F11/0703 , G06F11/073
摘要： Systems and methods for controlling blocks in a memory device using a health indicator (such as the failed bit count) for the blocks are disclosed. However, the health indicator may exhibit noise, thereby resulting in an unreliable indicator of the health of the blocks in the memory device. In order to filter out the noise, a rolling average of the health indicator may be determined, and compared to the current health indicator. The comparison with the rolling average may indicate whether the current health indicator is an outlier, and thus should not be used. The health indicator may also be used to predict a future health indicator for different blocks in the memory device. Using the predicted future health indicator, the use of the blocks may be changed in order to more evenly wear the blocks.
摘要翻译：公开了用于使用健康指示器（诸如故障位计数）来控制块的存储器件中的块的系统和方法。然而，健康指示器可能表现出噪音，从而导致存储器装置中块的健康状况的不可靠指示。为了滤除噪声，可以确定健康指标的滚动平均值，并与当前健康指标进行比较。与滚动平均值的比较可以指示当前健康指标是否是离群值，因此不应该使用。健康指示器还可以用于预测存储器设备中不同块的未来健康指示符。使用预测的未来健康指示器，可以改变块的使用以便更均匀地佩戴块。

2. 发明申请

US20160098215A1 Method and System for Adaptively Assigning Logical Block Address Read Counters Using a Tree Structure 有权
标题翻译：使用树结构自适应地分配逻辑块地址读取计数器的方法和系统
公开(公告)号：US20160098215A1
公开(公告)日：2016-04-07
申请号：US14506147
申请日：2014-10-03
申请人： SanDisk Technologies, Inc.
发明人： Yiwei Song , Xinde Hu , Daniel Tuers
IPC分类号： G06F3/06
CPC分类号： G06F3/0619 , G06F3/064 , G06F3/0653 , G06F3/0679 , G06F12/0246 , G06F12/0646 , G06F2212/7201 , G06F2212/7202 , G06F2212/7206 , G06F2212/7207
摘要： Systems, apparatuses, and methods are provided that dynamically reassign counters (or other memory monitors) in a memory. A plurality of counters may be assigned to different address ranges within an overall address range of a memory. The value of the counter may be indicative of activity, such as reads, within a respective assigned address range. Depending on the value of the counter, the respective address range of the counter may be dynamically changed. For example, a counter with a high value (indicating higher activity within the address range) may have its respective address range divided, with two counters being assigned to each of the divided address ranges. Likewise, counters with low values (indicating less activity within the address ranges) may have their respective address ranges combined, with a single counter being assigned to the combined address ranges. Thus, in subdividing and combining address ranges, the number of counters assigned may remain the same, while still monitoring the activity with the overall address range.
摘要翻译：提供了在存储器中动态重新分配计数器（或其他存储器监视器）的系统，装置和方法。可以将多个计数器分配给存储器的整个地址范围内的不同地址范围。计数器的值可以指示在相应的分配的地址范围内的活动，例如读取。根据计数器的值，可以动态地改变计数器的相应地址范围。例如，具有高值的计数器（指示地址范围内的更高的活动度）可以将其各自的地址范围划分，其中两个计数器被分配给每个划分的地址范围。类似地，具有低值的计数器（在地址范围内指示较少的活动）可以具有其各自的地址范围的组合，其中单个计数器被分配给组合的地址范围。因此，在细分和组合地址范围时，分配的计数器数量可能保持不变，同时仍然以整体地址范围监视活动。

3. 发明授权

US09244858B1 System and method of separating read intensive addresses from non-read intensive addresses 有权
标题翻译：将读取密集地址与非读取密集地址分开的系统和方法
公开(公告)号：US09244858B1
公开(公告)日：2016-01-26
申请号：US14468052
申请日：2014-08-25
申请人： SANDISK TECHNOLOGIES INC.
发明人： Xinde Hu
IPC分类号： G06F12/02 , G06F12/10 , G06F3/06
CPC分类号： G06F12/1072 , G06F12/0246 , G06F2212/1032 , G06F2212/152 , G06F2212/2022 , G06F2212/261 , G06F2212/7201
摘要： A data storage device includes a memory including a first set of storage elements corresponding to a first set of physical addresses and a second set of storage elements corresponding to a second set of physical addresses, where the first set of storage elements is distinct from the second set of storage elements. The data storage device also includes a controller coupled to the memory. The controller is configured to map logical addresses to physical addresses of the memory. The controller is configured to assign read intensive logical addresses to the second set of physical addresses and to assign non-read intensive logical addresses to the first set of physical addresses.
摘要翻译：数据存储设备包括存储器，其包括对应于第一组物理地址的第一组存储元件和与第二组物理地址对应的第二组存储元件，其中第一组存储元件与第二组物理地址不同一组存储元素。数据存储设备还包括耦合到存储器的控制器。控制器被配置为将逻辑地址映射到存储器的物理地址。控制器被配置为将读取密集型逻辑地址分配给第二组物理地址，并且将非读取密集型逻辑地址分配给第一组物理地址。

4. 发明授权

US09734009B2 Data encoding techniques for a device 有权
公开(公告)号：US09734009B2
公开(公告)日：2017-08-15
申请号：US14878901
申请日：2015-10-08
申请人： SANDISK TECHNOLOGIES INC.
发明人： Xinde Hu , Christopher John Petti , Eran Sharon , Idan Alrod , Ariel Navon
IPC分类号： H03M13/00 , G06F11/10 , G11C29/52 , H03M13/29
CPC分类号： G06F11/1068 , G06F11/1048 , G11C7/1006 , G11C13/0059 , G11C13/0069 , G11C29/52 , H03M13/2906
摘要： A data storage device includes a controller and a non-volatile memory coupled to the controller. The controller is configured to generate first parity information based on first data and to generate second parity information based on second data. The non-volatile memory is configured to store the first data and the second data. The data storage device also includes a buffer configured to store the first parity information. The controller is further configured to generate joint parity information associated with the first data and the second data in response to a combined data size of the first data and the second data satisfying a threshold.

5. 发明授权

US09423971B2 Method and system for adaptively assigning logical block address read counters using a tree structure 有权
标题翻译：使用树结构自适应地分配逻辑块地址读取计数器的方法和系统
公开(公告)号：US09423971B2
公开(公告)日：2016-08-23
申请号：US14506147
申请日：2014-10-03
申请人： SanDisk Technologies, Inc.
发明人： Yiwei Song , Xinde Hu , Daniel Tuers
IPC分类号： G06F3/06 , G06F12/06
CPC分类号： G06F3/0619 , G06F3/064 , G06F3/0653 , G06F3/0679 , G06F12/0246 , G06F12/0646 , G06F2212/7201 , G06F2212/7202 , G06F2212/7206 , G06F2212/7207
摘要： Systems, apparatuses, and methods are provided that dynamically reassign counters (or other memory monitors) in a memory. A plurality of counters may be assigned to different address ranges within an overall address range of a memory. The value of the counter may be indicative of activity, such as reads, within a respective assigned address range. Depending on the value of the counter, the respective address range of the counter may be dynamically changed. For example, a counter with a high value (indicating higher activity within the address range) may have its respective address range divided, with two counters being assigned to each of the divided address ranges. Likewise, counters with low values (indicating less activity within the address ranges) may have their respective address ranges combined, with a single counter being assigned to the combined address ranges. Thus, in subdividing and combining address ranges, the number of counters assigned may remain the same, while still monitoring the activity with the overall address range.
摘要翻译：提供了在存储器中动态重新分配计数器（或其他存储器监视器）的系统，装置和方法。可以将多个计数器分配给存储器的整个地址范围内的不同地址范围。计数器的值可以指示在相应的分配的地址范围内的活动，例如读取。根据计数器的值，可以动态地改变计数器的相应地址范围。例如，具有高值的计数器（指示地址范围内的更高的活动度）可以将其各自的地址范围划分，其中两个计数器被分配给每个划分的地址范围。类似地，具有低值的计数器（在地址范围内指示较少的活动）可以具有其各自的地址范围的组合，其中单个计数器被分配给组合的地址范围。因此，在细分和组合地址范围时，分配的计数器数量可能保持不变，同时仍然以整体地址范围监视活动。

6. 发明授权

US09323613B2 Parity scheme for a data storage device 有权
标题翻译：数据存储设备的奇偶校验方案
公开(公告)号：US09323613B2
公开(公告)日：2016-04-26
申请号：US14694825
申请日：2015-04-23
申请人： SANDISK TECHNOLOGIES INC.
发明人： Xinde Hu , Manuel Antonio D'Abreu
IPC分类号： H03M13/00 , G06F11/10 , G11C11/56 , G11C16/04 , G11C29/52
CPC分类号： G06F11/1068 , G06F11/1012 , G06F11/1072 , G06F11/108 , G06F2211/109 , G11C11/5671 , G11C16/0483 , G11C29/52 , G11C29/785
摘要： A data storage device includes a non-volatile memory. The non-volatile memory may include a first word line, a second word line, and a third word line. The second word line may be between the first word line and the third word line. The non-volatile memory may further include a first string and a second string. The first string may be adjacent to the second string. The data storage device may further include circuitry configured to store parity information at a fourth word line of the non-volatile memory. The parity information may correspond to a combination of first data associated with the first word line and the first string, second data associated with the first word line and the second string, third data associated with the third word line and the first string, and fourth data associated with the third word line and the second string.
摘要翻译：数据存储装置包括非易失性存储器。非易失性存储器可以包括第一字线，第二字线和第三字线。第二字线可以在第一字线和第三字线之间。非易失性存储器还可以包括第一串和第二串。第一个字符串可以与第二个字符串相邻。数据存储设备还可以包括被配置为在非易失性存储器的第四字线处存储奇偶校验信息的电路。奇偶校验信息可以对应于与第一字线和第一字符串相关联的第一数据，与第一字线和第二字符串相关联的第二数据，与第三字线和第一字符串相关联的第三数据以及第四字符串的组合与第三字线和第二字符串相关联的数据。

7. 发明授权

US09257186B2 Memory access techniques for a memory having a three-dimensional memory configuration 有权
标题翻译：具有三维存储器配置的存储器的存储器访问技术
公开(公告)号：US09257186B2
公开(公告)日：2016-02-09
申请号：US14272951
申请日：2014-05-08
申请人： SANDISK TECHNOLOGIES INC.
发明人： Manuel Antonio D'Abreu , Xinde Hu
IPC分类号： G11C16/06 , G11C16/10 , G11C29/00
CPC分类号： G11C16/10 , G06F11/1048 , G11C7/20 , G11C13/0069 , G11C16/349 , G11C29/028 , G11C29/42 , G11C29/70 , G11C2029/0407 , G11C2029/0409 , G11C2029/5002 , H01L27/11582
摘要： A data storage device includes a memory having a three-dimensional (3D) memory configuration. A method includes writing first data at a first physical page that is disposed within the memory at a first distance from a substrate of the memory. The first data is written at the first physical page using a first write technique. The method further includes writing second data at a second physical page that is disposed within the memory at a second distance from the substrate. The second distance is greater than the first distance. The second data is written at the second physical page using a second write technique that is different than the first write technique.
摘要翻译：数据存储装置包括具有三维（3D）存储器配置的存储器。一种方法包括在与存储器的基板隔开第一距离的第一物理页面上写入第一数据，该第一物理页面设置在存储器内。使用第一写入技术在第一物理页面上写入第一数据。所述方法还包括在距离所述衬底的第二距离处设置在所述存储器内的第二物理页处写入第二数据。第二距离大于第一距离。使用与第一写入技术不同的第二写入技术将第二数据写入第二物理页面。

8. 发明授权

US09105333B1 On-chip copying of data between NAND flash memory and ReRAM of a memory die 有权
标题翻译： NAND闪存与存储器芯片的ReRAM之间的数据片上复制
公开(公告)号：US09105333B1
公开(公告)日：2015-08-11
申请号：US14323910
申请日：2014-07-03
申请人： SANDISK TECHNOLOGIES INC.
发明人： Xinde Hu , Sergey Anatolievich Gorobets , Manuel Antonio D'Abreu
IPC分类号： G11C16/04 , G11C13/00 , G11C16/10 , H01L27/115
CPC分类号： G11C13/0069 , G11C7/1006 , G11C7/1078 , G11C7/1087 , G11C8/16 , G11C11/005 , G11C13/0002 , G11C16/10 , G11C2213/71 , H01L27/115
摘要： A data storage device includes a memory die, where the memory die includes a NAND flash memory and a resistive random access memory (ReRAM). The memory die also includes an interface coupled to the ReRAM and the NAND flash memory. The interface is configured to support on-chip copying of data between the NAND flash memory and the ReRAM.
摘要翻译：数据存储装置包括存储器管芯，其中存储管芯包括NAND快闪存储器和电阻随机存取存储器（ReRAM）。存储器管芯还包括耦合到ReRAM和NAND闪存的接口。该接口被配置为支持NAND闪存和ReRAM之间的数据片上复制。

9. 发明授权

US09053790B1 Counter for write operations at a data storage device 有权
标题翻译：在数据存储设备上进行写操作的计数器
公开(公告)号：US09053790B1
公开(公告)日：2015-06-09
申请号：US14321058
申请日：2014-07-01
申请人： SANDISK TECHNOLOGIES INC.
发明人： Xinde Hu , Manuel Antonio D'Abreu
IPC分类号： G11C11/00 , G11C13/00
CPC分类号： G11C13/0069 , G11C13/0002 , G11C13/0035 , G11C16/3486 , G11C16/349 , G11C2213/71
摘要： A data storage device includes a resistive random access memory (ReRAM) having a three-dimensional (3D) memory configuration that is monolithically formed in one or more physical levels of arrays of memory cells having an active area disposed above a silicon substrate. The data storage device further includes circuitry associated with operation of the memory cells. A method includes performing a first number of write operations to the ReRAM. The method further includes incrementing a value of a counter a second number of times in response to performing at least one of the write operations. The second number is less than the first number.
摘要翻译：数据存储装置包括具有三维（3D）存储器配置的电阻随机存取存储器（ReRAM），该三维（3D）存储器配置被单片地形成在具有布置在硅衬底之上的有源区的存储单元阵列的一个或多个物理层级中。数据存储设备还包括与存储器单元的操作相关联的电路。一种方法包括对ReRAM执行第一次写入操作。该方法还包括响应于执行写入操作中的至少一个而将计数器的值递增第二次。第二个数字小于第一个数字。

10. 发明授权

US10108471B2 System and method for utilizing history information in a memory device 有权
公开(公告)号：US10108471B2
公开(公告)日：2018-10-23
申请号：US14584825
申请日：2014-12-29
申请人： SanDisk Technologies Inc.
发明人： Zhenlei Shen , Xinde Hu , Lei Chen , Yiwei Song
IPC分类号： G06F11/00 , G06F11/07
摘要： Systems and methods for controlling blocks in a memory device using a health indicator (such as the failed bit count) for the blocks are disclosed. However, the health indicator may exhibit noise, thereby resulting in an unreliable indicator of the health of the blocks in the memory device. In order to filter out the noise, a rolling average of the health indicator may be determined, and compared to the current health indicator. The comparison with the rolling average may indicate whether the current health indicator is an outlier, and thus should not be used. The health indicator may also be used to predict a future health indicator for different blocks in the memory device. Using the predicted future health indicator, the use of the blocks may be changed in order to more evenly wear the blocks.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式