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1. 发明授权

US09105482B2 Nanowire PIN tunnel field effect devices 有权
标题翻译：纳米线PIN隧道场效应器件
公开(公告)号：US09105482B2
公开(公告)日：2015-08-11
申请号：US13556300
申请日：2012-07-24
申请人： Sarunya Bangsaruntip , Stephen J. Koester , Amlan Majumdar , Jeffrey W. Sleights
发明人： Sarunya Bangsaruntip , Stephen J. Koester , Amlan Majumdar , Jeffrey W. Sleights
IPC分类号： H01L21/00 , H01L21/04 , B82Y10/00 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/739
CPC分类号： H01L21/047 , B82Y10/00 , H01L29/0665 , H01L29/0669 , H01L29/42312 , H01L29/66356 , H01L29/7391
摘要： A nanowire tunnel device includes a nanowire suspended above a semiconductor substrate by a first pad region and a second pad region, the nanowire having a channel portion surrounded by a gate structure disposed circumferentially around the nanowire, an n-type doped region including a first portion of the nanowire adjacent to the channel portion, and a p-type doped region including a second portion of the nanowire adjacent to the channel portion.
摘要翻译：纳米线隧道器件包括通过第一焊盘区域和第二焊盘区域悬置在半导体衬底上方的纳米线，所述纳米线具有由围绕纳米线周向设置的栅极结构围绕的沟道部分，n型掺杂区域，包括第一部分和与沟道部分相邻的纳米线的第二部分的p型掺杂区域。

2. 发明授权

US08722492B2 Nanowire pin tunnel field effect devices 有权
标题翻译：纳米线针隧道场效应装置
公开(公告)号：US08722492B2
公开(公告)日：2014-05-13
申请号：US12684280
申请日：2010-01-08
申请人： Sarunya Bangsaruntip , Steven J. Koester , Amlan Majumdar , Jeffrey W. Sleights
发明人： Sarunya Bangsaruntip , Steven J. Koester , Amlan Majumdar , Jeffrey W. Sleights
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/04 , H01L29/06
CPC分类号： H01L21/047 , B82Y10/00 , H01L29/0665 , H01L29/0669 , H01L29/42312 , H01L29/66356 , H01L29/7391
摘要： A method for forming a nanowire tunnel device includes forming a nanowire suspended by a first pad region and a second pad region over a semiconductor substrate, forming a gate structure around a channel region of the nanowire, implanting a first type of ions at a first oblique angle in a first portion of the nanowire and the first pad region, and implanting a second type of ions at a second oblique angle in a second portion of the nanowire and the second pad region.
摘要翻译：形成纳米线隧道器件的方法包括：在半导体衬底上形成由第一衬垫区域和第二焊盘区域悬置的纳米线，在纳米线的沟道区域周围形成栅极结构，在第一斜面上注入第一类型的离子在纳米线和第一焊盘区域的第一部分中的角度，以及在纳米线和第二焊盘区域的第二部分中以第二倾斜角度注入第二类型的离子。

3. 发明申请

US20110168982A1 NANOWIRE PIN TUNNEL FIELD EFFECT DEVICES 有权
标题翻译： NANOWIRE PIN TUNNEL场效应器件
公开(公告)号：US20110168982A1
公开(公告)日：2011-07-14
申请号：US12684280
申请日：2010-01-08
申请人： Sarunya Bangsaruntip , Stephen J. Koester , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Stephen J. Koester , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H01L29/66 , H01L21/336
CPC分类号： H01L21/047 , B82Y10/00 , H01L29/0665 , H01L29/0669 , H01L29/42312 , H01L29/66356 , H01L29/7391
摘要： A method for forming a nanowire tunnel device includes forming a nanowire suspended by a first pad region and a second pad region over a semiconductor substrate, forming a gate structure around a channel region of the nanowire, implanting a first type of ions at a first oblique angle in a first portion of the nanowire and the first pad region, and implanting a second type of ions at a second oblique angle in a second portion of the nanowire and the second pad region.
摘要翻译：形成纳米线隧道器件的方法包括：在半导体衬底上形成由第一衬垫区域和第二焊盘区域悬置的纳米线，在纳米线的沟道区域周围形成栅极结构，在第一斜面上注入第一类型的离子在纳米线和第一焊盘区域的第一部分中的角度，以及在纳米线和第二焊盘区域的第二部分中以第二倾斜角度注入第二类型的离子。

4. 发明申请

US20120286242A1 NANOWIRE PIN TUNNEL FIELD EFFECT DEVICES 有权
标题翻译： NANOWIRE PIN TUNNEL场效应器件
公开(公告)号：US20120286242A1
公开(公告)日：2012-11-15
申请号：US13556300
申请日：2012-07-24
申请人： Sarunya Bangsaruntip , Stephen J. Koester , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Stephen J. Koester , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H01L29/775 , B82Y99/00
CPC分类号： H01L21/047 , B82Y10/00 , H01L29/0665 , H01L29/0669 , H01L29/42312 , H01L29/66356 , H01L29/7391
摘要： A nanowire tunnel device includes a nanowire suspended above a semiconductor substrate by a first pad region and a second pad region, the nanowire having a channel portion surrounded by a gate structure disposed circumferentially around the nanowire, an n-type doped region including a first portion of the nanowire adjacent to the channel portion, and a p-type doped region including a second portion of the nanowire adjacent to the channel portion.
摘要翻译：纳米线隧道器件包括通过第一焊盘区域和第二焊盘区域悬置在半导体衬底上方的纳米线，所述纳米线具有由围绕纳米线周向设置的栅极结构围绕的沟道部分，n型掺杂区域，包括第一部分和与沟道部分相邻的纳米线的第二部分的p型掺杂区域。

5. 发明授权

US08324940B2 Nanowire circuits in matched devices 有权
标题翻译：纳米线电路在匹配的设备
公开(公告)号：US08324940B2
公开(公告)日：2012-12-04
申请号：US12758939
申请日：2010-04-13
申请人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H03K19/0948
CPC分类号： H03K19/20 , B82Y10/00 , G11C11/412 , G11C11/54 , H01L27/092 , H01L27/11 , H01L27/1104 , H01L27/12 , H01L29/0665 , H01L29/0673 , H01L29/775 , H01L29/78696
摘要： An inverter device includes a first nanowire connected to a voltage source node and a ground node, a first p-type field effect transistor (pFET) device having a gate disposed on the first nanowire, and a first n-type field effect transistor (nFET) device having a gate disposed on the first nanowire.
摘要翻译：逆变器装置包括连接到电压源节点和接地节点的第一纳米线，具有设置在第一纳米线上的栅极的第一p型场效应晶体管（pFET）器件和第一n型场效应晶体管（nFET ）器件，其具有设置在第一纳米线上的栅极。

6. 发明申请

US20110278543A1 GENERATION OF MUTIPLE DIAMETER NANOWIRE FIELD EFFECT TRANSISTORS 有权
标题翻译：多重直径纳米效应晶体管的产生
公开(公告)号：US20110278543A1
公开(公告)日：2011-11-17
申请号：US12778517
申请日：2010-05-12
申请人： Sarunya Bangsaruntip , Guy M. Cohen , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Guy M. Cohen , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H01L29/775 , H01L21/336
CPC分类号： H01L29/0669 , B82Y10/00 , H01L21/84 , H01L27/1203 , H01L29/0665 , H01L29/0673 , H01L29/42392 , H01L29/775 , H01L29/78696
摘要： A method of modifying a wafer having semiconductor disposed on an insulator is provided and includes establishing first and second regions of the wafer with different initial semiconductor thicknesses, forming pairs of semiconductor pads connected via respective nanowire channels at each of the first and second regions and reshaping the nanowire channels into nanowires each having a respective differing thickness reflective of the different initial semiconductor thicknesses at each of the first and second regions.
摘要翻译：提供了一种修改具有设置在绝缘体上的半导体的晶片的方法，包括以不同的初始半导体厚度建立晶片的第一和第二区域，形成经由每个第一和第二区域上的相应纳米线通道连接的半导体焊盘对，并重塑纳米线通道进入纳米线，每个纳米线具有反映第一和第二区域中的每一个处的不同初始半导体厚度的各自不同的厚度。

7. 发明授权

US08946680B2 TFET with nanowire source 有权
标题翻译：具有纳米线源的TFET
公开(公告)号：US08946680B2
公开(公告)日：2015-02-03
申请号：US13571657
申请日：2012-08-10
申请人： Sarunya Bangsaruntip , Isaac Lauer , Amlan Majumdar , Jeffrey Sleight
发明人： Sarunya Bangsaruntip , Isaac Lauer , Amlan Majumdar , Jeffrey Sleight
IPC分类号： H01L29/72 , H01L29/06 , B82Y10/00 , H01L29/08 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786 , H01L29/739 , H01L29/78 , H01L29/40
CPC分类号： H01L29/0847 , B82Y10/00 , H01L29/0665 , H01L29/0669 , H01L29/0673 , H01L29/0895 , H01L29/402 , H01L29/42356 , H01L29/42392 , H01L29/66477 , H01L29/66977 , H01L29/7391 , H01L29/775 , H01L29/78 , H01L29/78618 , H01L29/78696 , Y10S977/723 , Y10S977/938
摘要： A tunnel field effect transistor (TFET) includes a source region, the source region comprising a first portion of a nanowire; a channel region, the channel region comprising a second portion of the nanowire; a drain region, the drain region comprising a portion of a silicon pad, the silicon pad being located adjacent to the channel region; and a gate configured such that the gate surrounds the channel region and at least a portion of the source region.
摘要翻译：隧道场效应晶体管（TFET）包括源区，源区包括纳米线的第一部分; 沟道区，所述沟道区包括纳米线的第二部分; 漏极区域，所述漏极区域包括硅衬垫的一部分，所述硅衬垫位于所述沟道区域附近; 以及栅极，其被配置为使得所述栅极围绕所述沟道区域和所述源极区域的至少一部分。

8. 发明授权

US08648330B2 Nanowire field effect transistors 有权
标题翻译：纳米线场效应晶体管
公开(公告)号：US08648330B2
公开(公告)日：2014-02-11
申请号：US13343799
申请日：2012-01-05
申请人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H01L27/12 , H01L21/335 , B82Y40/00 , B82Y99/00
CPC分类号： H01L29/42392 , B82Y10/00 , B82Y40/00 , H01L29/0673 , H01L29/068 , H01L29/66439 , H01L29/775 , H01L29/78696
摘要： A method for forming a nanowire field effect transistor (FET) device includes forming a nanowire over a substrate, forming a liner material around a portion of the nanowire, forming a capping layer on the liner material, forming a first spacer adjacent to sidewalls of the capping layer and around portions of the nanowire, forming a hardmask layer on the capping layer and the first spacer, removing an exposed portion of the nanowire to form a first cavity partially defined by the gate material, epitaxially growing a semiconductor material on an exposed cross section of the nanowire in the first cavity, removing the hardmask layer and the capping layer, forming a second capping layer around the semiconductor material epitaxially grown in the first cavity to define a channel region, and forming a source region and a drain region contacting the channel region.
摘要翻译：形成纳米线场效应晶体管（FET）器件的方法包括在衬底上形成纳米线，在纳米线的一部分周围形成衬垫材料，在衬垫材料上形成覆盖层，形成邻近覆盖层和纳米线的周围部分，在覆盖层和第一间隔物上形成硬掩模层，去除纳米线的暴露部分以形成由栅极材料部分限定的第一空腔，在暴露的杂交上外延生长半导体材料在所述第一空腔中的所述纳米线的截面，去除所述硬掩模层和所述覆盖层，在所述第一空腔中外延生长的所述半导体材料周围形成第二覆盖层，以限定沟道区，以及形成与所述第二覆盖层接触的源极区和漏极区渠道区域。

9. 发明授权

US08558219B2 Nanowire field effect transistors 有权
标题翻译：纳米线场效应晶体管
公开(公告)号：US08558219B2
公开(公告)日：2013-10-15
申请号：US13606365
申请日：2012-09-07
申请人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H01L21/335 , B82Y40/00 , B82Y99/00
CPC分类号： H01L29/42392 , B82Y10/00 , B82Y40/00 , H01L29/0673 , H01L29/068 , H01L29/66439 , H01L29/775 , H01L29/78696
摘要： A method for forming a nanowire field effect transistor (FET) device includes forming a nanowire over a substrate, forming a liner material around a portion of the nanowire, forming a capping layer on the liner material, forming a first spacer adjacent to sidewalls of the capping layer and around portions of the nanowire, forming a hardmask layer on the capping layer and the first spacer, removing an exposed portion of the nanowire to form a first cavity partially defined by the gate material, epitaxially growing a semiconductor material on an exposed cross section of the nanowire in the first cavity, removing the hardmask layer and the capping layer, forming a second capping layer around the semiconductor material epitaxially grown in the first cavity to define a channel region, and forming a source region and a drain region contacting the channel region.
摘要翻译：形成纳米线场效应晶体管（FET）器件的方法包括在衬底上形成纳米线，在纳米线的一部分周围形成衬垫材料，在衬垫材料上形成覆盖层，形成邻近覆盖层和纳米线的周围部分，在覆盖层和第一间隔物上形成硬掩模层，去除纳米线的暴露部分以形成由栅极材料部分限定的第一空腔，在暴露的杂交上外延生长半导体材料在所述第一空腔中的所述纳米线的截面，去除所述硬掩模层和所述覆盖层，在所述第一空腔中外延生长的所述半导体材料周围形成第二覆盖层，以限定沟道区，以及形成与所述第二覆盖层接触的源极区和漏极区渠道区域。

10. 发明申请

US20120280206A1 Nanowire Circuits in Matched Devices 有权
标题翻译：匹配器件中的纳米线电路
公开(公告)号：US20120280206A1
公开(公告)日：2012-11-08
申请号：US13554057
申请日：2012-07-20
申请人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
发明人： Sarunya Bangsaruntip , Guy Cohen , Amlan Majumdar , Jeffrey W. Sleight
IPC分类号： H01L27/085 , H01L21/8232
CPC分类号： H03K19/20 , B82Y10/00 , G11C11/412 , G11C11/54 , H01L27/092 , H01L27/11 , H01L27/1104 , H01L27/12 , H01L29/0665 , H01L29/0673 , H01L29/775 , H01L29/78696
摘要： A memory device includes a first nanowire connected to a first bit line node and a ground node, a first field effect transistor (FET) having a gate disposed on the first nanowire, a second FET having a gate disposed on the first nanowire, a second nanowire connected to a voltage source node and a first input node, a third FET having a gate disposed on the second nanowire, a third nanowire connected to the voltage source node and a second input node, a fourth FET having a gate disposed on the third nanowire, a fourth nanowire connected to a second bit line node and the ground node, a fifth FET having a gate disposed on the fourth nanowire, and a sixth FET having a gate disposed on the fourth nanowire.
摘要翻译：存储器件包括连接到第一位线节点和接地节点的第一纳米线，具有设置在第一纳米线上的栅极的第一场效应晶体管（FET），具有设置在第一纳米线上的栅极的第二FET，连接到电压源节点和第一输入节点的纳米线，具有设置在第二纳米线上的栅极的第三FET，连接到电压源节点的第三纳米线和第二输入节点，具有设置在第三纳米线上的栅极的第四FET 纳米线，连接到第二位线节点的第四纳米线和所述接地节点，具有设置在所述第四纳米线上的栅极的第五FET以及设置在所述第四纳米线上的栅极的第六FET。

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