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    • 1. 发明授权
    • Integrated circuit modeling method and framework tool
    • 集成电路建模方法和框架工具
    • US08205174B2
    • 2012-06-19
    • US12542410
    • 2009-08-17
    • Suet Fei LiYunzhao LuErik OlssonMing Hua Shi
    • Suet Fei LiYunzhao LuErik OlssonMing Hua Shi
    • G06F17/50
    • G06F17/5022G06F2217/86
    • An integrated circuit modeling method 100 implementable on computer, which has an executable software model 145 having modules 140 of reusable functional cores 105 coded in a high level language and a virtual platform of the integrated circuit employable in an architecture exploration step 115. A modeling library of modules coded in high level languages and hardware level languages are provided and instantiated according to user input in a functional verification step 120 having a co-simulation environment, with interface code 170 between modules automatically generated by an interface generator 130 based on a two dimensional data array of hardware specification inputs 205, the interface code 170 further interfacing with wrappers engaged between high and hardware level language modules.
    • 可在计算机上实现的集成电路建模方法100,其具有可执行软件模型145,其具有以高级语言编码的可复用功能核心105的模块140以及可在架构探索步骤115中使用的集成电路的虚拟平台。建模库 在具有协同仿真环境的功能验证步骤120中根据用户输入提供并实例化以高级语言和硬件级语言编码的模块,其中界面代码170在由界面生成器130基于二维 硬件规格输入205的数据阵列,接口代码170进一步与接合在高级和硬件级语言模块之间的封装接口。