会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明申请
    • SEMICONDUCTOR ARRANGEMENT WITH STRESS RELEASE CONFIGURATION
    • 半导体布置与应力释放配置
    • US20150251900A1
    • 2015-09-10
    • US14200075
    • 2014-03-07
    • Taiwan Semiconductor Manufacturing Company Limited
    • Chun-Wen ChengChia-Hua ChuYi-Chuan Teng
    • B81B7/00B81C1/00
    • B81B7/0054B81B7/0019B81C1/00238B81C2203/0785H01L2924/1461
    • Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a cap wafer, a microelectromechanical systems (MEMS) wafer, and a complementary metal-oxide-semiconductor (CMOS) wafer. The cap wafer comprises a first spring structure and the MEMS wafer comprises a second spring structure. The first spring structure and the second spring structure relieve stress as portions of the semiconductor arrangement, such as a membrane and a poly layer, move. An ambient pressure chamber is formed between the CMOS wafer and the MEMS wafer as a thermal insulation air gap to protect the MEMS wafer from heat originating from the CMOS wafer. The ambient pressure chamber is connected to ambient air, such as for CMOS outgassing relief.
    • 除此之外,本文提供了一种或多种用于形成这种半导体布置的半导体布置和技术。 半导体装置包括盖晶片,微机电系统(MEMS)晶片和互补金属氧化物半导体(CMOS)晶片。 盖晶片包括第一弹簧结构,并且MEMS晶片包括第二弹簧结构。 第一弹簧结构和第二弹簧结构缓和应力,因为诸如膜和多层的半导体装置的部分移动。 在CMOS晶片和MEMS晶片之间形成环境压力室作为绝热气隙,以保护MEMS晶片免受来自CMOS晶片的热量的影响。 环境压力室连接到环境空气,例如用于CMOS除气释放。
    • 7. 发明授权
    • Semiconductor arrangement with stress release and thermal insulation
    • 具有应力释放和绝热的半导体装置
    • US09238578B2
    • 2016-01-19
    • US14200101
    • 2014-03-07
    • Taiwan Semiconductor Manufacturing Company Limited
    • Chun-Wen ChengChia-Hua ChuYi-Chuan Teng
    • H01L21/00B81B7/00B81C1/00
    • B81B7/0054B81B7/0019B81B7/008B81C1/00238B81C1/00269B81C1/00325
    • Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a cap wafer, a microelectromechanical systems (MEMS) wafer, and a complementary metal-oxide-semiconductor (CMOS) wafer. The cap wafer comprises one or more spring structures, such as a first spring structure and a second spring structure. The first spring structure and the second spring structure relieve stress as portions of the semiconductor arrangement, such as a membrane and a poly layer, move. An ambient pressure chamber is formed between the CMOS wafer and the MEMS wafer, such as for CMOS outgassing relief. One or more thermal insulator structures are formed between the CMOS wafer and the MEMS wafer to protect the MEMS wafer from heat originating from the CMOS wafer.
    • 除此之外,本文提供了一种或多种用于形成这种半导体布置的半导体布置和技术。 半导体装置包括盖晶片,微机电系统(MEMS)晶片和互补金属氧化物半导体(CMOS)晶片。 盖片包括一个或多个弹簧结构,例如第一弹簧结构和第二弹簧结构。 第一弹簧结构和第二弹簧结构缓和应力,因为诸如膜和多层的半导体装置的部分移动。 在CMOS晶片和MEMS晶片之间形成环境压力室,例如用于CMOS去除放电。 在CMOS晶片和MEMS晶片之间形成一个或多个热绝缘体结构,以保护MEMS晶片不受来自CMOS晶片的热量的影响。
    • 8. 发明申请
    • SEMICONDUCTOR ARRANGEMENT WITH STRESS RELEASE AND THERMAL INSULATION
    • 半导体布置与应力释放和热绝缘
    • US20150251901A1
    • 2015-09-10
    • US14200101
    • 2014-03-07
    • Taiwan Semiconductor Manufacturing Company Limited
    • Chun-Wen ChengChia-Hua ChuYi-Chuan Teng
    • B81B7/00B81C1/00
    • B81B7/0054B81B7/0019B81B7/008B81C1/00238B81C1/00269B81C1/00325
    • Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a cap wafer, a microelectromechanical systems (MEMS) wafer, and a complementary metal-oxide-semiconductor (CMOS) wafer. The cap wafer comprises one or more spring structures, such as a first spring structure and a second spring structure. The first spring structure and the second spring structure relieve stress as portions of the semiconductor arrangement, such as a membrane and a poly layer, move. An ambient pressure chamber is formed between the CMOS wafer and the MEMS wafer, such as for CMOS outgassing relief. One or more thermal insulator structures are formed between the CMOS wafer and the MEMS wafer to protect the MEMS wafer from heat originating from the CMOS wafer.
    • 除此之外,本文提供了一种或多种用于形成这种半导体布置的半导体布置和技术。 半导体装置包括盖晶片,微机电系统(MEMS)晶片和互补金属氧化物半导体(CMOS)晶片。 盖片包括一个或多个弹簧结构,例如第一弹簧结构和第二弹簧结构。 第一弹簧结构和第二弹簧结构缓和应力,因为诸如膜和多层的半导体装置的部分移动。 在CMOS晶片和MEMS晶片之间形成环境压力室,例如用于CMOS去除放电。 在CMOS晶片和MEMS晶片之间形成一个或多个热绝缘体结构,以保护MEMS晶片不受来自CMOS晶片的热量的影响。
    • 10. 发明授权
    • Semiconductor arrangement with stress release configuration
    • 半导体布置与应力释放配置
    • US09114976B1
    • 2015-08-25
    • US14200075
    • 2014-03-07
    • Taiwan Semiconductor Manufacturing Company Limited
    • Chun-Wen ChengChia-Hua ChuYi-Chuan Teng
    • H01L21/00B81B7/00B81C1/00
    • B81B7/0054B81B7/0019B81C1/00238B81C2203/0785H01L2924/1461
    • Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a cap wafer, a microelectromechanical systems (MEMS) wafer, and a complementary metal-oxide-semiconductor (CMOS) wafer. The cap wafer comprises a first spring structure and the MEMS wafer comprises a second spring structure. The first spring structure and the second spring structure relieve stress as portions of the semiconductor arrangement, such as a membrane and a poly layer, move. An ambient pressure chamber is formed between the CMOS wafer and the MEMS wafer as a thermal insulation air gap to protect the MEMS wafer from heat originating from the CMOS wafer. The ambient pressure chamber is connected to ambient air, such as for CMOS outgassing relief.
    • 除此之外,本文提供了一种或多种用于形成这种半导体布置的半导体布置和技术。 半导体装置包括盖晶片,微机电系统(MEMS)晶片和互补金属氧化物半导体(CMOS)晶片。 盖晶片包括第一弹簧结构,并且MEMS晶片包括第二弹簧结构。 第一弹簧结构和第二弹簧结构缓和应力,因为诸如膜和多层的半导体装置的部分移动。 在CMOS晶片和MEMS晶片之间形成环境压力室作为绝热气隙,以保护MEMS晶片免受来自CMOS晶片的热量的影响。 环境压力室连接到环境空气,例如用于CMOS除气释放。