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1. 发明授权

US12024422B2 Semiconductor integrated device with electrical contacts between stacked dies and corresponding manufacturing process 有权
公开(公告)号：US12024422B2
公开(公告)日：2024-07-02
申请号：US17161367
申请日：2021-01-28
申请人： STMICROELECTRONICS S.R.L.
发明人： Enri Duqi , Lorenzo Baldo , Domenico Giusti
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00238 , B81B7/0051 , B81B7/007 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2203/0118 , B81B2203/0127 , B81B2203/0315 , B81B2207/012 , B81B2207/07 , B81C2201/0133 , B81C2203/032 , B81C2203/035 , B81C2203/0792
摘要： An integrated device includes: a first die; a second die coupled in a stacked way on the first die along a vertical axis; a coupling region arranged between facing surfaces of the first die and of the second die, which face one another along the vertical axis and lie in a horizontal plane orthogonal to the vertical axis, for mechanical coupling of the first and second dies; electrical-contact elements carried by the facing surfaces of the first and second dies, aligned in pairs along the vertical axis; and conductive regions arranged between the pairs of electrical-contact elements carried by the facing surfaces of the first and second dies, for their electrical coupling. Supporting elements are arranged at the facing surface of at least one of the first and second dies and elastically support respective electrical-contact elements.

2. 发明授权

US12017909B2 Fabrication method for a MEMS device 有权
公开(公告)号：US12017909B2
公开(公告)日：2024-06-25
申请号：US16895523
申请日：2020-06-08
申请人： IMEC VZW
发明人： Deniz Sabuncuoglu Tezcan , Antonia Malainou
IPC分类号： B81C1/00
CPC分类号： B81C1/00238 , B81C1/00269 , B81C1/00325 , B81B2207/015 , B81C1/00301
摘要： A Microelectromechanical Systems (MEMS) device combining a MEMS layer and a Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuit (IC), and its fabrication method is provided. The fabrication method includes: processing the MEMS layer on a first semiconductor substrate, the MEMS layer including one or more movable structures and one or more anchor structures; processing one or more first contacts on the first semiconductor substrate, each first contact being processed into one of the anchor structures and being configured to bias that anchor structure; processing the CMOS IC on a second semiconductor substrate; processing one or more second contacts on the second semiconductor substrate, each second contact being connected to the CMOS IC; and bonding the first semiconductor substrate to the second semiconductor substrate such that each first contact directly contacts one of the second contacts. The method can allow fabricating the MEMS device without vapor HF etching. The method can further enable zero level packaging, fusion bonding, a C-SOI approach, and high-vacuum sealing. An integrated zero level hermetic packaging MEMS device can be realized based on fusion bonding of moisture resistant materials. Further, Cu/dielectric bonding and electrical connections to individual parts of the MEMS device are allowed, in order to apply isolated voltages.

3. 发明公开

US20240190701A1 METHODS FOR WAFER BONDING 审中-公开
公开(公告)号：US20240190701A1
公开(公告)日：2024-06-13
申请号：US18513545
申请日：2023-11-18
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Chien-Wei CHANG , Ya-Jen SHEUH , Ren-Dou LEE , Yi-Chih CHANG , Yi-Hsun CHIU , Yuan-Hsin CHI
IPC分类号： B81C1/00 , H01L21/02 , H01L21/3105 , H01L21/66
CPC分类号： B81C1/00238 , H01L21/02274 , H01L21/31053 , H01L22/12
摘要： Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.

4. 发明公开

US20240142490A1 MICROMECHANICAL SENSOR WITH INTEGRATED STRESS SENSOR AND METHOD FOR THE SIGNAL CORRECTION OF A SENSOR SIGNAL 审中-公开
公开(公告)号：US20240142490A1
公开(公告)日：2024-05-02
申请号：US18483784
申请日：2023-10-10
申请人： Robert Bosch GmbH
发明人： Johannes Classen
IPC分类号： G01P15/125 , B81B7/00 , B81C1/00
CPC分类号： G01P15/125 , B81B7/008 , B81C1/00238 , B81B2201/0235
摘要： A micromechanical sensor. The micromechanical sensor includes a MEMS substrate, on which a micromechanical structure including at least one sensor electrode is disposed in a cavity, and including a cap substrate, which is disposed over the micromechanical structure and closes the cavity. A capacitive electrode, which produces a measuring capacitance with an adjacent micromechanical structural element on the MEMS substrate for measuring a distance between the capacitive electrode and the micromechanical structural element, is disposed on an inner side of the cap substrate. A method for the signal correction of a sensor signal of such a micromechanical sensor is also described.

5. 发明授权

US11932534B2 MEMS device having a metallization structure embedded in a dielectric structure with laterally offset sidewalls of a first portion and a second portion 有权
公开(公告)号：US11932534B2
公开(公告)日：2024-03-19
申请号：US17696299
申请日：2022-03-16
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Hung-Hua Lin , Chang-Ming Wu , Chung-Yi Yu , Ping-Yin Liu , Jung-Huei Peng
IPC分类号： B81C1/00 , B81B7/00 , H01L23/00
CPC分类号： B81C1/00238 , B81B7/008 , B81C1/00333 , H01L24/09 , H01L24/89 , B81B2207/07 , B81C2201/0132 , B81C2203/0109 , B81C2203/0785 , B81C2203/0792 , H01L2224/091 , H01L2224/80013 , H01L2224/80895
摘要： A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

6. 发明授权

US11845653B2 Heterogenous integration of complementary metal-oxide-semiconductor and MEMS sensors 有权
公开(公告)号：US11845653B2
公开(公告)日：2023-12-19
申请号：US17440175
申请日：2020-04-01
申请人： Meridian Innovation Pte Ltd
发明人： Wan Chia Ang , Piotr Kropelnicki , Ilker Ender Ocak
IPC分类号： B81C1/00
CPC分类号： B81C1/00238 , B81B2201/0207 , B81B2207/012 , B81C2201/0194 , B81C2203/0714 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771 , B81C2203/0792
摘要： A complementary metal oxide semiconductor (CMOS) device integrated with micro-electro-mechanical system (MEMS) components in a MEMS region is disclosed. The MEMS components, for example, are infrared (IR) thermosensors. The MEMS sensors are integrated on the CMOS device heterogeneously. For example, a CMOS wafer with CMOS devices and interconnections as well as partially processed MEMS modules is bonded with a MEMS wafer with MEMS structures, post CMOS compatibility issues are alleviated. Post integration process to complete the devices includes forming contacts for interconnecting the sensors to the CMOS components as well as encapsulating the devices with a cap wafer using wafer-level vacuum packaging.

7. 发明公开

US20230357002A1 PACKAGING METHOD AND ASSOCIATED PACKAGING STRUCTURE 审中-公开
公开(公告)号：US20230357002A1
公开(公告)日：2023-11-09
申请号：US18357019
申请日：2023-07-21
申请人： Taiwan Semiconductor Manufacturing Company Ltd.
发明人： Chih-Ming Chen , Yuan-Chih Hsieh , Chung-Yi Yu
IPC分类号： B81C1/00 , H01L23/488 , H01L25/00 , B81B7/00
CPC分类号： B81C1/00269 , H01L23/488 , H01L25/50 , B81C1/00238 , B81C1/00 , B81B7/0041 , B81B2201/0242 , B81B2207/012 , B81B2201/0264 , B81C2203/035 , B81C2203/0118 , B81B2201/0235 , H01L24/81
摘要： The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

8. 发明公开

US20230278857A1 MEMS Packages and Methods of Manufacture Thereof 审中-公开
公开(公告)号：US20230278857A1
公开(公告)日：2023-09-07
申请号：US18316391
申请日：2023-05-12
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Chen-Hua Yu , Kuo-Chung Yee
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00238 , B81C1/00269 , B81B7/0006 , B81C2203/0118 , B81C2203/0792 , H01L2224/48091 , H01L2924/16235
摘要： Microelectromechanical systems (MEMS) packages and methods of manufacture thereof are described. In an embodiment, a method of manufacturing a MEMS package may include attaching a MEMS structure having a capping structure thereon to a device wafer comprising a plurality of first devices formed therein to form a wafer level MEMS package; and singulating the device wafer having the MEMS structure attached thereto to form a plurality of chip scale MEMS packages.

9. 发明授权

US10505006B2 Proof mass and polysilicon electrode integrated thereon 有权
公开(公告)号：US10505006B2
公开(公告)日：2019-12-10
申请号：US16044233
申请日：2018-07-24
申请人： InvenSense, Inc.
发明人： Bongsang Kim , Jongwoo Shin , Joseph Seeger , Logeeswaran Veerayah Jayaraman , Houri Johari-Galle
IPC分类号： G01P15/135 , B81B7/00 , B81C1/00 , H01L29/49 , H01L23/532 , G01P15/097 , G01C19/5712 , G01C19/5755 , G01C19/5762 , G01C19/5719 , G01P15/13 , G01P15/08 , G01P15/125
CPC分类号： H01L29/4933 , B81B7/00 , B81B7/0019 , B81B7/0032 , B81B7/0035 , B81B7/0038 , B81B7/0041 , B81C1/00 , B81C1/0015 , B81C1/0019 , B81C1/00134 , B81C1/00158 , B81C1/00166 , B81C1/00182 , B81C1/00238 , B81C1/00261 , G01C19/5712 , G01C19/5719 , G01C19/5755 , G01C19/5762 , G01P15/0802 , G01P15/097 , G01P15/125 , G01P15/13 , G01P15/135 , H01L23/53271 , H01L29/4983 , G01P2015/0808
摘要： A method includes depositing a silicon layer over a first oxide layer that overlays a first silicon substrate. The method further includes depositing a second oxide layer over the silicon layer to form a composite substrate. The composite substrate is bonded to a second silicon substrate to form a micro-electro-mechanical system (MEMS) substrate. Holes within the second silicon substrate are formed by reaching the second oxide layer of the composite substrate. The method further includes removing a portion of the second oxide layer through the holes to release MEMS features. The MEMS substrate may be bonded to a CMOS substrate.

10. 发明申请

US20180148325A1 SEMICONDUCTOR INTEGRATED DEVICE WITH ELECTRICAL CONTACTS BETWEEN STACKED DIES AND CORRESPONDING MANUFACTURING PROCESS 审中-公开
公开(公告)号：US20180148325A1
公开(公告)日：2018-05-31
申请号：US15591652
申请日：2017-05-10
申请人： STMICROELECTRONICS S.R.L.
发明人： Enri Duqi , Lorenzo Baldo , Domenico Giusti
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00238 , B81B7/0051 , B81B7/007 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2203/0118 , B81B2203/0127 , B81B2203/0315 , B81B2207/012 , B81B2207/07 , B81C2201/0133 , B81C2203/032 , B81C2203/035 , B81C2203/0792
摘要： An integrated device includes: a first die; a second die coupled in a stacked way on the first die along a vertical axis; a coupling region arranged between facing surfaces of the first die and of the second die, which face one another along the vertical axis and lie in a horizontal plane orthogonal to the vertical axis, for mechanical coupling of the first and second dies; electrical-contact elements carried by the facing surfaces of the first and second dies, aligned in pairs along the vertical axis; and conductive regions arranged between the pairs of electrical-contact elements carried by the facing surfaces of the first and second dies, for their electrical coupling. Supporting elements are arranged at the facing surface of at least one of the first and second dies and elastically support respective electrical-contact elements.

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