专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110320868A1 DATA STORAGE APPARATUS AND METHOD FOR WRITING DATA 失效
标题翻译：数据存储设备和数据写入方法
公开(公告)号：US20110320868A1
公开(公告)日：2011-12-29
申请号：US13087177
申请日：2011-04-14
申请人： Takami SUGITA , Hiroyuki MORO , Takahiro NANGO
发明人： Takami SUGITA , Hiroyuki MORO , Takahiro NANGO
IPC分类号： G06F11/07
CPC分类号： G06F11/1048 , G11C2029/0411
摘要： According to one embodiment, a data storage apparatus includes a read module, an error detector and a controller. The read module is configured to read data from a flash memory, more precisely from a rewrite area and a write-back area, both provided in the flash memory. The error detector is configured to detect errors, if any, in the data read. The controller is configured to keep rewriting data, without correcting the errors the error detector has detected in the rewrite area of the flash memory.
摘要翻译：根据一个实施例，数据存储装置包括读取模块，错误检测器和控制器。读取模块被配置为从闪速存储器中更准确地读取来自闪存中的重写区域和回写区域的数据。错误检测器被配置为检测数据读取中的错误（如果有的话）。控制器被配置为保持重写数据，而不纠正错误检测器在闪存的重写区域中检测到的错误。

2. 发明申请

US20120102262A1 MEMORY CONTROL DEVICE, STORAGE DEVICE, AND MEMORY CONTROL METHOD 有权
标题翻译：存储控制装置，存储装置和存储器控制方法
公开(公告)号：US20120102262A1
公开(公告)日：2012-04-26
申请号：US13205193
申请日：2011-08-08
申请人： Takahiro NANGO , Hiroyuki MORO , Tohru FUKUDA
发明人： Takahiro NANGO , Hiroyuki MORO , Tohru FUKUDA
IPC分类号： G06F12/00
CPC分类号： G06F13/1642 , G06F3/0656 , G11B20/18
摘要： According to one embodiment, a memory control device includes: queues in channels; first controller; generator; and second controller. The queues hold write commands for data pieces. The first controller causes: (i) when a read command is received, and until the write commands are held in the queues, the channels are synchronized with each other, and processes of the write commands become ready to be performed, a read process based on the read command prior to the write commands; and, (ii) when the processes of write commands become ready to be performed, synchronization of the channels and write processes for the data pieces based on the write commands. The generator generates error correction codes based on the data pieces when the channels are synchronized with each other and the processes based on the write commands are performed. The second controller writes the error correction codes on the storage medium.
摘要翻译：根据一个实施例，存储器控制装置包括：通道中的队列; 第一控制器发电机; 和第二控制器。队列保存数据的写入命令。第一控制器导致：（i）当接收到读命令时，直到写入命令保持在队列中，通道彼此同步，写入命令的处理准备好执行，基于读取过程在写命令之前的read命令; 和（ii）当写入命令的处理准备好执行时，基于写入命令的数据段的通道同步和写入处理。当通道彼此同步时，发生器基于数据段产生纠错码，并且执行基于写入命令的处理。第二个控制器将错误校正码写入存储介质。

3. 发明申请

US20120005414A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF READING DATA FROM AND WRITING DATA INTO A PLURALITY OF STORAGE UNITS 失效
标题翻译：半导体存储器设备及从数据读取数据并将数据写入多个存储单元的方法
公开(公告)号：US20120005414A1
公开(公告)日：2012-01-05
申请号：US13167609
申请日：2011-06-23
申请人： Hiroyuki MORO
发明人： Hiroyuki MORO
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/1433
摘要： According to one embodiment, a semiconductor memory device includes a command processing module, a plurality of storage units, a plurality of control modules, an adjustment circuit, and a setting register. The adjustment circuit is configured to exclude the control module connected to the storage unit of a second group from a write operation in accordance with identification data, and to cause the control module connected to the storage unit of the second group to perform a read operation in a period overlapping the write operation performed by the control module connected to the storage unit of a first group.
摘要翻译：根据一个实施例，半导体存储器件包括命令处理模块，多个存储单元，多个控制模块，调整电路和设置寄存器。调整电路被配置为根据识别数据从连接到第二组的存储单元的控制模块排除写入操作，并且使连接到第二组的存储单元的控制模块执行读取操作与由连接到第一组的存储单元的控制模块执行的写入操作重叠的周期。

4. 发明申请

US20090219792A1 DATA REPRODUCING DEVICE AND DATA REPRODUCING METHOD 审中-公开
标题翻译：数据复制设备和数据复制方法
公开(公告)号：US20090219792A1
公开(公告)日：2009-09-03
申请号：US12395360
申请日：2009-02-27
申请人： Koichi OTAKE , Kyosuke TAKAHASHI , Daisuke UCHIDA , Hiroyuki MORO , Yukiyasu TATSUZAWA , Toshihiko KANESHIGE
发明人： Koichi OTAKE , Kyosuke TAKAHASHI , Daisuke UCHIDA , Hiroyuki MORO , Yukiyasu TATSUZAWA , Toshihiko KANESHIGE
IPC分类号： G11B19/00 , G11B20/10
CPC分类号： G11B20/1403 , G11B20/10009 , G11B20/10222 , G11B2220/2537
摘要： According to one embodiment, a data reproducing device according to the invention includes a frequency difference detector, a phase comparator, a loop filter, an integrator, a first conversion part for converting a value of the integrator into a first conversion value, a second conversion part for converting the value of the integrator into a second conversion value, a first conversion table, a second conversion table, a first D/A converter (DAC), a second D/A converter (DAC), a voltage controlled oscillator (VCO), and a prediction table. The value of the integrator and the first conversion value are associated with each other and stored in the first conversion table in consideration of the characteristics of the VCO. Meanwhile, the value of the integrator and the second conversion value are associated with each other and stored in the second conversion table in consideration of the characteristics of the VCO.
摘要翻译：根据一个实施例，根据本发明的数据再现装置包括频差检测器，相位比较器，环路滤波器，积分器，用于将积分器的值转换为第一转换值的第一转换部分，第二转换第一转换表，第二转换表，第一D / A转换器（DAC），第二D / A转换器（DAC），压控振荡器（VCO））和预测表。考虑到VCO的特性，积分器的值和第一转换值彼此相关联并存储在第一转换表中。同时，考虑到VCO的特性，积分器的值和第二转换值彼此相关联并存储在第二转换表中。

5. 发明申请

US20090049242A1 MEMORY CARD AUTHENTICATION SYSTEM, CAPACITY SWITCHING-TYPE MEMORY CARD HOST DEVICE, CAPACITY SWITCHING-TYPE MEMORY CARD, STORAGE CAPACITY SETTING METHOD, AND STORAGE CAPACITY SETTING PROGRAM 有权
标题翻译：存储卡认证系统，容量切换型存储卡主机，容量切换型存储卡，存储容量设置方法和存储容量设置程序
公开(公告)号：US20090049242A1
公开(公告)日：2009-02-19
申请号：US12249628
申请日：2008-10-10
申请人： Hiroyuki MORO
发明人： Hiroyuki MORO
IPC分类号： G06F12/00 , G11C5/00 , G06F12/02
CPC分类号： G06F13/1694 , G06F3/0608 , G06F3/0632 , G06F3/0643 , G06F3/0644 , G06F3/0679 , G06F3/0688
摘要： A system for authenticating a memory card including a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card, a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device, and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.
摘要翻译：一种用于认证存储卡的系统，包括容量切换型存储卡主机装置，其包括容量切换通知模块，该模块通知存储卡，目的是交换信息，容量切换型存储卡主机装置处理容量切换型存储卡以及容量切换型认证模块，其对目标存储卡是容量切换型存储卡进行认证，容量切换型存储卡包括：容量切换型存储卡，其在接收到标识大容量表达式寄存器使用标志的情况下，作为容量切换型存储卡主机装置的通知，以及在容量切换型存储卡主机装置与容量切换型存储卡之间发送和接收数据的总线。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式