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1. 发明申请

US20130151836A1 SEMICONDUCTOR DEVICE INCLUDING ENCRYPTION SECTION, SEMICONDUCTOR DEVICE INCLUDING EXTERNAL INTERFACE, AND CONTENT REPRODUCTION METHOD 有权
标题翻译：包括加密部分的半导体器件，包括外部接口的半导体器件和内容再现方法
公开(公告)号：US20130151836A1
公开(公告)日：2013-06-13
申请号：US13761964
申请日：2013-02-07
申请人： Makoto FUJIWARA , Yusuke NEMOTO , Junichi YASUI , Takuji MAEDA , Takayuki ITO , Yasushi YAMADA , Shinji INOUE
发明人： Makoto FUJIWARA , Yusuke NEMOTO , Junichi YASUI , Takuji MAEDA , Takayuki ITO , Yasushi YAMADA , Shinji INOUE
IPC分类号： G06F9/44
CPC分类号： G06F21/72 , G06F9/4401 , G06F21/123 , G06F21/85 , G06F2221/2105
摘要： A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.
摘要翻译：安全LSI装置1包括用于加密程序的加密部分2和用于从外部存储器100输入/输出程序或数据的外部I / F50。在加密部分2中，私钥的操作关于执行由密钥生成/更新排序器30确定的序列是不允许的，算术处理部分20被禁止。在外部I / F50中，程序处理部51和数据处理部55彼此独立地构成。

2. 发明申请

US20100329456A1 SEMICONDUCTOR DEVICE INCLUDING ENCRYPTION SECTION, SEMICONDUCTOR DEVICE INCLUDING EXTERNAL INTERFACE, AND CONTENT REPRODUCTION METHOD 有权
标题翻译：包括加密部分的半导体器件，包括外部接口的半导体器件和内容再现方法
公开(公告)号：US20100329456A1
公开(公告)日：2010-12-30
申请号：US12877615
申请日：2010-09-08
申请人： Makoto FUJIWARA , Yusuke NEMOTO , Junichi YASUI , Takuji MAEDA , Takayuki ITO , Yasushi YAMADA , Shinji INOUE
发明人： Makoto FUJIWARA , Yusuke NEMOTO , Junichi YASUI , Takuji MAEDA , Takayuki ITO , Yasushi YAMADA , Shinji INOUE
IPC分类号： H04L9/14 , H04L9/00
CPC分类号： G06F21/72 , G06F9/4401 , G06F21/123 , G06F21/85 , G06F2221/2105
摘要： A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.
摘要翻译：安全LSI装置1包括用于加密程序的加密部分2和用于从外部存储器100输入/输出程序或数据的外部I / F50。在加密部分2中，私钥的操作关于执行由密钥生成/更新排序器30确定的序列是不允许的，算术处理部分20被禁止。在外部I / F50中，程序处理部51和数据处理部55彼此独立地构成。

3. 发明申请

US20090037721A1 PROGRAM DEVELOPMENT METHOD, PROGRAM DEVELOPMENT SUPPORTING SYSTEM, AND PROGRAM INSTALLATION METHOD 有权
标题翻译：程序开发方法，程序开发支持系统和程序安装方法
公开(公告)号：US20090037721A1
公开(公告)日：2009-02-05
申请号：US12170160
申请日：2008-07-09
申请人： Makoto FUJIWARA , Yusuke NEMOTO , Junichi YASUI , Takuji MAEDA , Takayuki ITO , Yasushi YAMADA , Shinji INOUE
发明人： Makoto FUJIWARA , Yusuke NEMOTO , Junichi YASUI , Takuji MAEDA , Takayuki ITO , Yasushi YAMADA , Shinji INOUE
IPC分类号： G06F21/02 , H04L9/06
CPC分类号： G06F21/72 , G06F8/60 , G06F21/575 , G06F2221/2105
摘要： An development environment of a high security level is provided for a key-installed system. Development of a program for a system having an LSI device which includes a secure memory is performed by providing another LSI device having the same structure and setting the provided LSI device to a development mode which is different from a product operation mode. Alternatively, the provided LSI device is set to an administrator mode to perform development and encryption of a key-generation program. The LSI device is set to a key-generation mode to execute the encrypted key-generation program, thereby generating various keys.
摘要翻译：为安装密钥的系统提供了高安全级别的开发环境。通过提供具有相同结构的另一LSI器件和将所提供的LSI器件设置为与产品操作模式不同的开发模式来执行具有包括安全存储器的LSI器件的系统的程序的开发。或者，将所提供的LSI设备设置为管理员模式，以执行密钥生成程序的开发和加密。 LSI设备被设置为执行加密密钥生成程序的密钥生成模式，从而生成各种密钥。

4. 发明申请

US20110302225A1 ACCESS DEVICE, INFORMATION RECORDING DEVICE, INFORMATION RECORDING SYSTEM, FILE MANAGEMENT METHOD, AND PROGRAM 审中-公开
公开(公告)号：US20110302225A1
公开(公告)日：2011-12-08
申请号：US13204323
申请日：2011-08-05
申请人： Takuji MAEDA , Shinji INOUE
发明人： Takuji MAEDA , Shinji INOUE
IPC分类号： G06F17/30
CPC分类号： G06F11/1435 , G06F11/1004 , G06F16/13
摘要： An information recording device, which includes a nonvolatile memory whose areas are managed using an FAT file system and enhances the reliability of directory entries using a cyclic shift checksum, recalculates the cyclic shift checksum efficiently and performs seeking at a higher speed. A nonvolatile memory (25) of an information recording device 2 is managed using an FAT file system. In the memory, a plurality of directory entries are allocated to a single file. The device enhances the reliability of the directory entries using a cyclic shift checksum, and manages information indicating the position and the size of a storage area of file data using an extent information entry (203). The device further uses an update information entry (204) and a dummy entry (205).

5. 发明申请

US20110125928A1 HOST DEVICE, STORAGE DEVICE, AND METHOD FOR ACCESSING STORAGE DEVICE 审中-公开
标题翻译：主机设备，存储设备和用于访问存储设备的方法
公开(公告)号：US20110125928A1
公开(公告)日：2011-05-26
申请号：US13014875
申请日：2011-01-27
申请人： Masayuki TOYAMA , Takuji MAEDA , Tomoaki IZUMI , Shouichi TSUJITA , Masahiro NAKANISHI , Shinji INOUE
发明人： Masayuki TOYAMA , Takuji MAEDA , Tomoaki IZUMI , Shouichi TSUJITA , Masahiro NAKANISHI , Shinji INOUE
IPC分类号： G06F3/01
CPC分类号： G06F3/0659 , G06F3/0619 , G06F3/0679
摘要： A host device is connected to a storage device via a bus and reads and writes data in the storage device. The host device includes a command transmitter that sequentially transmits a command in a command sequence, which includes a set of commands which do not change data stored in the storage device, and a response receptor that accepts a response from the storage device for each command transmission from the command transmitter and determines whether or not an error exists. An acceptable/unacceptable access determiner provided in the host device enables access to the storage device when a normal response is identified by the response receptor and otherwise determines that access to the storage device is unacceptable. The normal response is when the responses received from the storage device for the transmissions of all commands in the command sequence do not include an error.
摘要翻译：主机通过总线连接到存储设备，并在存储设备中读取和写入数据。主机装置包括命令发送器，其顺序地发送命令序列中的命令，该命令序列包括不改变存储在存储装置中的数据的一组命令，以及响应接收器，用于接收来自存储装置的每个命令传输的响应从命令发送器确定是否存在错误。在主机设备中提供的可接受/不能接受的访问确定器使得能够在响应受体识别出正常响应时访问存储设备，并且另外确定对存储设备的访问是不可接受的。正常响应是当从存储设备接收的用于命令序列中的所有命令的传输的响应不包括错误。

6. 发明申请

US20110055467A1 DATA AREA MANAGING METHOD IN INFORMATION RECORDING MEDIUM AND INFORMATION PROCESSOR EMPLOYING DATA AREA MANAGING METHOD 有权
标题翻译：信息记录介质中的数据区域管理方法和使用数据区域管理方法的信息处理器
公开(公告)号：US20110055467A1
公开(公告)日：2011-03-03
申请号：US12942482
申请日：2010-11-09
申请人： Takuji MAEDA , Masato Suto , Hirokazu So , Makoto Ochi , Shinji Inoue
发明人： Takuji MAEDA , Masato Suto , Hirokazu So , Makoto Ochi , Shinji Inoue
IPC分类号： G06F12/00 , G06F17/30 , G06F12/08
CPC分类号： G06F3/0643 , G06F3/0608 , G06F3/064 , G06F3/0676 , G06F3/0677 , G06F3/0679 , G06F12/0866 , G06F2212/466 , Y10S707/99956
摘要： Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in an information recording medium. When the processing content of the information processor is to retrieve a free area from the area management information, a physical management block size determined from the physical characteristics of the information recording medium is used. When the processing content is to acquire a link destination from the area management information, minimum access unit of the information recording medium is used. Consequently, overhead can be lessened when the area management information is accessed.
摘要翻译：当信息处理器访问信息记录介质中的区域管理信息时，通过控制访问大小，将区域管理信息缓存在高速缓冲存储器中。当信息处理器的处理内容从区域管理信息中检索空闲区域时，使用从信息记录介质的物理特性确定的物理管理块大小。当处理内容从区域管理信息获取链接目的地时，使用信息记录介质的最小访问单元。因此，当访问区域管理信息时，可以减少开销。

7. 发明申请

US20120102264A1 MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, ACCESS DEVICE, AND NONVOLATILE MEMORY SYSTEM 有权
标题翻译：存储器控制器，非易失性存储器件，访问器件和非易失性存储器系统
公开(公告)号：US20120102264A1
公开(公告)日：2012-04-26
申请号：US13340016
申请日：2011-12-29
申请人： Tadashi ONO , Tatsuya ADACHI , Masahiro NAKANISHI , Takuji MAEDA
发明人： Tadashi ONO , Tatsuya ADACHI , Masahiro NAKANISHI , Takuji MAEDA
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7202
摘要： Without corresponding to different address spaces between an access device and a nonvolatile memory device, the access device designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device. The access device sends the nonvolatile memory device a transfer rate through a transfer rate transmitting unit. A filling-up rate calculating unit calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device. A remaining amount corresponding to the transfer rate is sought by using the calculated filling-up rate and is transmitted to a remaining amount receiving unit of the access device.
摘要翻译：在不对应于访问设备和非易失性存储设备之间的不同地址空间的情况下，访问设备指定仅在非易失性存储设备中的物理地址空间中管理数据存储状态的文件ID。接入设备通过传输速率发送单元向非易失性存储设备发送传输速率。填补率计算单元计算与访问设备所需的保证速度相对应的物理块的填充率。通过使用计算出的填充率来寻求与传送速率相对应的剩余量，并将其发送到接入设备的剩余量接收单元。

8. 发明申请

US20100205361A1 SEMICONDUCTOR MEMORY CARD ACCESS APPARATUS, A COMPUTER-READABLE RECORDING MEDIUM, AN INITIALIZATION METHOD, AND A SEMICONDUCTOR MEMORY CARD 有权
标题翻译：半导体存储卡访问装置，计算机可读记录介质，初始化方法和半导体存储卡
公开(公告)号：US20100205361A1
公开(公告)日：2010-08-12
申请号：US12766179
申请日：2010-04-23
申请人： Takuji MAEDA , Teruto Hirota
发明人： Takuji MAEDA , Teruto Hirota
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0644 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0643 , G06F3/0652 , G06F3/0679 , G06F12/0223 , G06F12/0246 , G06F12/1433 , G06F2212/1016 , G06F2212/2022 , G06F2212/7202 , G11B20/00086
摘要： A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters.A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.
摘要翻译：设置位于半导体存储卡的体积区域开始处的预定数量的可擦除块，以便包括卷管理信息。跟随卷管理信息的用户区域包括多个集群。确定从主引导记录和分区表扇区到分区引导扇区的区域的数据长度NOM，使得用户区域中的多个簇不被布置为跨越可擦除块边界。由于用户区域中的簇边界和可擦除块边界被对准，所以不需要执行浪费的处理，其中两个可擦除块被擦除以重写一个簇。

9. 发明申请

US20110188866A1 COHERENT OPTICAL COMMUNICATION DEVICE AND METHOD 有权
标题翻译：相关光通信设备及方法
公开(公告)号：US20110188866A1
公开(公告)日：2011-08-04
申请号：US13012870
申请日：2011-01-25
申请人： Takuji MAEDA
发明人： Takuji MAEDA
IPC分类号： H04B10/06 , H04B10/02
摘要： A coherent optical communication device includes a demodulator configured to demodulate a reception signal; a local oscillator light optical source configured to generate local oscillator light used for demodulating the reception signal; a memory configured to store wavelength information; and a controller configured to control the local oscillator light optical source when the demodulator cannot receive the reception signal, so that a wavelength of the local oscillator light generated in the local oscillator light optical source is changed to a wavelength specified by the wavelength information stored in the memory.
摘要翻译：相干光通信设备包括：解调器，被配置为解调接收信号; 本地振荡器光源，被配置为产生用于解调接收信号的本地振荡器光; 存储器，被配置为存储波长信息; 以及控制器，其被配置为当解调器不能接收接收信号时控制本地振荡器光源，使得在本地振荡器光源中产生的本地振荡器光的波长被改变为由存储在记忆。

10. 发明申请

US20110125958A1 SEMICONDUCTOR MEMORY CARD ACCESS APPARATUS, A COMPUTER-READABLE RECORDING MEDIUM, AN INITIALIZATION METHOD, AND A SEMICONDUCTOR MEMORY CARD 有权
公开(公告)号：US20110125958A1
公开(公告)日：2011-05-26
申请号：US13012978
申请日：2011-01-25
申请人： Takuji MAEDA , Teruto Hirota
发明人： Takuji MAEDA , Teruto Hirota
IPC分类号： G06F12/00 , G06F15/177
CPC分类号： G06F3/0644 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0643 , G06F3/0652 , G06F3/0679 , G06F12/0223 , G06F12/0246 , G06F12/1433 , G06F2212/1016 , G06F2212/2022 , G06F2212/7202 , G11B20/00086
摘要： A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.

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