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1. 发明申请

US20080252505A1 Read and Write Interface Communications Protocol for Digital-to-Analog Signal Converter with Non-Volatile Memory 有权
标题翻译：具有非易失性存储器的数模转换信号转换器的读写接口通信协议
公开(公告)号：US20080252505A1
公开(公告)日：2008-10-16
申请号：US12017582
申请日：2008-01-22
申请人： Thomas Youbok Lee , Jonathan Jackson , John Austin , Andrew Swaneck , Yann Johner
发明人： Thomas Youbok Lee , Jonathan Jackson , John Austin , Andrew Swaneck , Yann Johner
IPC分类号： H03M1/74
CPC分类号： H03M1/66
摘要： A mixed signal device, e.g., digital-to-analog converter (DAC) device has a serial interface communication protocol that accesses volatile and/or nonvolatile memory and allows a preprogrammed output voltage whenever the mixed signal device is powered-up. However, unlike conventional DAC devices, DAC devices with non-volatile memory may need special interface communication protocols for effective operation of the DAC device and communications between a system master controller unit (MCU). Interface communications protocols that do not violate standard serial bus communications protocols are provided for communicating between the volatile and non-volatile memories of the DAC device so that the MCU may access the DAC device's memories (non-volatile and/or volatile memories).
摘要翻译：混合信号装置，例如数模转换器（DAC）装置具有串行接口通信协议，该协议访问易失性和/或非易失性存储器，并且每当混合信号装置通电时允许预编程的输出电压。然而，与传统DAC器件不同，具有非易失性存储器的DAC器件可能需要特殊的接口通信协议来有效地操作DAC器件以及系统主控制器单元（MCU）之间的通信。提供了不违反标准串行总线通信协议的接口通信协议，用于在DAC设备的易失性和非易失性存储器之间进行通信，以便MCU可以访问DAC设备的存储器（非易失性和/或易失性存储器）。

2. 发明授权

US07589652B2 Read and write interface communications protocol for digital-to-analog signal converter with non-volatile memory 有权
标题翻译：用于具有非易失性存储器的数模转换信号转换器的读写接口通信协议
公开(公告)号：US07589652B2
公开(公告)日：2009-09-15
申请号：US12017582
申请日：2008-01-22
申请人： Thomas Youbok Lee , Jonathan Jackson , John Austin , Andrew Swaneck , Yann Johner
发明人： Thomas Youbok Lee , Jonathan Jackson , John Austin , Andrew Swaneck , Yann Johner
IPC分类号： H03M1/66
CPC分类号： H03M1/66
摘要： A mixed signal device, e.g., digital-to-analog converter (DAC) device has a serial interface communication protocol that accesses volatile and/or nonvolatile memory and allows a preprogrammed output voltage whenever the mixed signal device is powered-up. However, unlike conventional DAC devices, DAC devices with non-volatile memory may need special interface communication protocols for effective operation of the DAC device and communications between a system master controller unit (MCU). Interface communications protocols that do not violate standard serial bus communications protocols are provided for communicating between the volatile and non-volatile memories of the DAC device so that the MCU may access the DAC device's memories (non-volatile and/or volatile memories).
摘要翻译：混合信号装置，例如数模转换器（DAC）装置具有串行接口通信协议，该协议访问易失性和/或非易失性存储器，并且每当混合信号装置通电时允许预编程的输出电压。然而，与传统DAC器件不同，具有非易失性存储器的DAC器件可能需要特殊的接口通信协议来有效地操作DAC器件以及系统主控制器单元（MCU）之间的通信。提供了不违反标准串行总线通信协议的接口通信协议，用于在DAC设备的易失性和非易失性存储器之间进行通信，以便MCU可以访问DAC设备的存储器（非易失性和/或易失性存储器）。

3. 发明申请

US20090179785A1 Read and Write Interface Communications Protocol for Digital-to-Analog Signal Converter with Non-Volatile Memory 有权
标题翻译：具有非易失性存储器的数模转换信号转换器的读写接口通信协议
公开(公告)号：US20090179785A1
公开(公告)日：2009-07-16
申请号：US12336726
申请日：2008-12-17
申请人： Thomas Youbok Lee , Yann Johner , Philippe Gimmel , Tim Sherman , Jonathan Jackson , John Austin
发明人： Thomas Youbok Lee , Yann Johner , Philippe Gimmel , Tim Sherman , Jonathan Jackson , John Austin
IPC分类号： H03M1/74 , H03M1/66
CPC分类号： H03M1/66
摘要： A mixed signal integrated circuit device, e.g., digital-to-analog converter (DAC), has a serial interface communication protocol that accesses volatile and/or non-volatile memory and allows a preprogrammed output voltage whenever the mixed signal device is powered-up. However, unlike conventional DACs, DACs with non-volatile memory may need special interface communication protocols for effective operation of the DAC and communications between a system master controller unit (MCU). Interface communications protocols that do not violate standard serial bus communications protocols are provided for communicating between the volatile and non-volatile memories of the DAC so that the MCU may access the DAC's memories (non-volatile and/or volatile memories). The mixed signal integrated circuit device has a user programmable address.
摘要翻译：混合信号集成电路器件（例如数模转换器（DAC））具有串行接口通信协议，可以在混合信号器件上电时访问易失性和/或非易失性存储器并允许预编程的输出电压。然而，与传统DAC不同，具有非易失性存储器的DAC可能需要特殊的接口通信协议来有效地操作DAC和系统主控制器单元（MCU）之间的通信。提供了不违反标准串行总线通信协议的接口通信协议，用于在DAC的易失性和非易失性存储器之间通信，以便MCU可以访问DAC的存储器（非易失性和/或易失性存储器）。混合信号集成电路器件具有用户可编程地址。

4. 发明授权

US07755527B2 Read and write interface communications protocol for digital-to-analog signal converter with non-volatile memory 有权
标题翻译：用于具有非易失性存储器的数模转换信号转换器的读写接口通信协议
公开(公告)号：US07755527B2
公开(公告)日：2010-07-13
申请号：US12336726
申请日：2008-12-17
申请人： Thomas Youbok Lee , Yann Johner , Philippe Gimmel , Tim Sherman , Jonathan Jackson , John Austin
发明人： Thomas Youbok Lee , Yann Johner , Philippe Gimmel , Tim Sherman , Jonathan Jackson , John Austin
IPC分类号： H03M1/66
CPC分类号： H03M1/66
摘要： A mixed signal integrated circuit device, e.g., digital-to-analog converter (DAC), has a serial interface communication protocol that accesses volatile and/or non-volatile memory and allows a preprogrammed output voltage whenever the mixed signal device is powered-up. However, unlike conventional DACs, DACs with non-volatile memory may need special interface communication protocols for effective operation of the DAC and communications between a system master controller unit (MCU). Interface communications protocols that do not violate standard serial bus communications protocols are provided for communicating between the volatile and non-volatile memories of the DAC so that the MCU may access the DAC's memories (non-volatile and/or volatile memories). The mixed signal integrated circuit device has a user programmable address.
摘要翻译：混合信号集成电路器件（例如数模转换器（DAC））具有串行接口通信协议，可以在混合信号器件上电时访问易失性和/或非易失性存储器并允许预编程的输出电压。然而，与传统DAC不同，具有非易失性存储器的DAC可能需要特殊的接口通信协议来有效地操作DAC和系统主控制器单元（MCU）之间的通信。提供了不违反标准串行总线通信协议的接口通信协议，用于在DAC的易失性和非易失性存储器之间通信，以便MCU可以访问DAC的存储器（非易失性和/或易失性存储器）。混合信号集成电路器件具有用户可编程地址。

5. 发明授权

US08339299B2 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator using a chopper voltage reference 有权
标题翻译：使用斩波电压参考的开关电容Σ-Δ调制器的2相增益校准和缩放方案
公开(公告)号：US08339299B2
公开(公告)日：2012-12-25
申请号：US13004127
申请日：2011-01-11
申请人： Vincent Quiquempoix , Yann Johner , Gabriele Bellini
发明人： Vincent Quiquempoix , Yann Johner , Gabriele Bellini
IPC分类号： H03M3/00
CPC分类号： H03M1/0663 , H03M1/0665 , H03M3/422 , H03M3/456 , H03M3/464
摘要： A sigma-delta modulator has a chopper voltage reference providing a reference signal having a clock dependent offset voltage, a single-bit or a multi-bit digital-to-analog converter (DAC); a plurality of capacitor pairs; a plurality of switches to couple any capacitor pair to an input or reference signal; and a control unit controlling sampling through said switches to perform a charge transfer in two phases wherein any capacitor pair can be selected to be assigned to the input or reference signal, wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically, and wherein a DAC output value and a reference offset state define switching sequences wherein each switching sequence independently rotates said capacitor pairs and wherein at least one switching sequence is selected depending on a current DAC output value and a current reference offset state.
摘要翻译： Σ-Δ调制器具有提供具有时钟相关偏移电压的参考信号的斩波器参考电压，单位或多位数模转换器（DAC）; 多个电容器对; 多个开关，用于将任何电容器对耦合到输入或参考信号; 以及控制单元，其控制通过所述开关的采样以执行两个阶段的电荷转移，其中可以选择任何电容器对来分配给输入或参考信号，其中在多个电荷传输之后，通过旋转增益误差来执行增益误差消除电容器对，并且其中DAC输出值和参考偏移状态定义切换序列，其中每个切换序列独立地旋转所述电容器对，并且其中根据当前DAC输出值和当前参考偏移状态来选择至少一个切换序列。

6. 发明授权

US08222955B2 Compensated bandgap 有权
标题翻译：补偿带隙
公开(公告)号：US08222955B2
公开(公告)日：2012-07-17
申请号：US12818887
申请日：2010-06-18
申请人： Philippe Duval , Yann Johner , Fabien Vaucher
发明人： Philippe Duval , Yann Johner , Fabien Vaucher
IPC分类号： G05F1/10
CPC分类号： G05F3/30
摘要： An integrated circuit has an untrimmed bandgap generation circuit; and a bandgap generation circuit coupled to the untrimmed bandgap generation circuit. The bandgap generation circuit has a current source controlled by the untrimmed bandgap generation circuit and coupled in series with a resistor and a first bipolar diode device, one or more of bipolar diode devices, each bipolar diode device coupled in parallel with the first bipolar diode device, wherein a trimmed bandgap reference voltage output of the integrated circuit is a function of the number of bipolar diode devices.
摘要翻译：集成电路具有未修整的带隙产生电路; 以及耦合到未校准带隙产生电路的带隙产生电路。带隙产生电路具有由未调整的带隙产生电路控制的电流源，并与电阻器和第一双极二极管器件串联耦合，一个或多个双极二极管器件，每个双极二极管器件与第一双极二极管器件并联耦合，其中所述集成电路的修整带隙参考电压输出是双极二极管器件的数量的函数。

7. 发明申请

US20110074495A1 COMPENSATED BANDGAP 有权
标题翻译：补偿带
公开(公告)号：US20110074495A1
公开(公告)日：2011-03-31
申请号：US12818887
申请日：2010-06-18
申请人： Philippe Duval , Yann Johner , Fabien Vaucher
发明人： Philippe Duval , Yann Johner , Fabien Vaucher
IPC分类号： G05F3/02
CPC分类号： G05F3/30
摘要： An integrated circuit has an untrimmed bandgap generation circuit; and a bandgap generation circuit coupled to the untrimmed bandgap generation circuit. The bandgap generation circuit has a current source controlled by the untrimmed bandgap generation circuit and coupled in series with a resistor and a first bipolar diode device, one or more of bipolar diode devices, each bipolar diode device coupled in parallel with the first bipolar diode device, wherein a trimmed bandgap reference voltage output of the integrated circuit is a function of the number of bipolar diode devices.
摘要翻译：集成电路具有未修整的带隙产生电路; 以及耦合到未校准带隙产生电路的带隙产生电路。带隙产生电路具有由未调整的带隙产生电路控制的电流源，并与电阻器和第一双极二极管器件串联耦合，一个或多个双极二极管器件，每个双极二极管器件与第一双极二极管器件并联耦合，其中所述集成电路的修整带隙参考电压输出是双极二极管器件的数量的函数。

8. 发明申请

US20110163901A1 2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR USING A CHOPPER VOLTAGE REFERENCE 有权
标题翻译：使用斩波电压参考的开关电容器SIGMA-DELTA调制器的2相增益校准和调整方案
公开(公告)号：US20110163901A1
公开(公告)日：2011-07-07
申请号：US13004127
申请日：2011-01-11
申请人： Vincent Quiquempoix , Yann Johner , Gabriele Bellini
发明人： Vincent Quiquempoix , Yann Johner , Gabriele Bellini
IPC分类号： H03M3/02
CPC分类号： H03M1/0663 , H03M1/0665 , H03M3/422 , H03M3/456 , H03M3/464
摘要： A sigma-delta modulator has a chopper voltage reference providing a reference signal having a clock dependent offset voltage, a single-bit or a multi-bit digital-to-analog converter (DAC); a plurality of capacitor pairs; a plurality of switches to couple any capacitor pair to an input or reference signal; and a control unit controlling sampling through said switches to perform a charge transfer in two phases wherein any capacitor pair can be selected to be assigned to the input or reference signal, wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically, and wherein a DAC output value and a reference offset state define switching sequences wherein each switching sequence independently rotates said capacitor pairs and wherein at least one switching sequence is selected depending on a current DAC output value and a current reference offset state.
摘要翻译： Σ-Δ调制器具有提供具有时钟相关偏移电压的参考信号的斩波器参考电压，单位或多位数模转换器（DAC）; 多个电容器对; 多个开关，用于将任何电容器对耦合到输入或参考信号; 以及控制单元，其控制通过所述开关的采样以执行两个阶段的电荷转移，其中可以选择任何电容器对来分配给输入或参考信号，其中在多个电荷传输之后，通过旋转增益误差来执行增益误差消除电容器对，并且其中DAC输出值和参考偏移状态定义切换序列，其中每个切换序列独立地旋转所述电容器对，并且其中根据当前DAC输出值和当前参考偏移状态来选择至少一个切换序列。

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