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    • 2. 发明申请
    • INTEGRATED CIRCUIT AND STANDARD CELL FOR AN INTEGRATED CIRCUIT
    • 集成电路的集成电路和标准电路
    • US20100321063A1
    • 2010-12-23
    • US12817709
    • 2010-06-17
    • Tilo FERCHLANDThorsten RIEDELMatthias VORWERK
    • Tilo FERCHLANDThorsten RIEDELMatthias VORWERK
    • H03K19/21
    • H03K19/21
    • An integrated circuit and a standard cell of an integrated circuit, having a master-slave flip-flop, having a comparator logic at whose inputs the input signal of the master-slave flip-flop, the inverted input signal of the master-slave flip-flop, the output signal of the master-slave flip-flop, and the inverted output signal of the master-slave flip-flops are present, wherein the master-slave flip-flop has a master flip-flop and a slave flip-flop, wherein the slave flip-flop has a first inverting element and a second inverting element. Whereby for feedback, an output of the first inverting element is connected to an input of the second inverting element and an output of the second inverting element to an input of the first inverting element. Wherein, to output the output signal and the inverted output signal of the master-slave flip-flop, it is possible to connect the output and the input of the second inverting element to the inputs of the comparator logic so that the second inverting element and the comparator logic and an inverter form an exclusive-OR operation of the standard cell.
    • 集成电路和具有主从触发器的集成电路的标准单元,其具有比较器逻辑,其输入端为主从触发器的输入信号,主从触发器的反相输入信号 存在主从触发器的输出信号和主从触发器的反相输出信号,其中主从触发器具有主触发器和从触发器, 其中从触发器具有第一反相元件和第二反相元件。 由此,对于反馈,第一反相元件的输出端连接到第二反相元件的输入端和第二反相元件的输出端到第一反相元件的输入端。 其中,为了输出主从触发器的输出信号和反相输出信号,可以将第二反相元件的输出和输入连接到比较器逻辑的输入,使得第二反相元件和 比较器逻辑和逆变器形成标准单元的异或运算。