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1. 发明授权

US08169108B2 Capacitive isolator 有权
标题翻译：电容隔离器
公开(公告)号：US08169108B2
公开(公告)日：2012-05-01
申请号：US12060049
申请日：2008-03-31
申请人： Timothy Dupuis , Axel Thomsen , Zhiwei Dong , Ka Y. Leung
发明人： Timothy Dupuis , Axel Thomsen , Zhiwei Dong , Ka Y. Leung
IPC分类号： H04B1/18
CPC分类号： H01L23/66 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L24/06 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05553 , H01L2224/05554 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H04B2203/5491 , H04L25/0268 , H01L2924/00 , H01L2224/45099
摘要： An integrated circuit provides high voltage isolation capabilities. The circuit includes a first area containing a first group of functional circuitry located in a substrate of the integrated circuit. This circuit also includes a second area containing a second group of functional circuitry also contained within the substrate of the integrated circuit. Capacitive isolation circuitry located in the conductive layers in the integrated circuit provide a high voltage isolation link between the first group of functional circuitry and the second group of functional circuitry. The capacitive isolation circuitry distributes a first portion of the high voltage isolation signal across the first group of capacitors in the capacitive isolation circuitry and distributes a second portion of the high voltage isolation circuitry across the second group of capacitors in the capacitive isolation circuitry.
摘要翻译：集成电路提供高电压隔离功能。电路包括第一区域，其包含位于集成电路的衬底中的第一组功能电路。该电路还包括第二区域，其包含也包含在集成电路的衬底内的第二组功能电路。位于集成电路中的导电层中的电容隔离电路在第一组功能电路和第二组功能电路之间提供高电压隔离连接。电容隔离电路将高电压隔离信号的第一部分分布在电容隔离电路中的第一组电容器上，并将高压隔离电路的第二部分分布在电容隔离电路中的第二组电容器上。

2. 发明授权

US08441325B2 Isolator with complementary configurable memory 有权
标题翻译：隔离器具有互补的可配置存储器
公开(公告)号：US08441325B2
公开(公告)日：2013-05-14
申请号：US12494618
申请日：2009-06-30
申请人： Phil A. Callahan , Ahsan Javed , Zhiwei Dong , Axel Thomsen , Donald E. Alfano , Timothy Dupuis , Ka Y. Leung
发明人： Phil A. Callahan , Ahsan Javed , Zhiwei Dong , Axel Thomsen , Donald E. Alfano , Timothy Dupuis , Ka Y. Leung
IPC分类号： H03H2/00 , H04B3/00
CPC分类号： H01L24/48 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L23/642 , H01L23/66 , H01L24/06 , H01L24/49 , H01L25/0655 , H01L2223/6611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48472 , H01L2224/49171 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H04B2203/5491 , H01L2224/45099 , H01L2924/00
摘要： An isolator that includes first and second substantially identical circuitry galvanically isolated from each other and each having at least one communications channel thereon for communicating signals across an isolation boundary therebetween and each of said first and second circuitry having configurable functionality associated with the operation thereof. A coupling device is provided for coupling signal across the isolation boundary between the at least one communication channels of the first and second circuitry. First and second configuration memories are provided, each associated with a respective one of the first and second circuitry. First and second configuration control devices are provided, each associated with a respective one of the first and second circuitry and each configuring the functionality of the associated one of the first and second circuitry. The first and second configurable memories have stored therein complementary configuration information to control each of the functionalities of the first and second circuitry to operate in a complementary manner for communication of signals across the isolation boundary.
摘要翻译：一种隔离器，其包括彼此电隔离的第一和第二基本相同的电路，并且每个具有至少一个用于在其间的隔离边界传送信号的通信信道，所述第一和第二电路中的每一个具有与其操作相关联的可配置功能。提供耦合装置用于在第一和第二电路的至少一个通信信道之间的隔离边界上耦合信号。提供第一和第二配置存储器，每个与第一和第二电路中的相应一个相关联。提供第一和第二配置控制设备，每个配置控制设备与第一和第二电路中的相应一个相关联，并且每个配置控制设备配置第一和第二电路中相关联的一个的功能。第一和第二可配置存储器在其中存储有互补配置信息，以控制第一和第二电路的每个功能以互补的方式进行操作，用于跨越隔离边界的信号通信。

3. 发明授权

US08198951B2 Capacitive isolation circuitry 有权
标题翻译：电容隔离电路
公开(公告)号：US08198951B2
公开(公告)日：2012-06-12
申请号：US12414379
申请日：2009-03-30
申请人： Zhiwei Dong , Shouli Yan , Axel Thomsen , William W. K. Tang , Ka Y. Leung
发明人： Zhiwei Dong , Shouli Yan , Axel Thomsen , William W. K. Tang , Ka Y. Leung
IPC分类号： H04B3/28 , H01P5/02
CPC分类号： H04B3/02 , H01L23/48 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L23/66 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L2223/6611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/49171 , H01L2224/49175 , H01L2224/49176 , H01L2224/85399 , H01L2225/06506 , H01L2225/06527 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01032 , H01L2924/01033 , H01L2924/01082 , H01L2924/01083 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H03K5/135 , H03K17/689 , H03M9/00 , H04L5/14 , H04L25/0266 , H04L25/0268 , H04L25/0272 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： An integrated circuit having voltage isolation capabilities includes a plurality of communications channels for transceiving data from the integrated circuit. Each of the communications channel includes capacitive isolation circuitry located in conductive layers of the integrated circuit for providing a high voltage isolation link. The capacitive isolation circuitry distributes a first portion of a high voltage isolation signal across a first group of capacitors on a first link and a second link in the capacitive isolation circuitry and distributes a second portion of the high voltage isolation signal across a second group of capacitors in the first link and the second link in the capacitive isolation circuitry. A differential receiver on each of the plurality of communications channels receives the data on the first link and the second link. A differential transmitter on each of the plurality of communications channels transmits the data on the first link at a selected one of a first phase and a second phase and for transmitting the data on the second link at the selected one of the first phase and the second phase. The second phase is 180 degrees out of phase with the first phase. Each of the differential transmitters controls the selection of the first phase and the second phase on each of the first link and the second link such that only the first phase or the second phase is cross coupled onto a selected communications channel from adjacent communications channels.
摘要翻译：具有电压隔离能力的集成电路包括用于从集成电路收发数据的多个通信信道。每个通信信道包括位于集成电路的导电层中的电容隔离电路，用于提供高电压隔离链路。电容隔离电路在电容隔离电路中的第一链路和第二链路上跨第一组电容器分配高电压隔离信号的第一部分，并且将第二部分高电压隔离信号分配到第二组电容器在电容隔离电路中的第一链路和第二链路中。多个通信信道中的每一个上的差分接收机在第一链路和第二链路上接收数据。多个通信信道中的每一个上的差分发射机以第一相位和第二相位中的所选择的一个在第一链路上发送数据，并且用于在第一和第二相位中选定的一个的第二链路上发送数据相。第二阶段与第一阶段相差180度。每个差分发射机控制在第一链路和第二链路中的每一个上的第一相位和第二相位的选择，使得只有第一相位或第二相位相互耦合到来自相邻通信信道的所选择的通信信道上。

4. 发明授权

US07902627B2 Capacitive isolation circuitry with improved common mode detector 有权
标题翻译：具有改进的共模检测器的电容隔离电路
公开(公告)号：US07902627B2
公开(公告)日：2011-03-08
申请号：US12414387
申请日：2009-03-30
申请人： Zhiwei Dong , Shouli Yan , Axel Thomsen , William W. K. Tang , Ka Y. Leung
发明人： Zhiwei Dong , Shouli Yan , Axel Thomsen , William W. K. Tang , Ka Y. Leung
IPC分类号： H01L25/00
CPC分类号： H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05554 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/49096 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H03K17/689 , H04L5/14 , H04L25/0268 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： An integrated circuit having voltage isolation capabilities comprising a first galvanically isolated area of the integrated circuit containing a first group of functional circuitry for processing a data stream. The first group of functional circuitry located in a substrate of the integrated circuit. Capacitive isolation circuitry located in conductive layers of the integrated circuit provides a high voltage isolation link between the first group of functional circuitry and a second group of functional circuitry connected to the integrated circuit through the capacitive isolation circuitry. The capacitive isolation circuitry includes a differential transmitter for transmitting data in a differential signal to the second group of functional circuitry via the capacitive isolation circuitry. A differential receiver receives data within the differential signal from the second group of functional circuitry via the capacitive isolation circuitry. A detector circuit within the differential receiver detects the received data. The detector circuit monitors the differential signal and generates a first logical output when a voltage generated responsive to the differential signal exceeds a programmable voltage threshold level and generates a second logical output when the voltage generated responsive to the differential signal falls below the programmable voltage threshold level.
摘要翻译：一种具有电压隔离能力的集成电路，包括集成电路的第一电隔离区域，其包含用于处理数据流的第一组功能电路。位于集成电路的基板中的第一组功能电路。位于集成电路的导电层中的电容隔离电路在第一组功能电路之间提供高电压隔离连接，以及通过电容隔离电路连接到集成电路的第二组功能电路。电容隔离电路包括用于经由电容隔离电路将差分信号中的数据传送到第二组功能电路的差分发射器。差分接收器经由电容隔离电路从第二组功能电路接收差分信号内的数据。差分接收器内的检测器电路检测接收到的数据。当响应于差分信号产生的电压超过可编程电压阈值电平时，检测器电路监视差分信号并产生第一逻辑输出，并且当响应于差分信号产生的电压低于可编程电压阈值电平时产生第二逻辑输出。

5. 发明申请

US20130222162A1 DIGITAL TO ANALOG CONVERTER 有权
标题翻译：数字到模拟转换器
公开(公告)号：US20130222162A1
公开(公告)日：2013-08-29
申请号：US13408173
申请日：2012-02-29
申请人： Jinwen Xiao , Pavel Konecny , Axel Thomsen , Ka Y. Leung
发明人： Jinwen Xiao , Pavel Konecny , Axel Thomsen , Ka Y. Leung
IPC分类号： H03M1/10 , H03M1/66
CPC分类号： H03M1/1047 , H03M1/745 , H03M1/785
摘要： An input digital signal is converted to an analog signal using a main digital to analog converter (DAC) and a sub DAC. An offset value is subtracted from the input digital signal to generate an offset adjusted digital signal. The main DAC converts the offset adjusted digital signal to a first analog signal. A second digital signal is generated based on the offset value and a correction factor determined, at least in part, during calibration of the main DAC. The sub DAC converts the second digital to a second analog signal, which when combined with the first analog signal, provides an analog representation of the input digital signal.
摘要翻译：使用主数模转换器（DAC）和子DAC将输入数字信号转换为模拟信号。从输入数字信号中减去偏移值，以生成偏移调整数字信号。主DAC将偏移调整后的数字信号转换为第一个模拟信号。基于偏移值和至少部分地在主DAC的校准期间确定的校正因子来生成第二数字信号。子DAC将第二数字转换为第二模拟信号，当与第一模拟信号组合时，其提供输入数字信号的模拟表示。

6. 发明授权

US08681026B2 Digital to analog converter 有权
标题翻译：数模转换器
公开(公告)号：US08681026B2
公开(公告)日：2014-03-25
申请号：US13408173
申请日：2012-02-29
申请人： Jinwen Xiao , Pavel Konecny , Axel Thomsen , Ka Y. Leung
发明人： Jinwen Xiao , Pavel Konecny , Axel Thomsen , Ka Y. Leung
IPC分类号： H03M1/06
CPC分类号： H03M1/1047 , H03M1/745 , H03M1/785
摘要： An input digital signal is converted to an analog signal using a main digital to analog converter (DAC) and a sub DAC. An offset value is subtracted from the input digital signal to generate an offset adjusted digital signal. The main DAC converts the offset adjusted digital signal to a first analog signal. A second digital signal is generated based on the offset value and a correction factor determined, at least in part, during calibration of the main DAC. The sub DAC converts the second digital to a second analog signal, which when combined with the first analog signal, provides an analog representation of the input digital signal.
摘要翻译：使用主数模转换器（DAC）和子DAC将输入数字信号转换为模拟信号。从输入数字信号中减去偏移值，以生成偏移调整数字信号。主DAC将偏移调整后的数字信号转换为第一个模拟信号。基于偏移值和至少部分地在主DAC的校准期间确定的校正因子来生成第二数字信号。子DAC将第二数字转换为第二模拟信号，当与第一模拟信号组合时，该模拟信号提供输入数字信号的模拟表示。

7. 发明授权

US08451032B2 Capacitive isolator with schmitt trigger 有权
标题翻译：具有施密特触发器的电容隔离器
公开(公告)号：US08451032B2
公开(公告)日：2013-05-28
申请号：US12976020
申请日：2010-12-22
申请人： Zhiwei Dong , Ka Y. Leung
发明人： Zhiwei Dong , Ka Y. Leung
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K3/3565
摘要： High voltage isolation capabilities are provided using a first integrated circuit die that includes an inverting circuit path and a non-inverting circuit path coupled to receive a single-ended signal and to generate a differential signal from the single-ended signal for transmission over an isolation link. A second integrated circuit die includes a differential Schmitt trigger circuit coupled to the differential signal communicated over the isolation link and to supply at least one output signal corresponding thereto. An isolation barrier is disposed between the inverting and non-inverting circuit paths and the differential Schmitt trigger circuit and includes at least two isolation capacitors coupled to respectively transmit each portion of the differential signal.
摘要翻译：使用第一集成电路管芯提供高电压隔离能力，所述第一集成电路管芯包括反相电路路径和非反相电路路径，所述反相电路路径和非反相电路路径被耦合以接收单端信号并从单端信号产生差分信号以通过隔离传输链接。第二集成电路管芯包括与通过隔离链路传送的差分信号耦合的差分施密特触发器电路，并提供与其对应的至少一个输出信号。隔离屏障设置在反相和非反相电路路径和差分施密特触发电路之间，并且包括耦合以分别传输差分信号的每个部分的至少两个隔离电容器。

8. 发明申请

US20120161841A1 CAPACATIVE ISOLATOR WITH SCHMITT TRIGGER 有权
标题翻译：电容式隔离器与SCHMITT TRIGGER
公开(公告)号：US20120161841A1
公开(公告)日：2012-06-28
申请号：US12976020
申请日：2010-12-22
申请人： Zhiwei Dong , Ka Y. Leung
发明人： Zhiwei Dong , Ka Y. Leung
IPC分类号： H03K3/00
CPC分类号： H03K3/3565
摘要： High voltage isolation capabilities are provided using a first integrated circuit die that includes an inverting circuit path and a non-inverting circuit path coupled to receive a single-ended signal and to generate a differential signal from the single-ended signal for transmission over an isolation link. A second integrated circuit die includes a differential Schmitt trigger circuit coupled to the differential signal communicated over the isolation link and to supply at least one output signal corresponding thereto. An isolation barrier is disposed between the inverting and non-inverting circuit paths and the differential Schmitt trigger circuit and includes at least two isolation capacitors coupled to respectively transmit each portion of the differential signal.
摘要翻译：使用第一集成电路管芯提供高电压隔离能力，所述第一集成电路管芯包括反相电路路径和非反相电路路径，所述反相电路路径和非反相电路路径被耦合以接收单端信号并从单端信号产生差分信号以通过隔离传输链接。第二集成电路管芯包括与通过隔离链路传送的差分信号耦合的差分施密特触发器电路，并提供与其对应的至少一个输出信号。隔离屏障设置在反相和非反相电路路径和差分施密特触发电路之间，并且包括耦合以分别传输差分信号的每个部分的至少两个隔离电容器。

9. 发明授权

US07680976B2 Method and apparatus for emulating rewritable memory with non-rewritable memory in an MCU 有权
标题翻译：用于在MCU中仿真具有不可重写存储器的可重写存储器的方法和装置
公开(公告)号：US07680976B2
公开(公告)日：2010-03-16
申请号：US11695014
申请日：2007-03-31
申请人： Ka Y. Leung
发明人： Ka Y. Leung
IPC分类号： G06F12/00
CPC分类号： G06F12/0238 , G06F12/0246 , G06F2212/1056 , G06F2212/7202
摘要： An integrated circuit having an embedded multiple time programmable memory includes a processing core for executing stored instructions with a data memory and a non volatile memory. The non-volatile memory block provides for storage of program instructions and includes a plurality of blocks of non-volatile memory, each of which can be written to once and read from many times and each having a size that is equal to or less than a program memory address space addressable by the processing core for output of data there from. It also includes a reserve storage location for storing a status word defining the one of the plurality of blocks addressable by the processing core, the status word operable to be changed in response to external signals when another of the plurality of blocks is to be selected, such that once another of the plurality of blocks is selected, the status word cannot indicate as addressable by the processing core a prior one of the plurality of blocks that was defined by the status word as being previously addressable by the processing core.
摘要翻译：具有嵌入式多时间可编程存储器的集成电路包括用于使用数据存储器和非易失性存储器执行存储的指令的处理核心。非易失性存储器块提供程序指令的存储，并且包括多个非易失性存储器块，每个块可被写入一次并且从多次读取并且每个具有等于或小于程序存储器地址空间可由处理核心寻址，用于输出数据。它还包括一个保留存储位置，用于存储定义可由处理核心寻址的多个块中的一个的状态字，该状态字可操作以在多个块中的另一个块被选择时响应于外部信号被改变，使得一旦选择了多个块中的另一个，则状态字不能被处理核心指示，该状态字由状态字定义为可由处理核心预先寻址的多个块中的先前的一个块。

10. 发明授权

US07498962B2 Analog-to-digital converter with low power track-and-hold mode 有权
标题翻译：具有低功率跟踪和保持模式的模数转换器
公开(公告)号：US07498962B2
公开(公告)日：2009-03-03
申请号：US11618644
申请日：2006-12-29
申请人： Donald E. Alfano , Danny J. Allred , Douglas S. Piasecki , Kenneth W. Fernald , Ka Y. Leung , Brian Caloway , Alvin Storvik , Paul Highley , Douglas R. Holberg
发明人： Donald E. Alfano , Danny J. Allred , Douglas S. Piasecki , Kenneth W. Fernald , Ka Y. Leung , Brian Caloway , Alvin Storvik , Paul Highley , Douglas R. Holberg
IPC分类号： H03M1/00
CPC分类号： G06F13/385 , G06F1/08 , G06F15/7814 , H03M1/122 , H03M1/183 , H03M1/462 , Y02D10/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A method for converting analog data to digital data includes operating an analog-to-digital data converter in a tracking mode to sample an input signal and in a convert mode to convert the sampled input signal after sampling to a digital signal. The analog-to-digital data converter is controlled with a controller to operate in different modes of operation by providing at least one step wherein the tracking mode of operation is controlled to initiate at a predetermined time to begin the sampling operation.
摘要翻译：一种将模拟数据转换为数字数据的方法包括以跟踪模式操作模拟数字数据转换器，以对输入信号进行采样，并以转换模式将采样后的采样输入信号转换为数字信号。模拟数字数据转换器由控制器控制，以通过提供至少一个步骤操作在不同的操作模式，其中跟踪操作模式被控制以在预定时间开始以开始采样操作。

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