专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110170542A1 DISTRIBUTED MULTICAST PACKET REPLICATION WITH CENTRALIZED QUALITY OF SERVICE 有权
标题翻译：具有集中质量服务的分布式多媒体分组复制
公开(公告)号：US20110170542A1
公开(公告)日：2011-07-14
申请号：US12686314
申请日：2010-01-12
申请人： Tong Liu , Yie-Fong Dan , Pawel Sowinski , Chad Mikkelson , William Beebee
发明人： Tong Liu , Yie-Fong Dan , Pawel Sowinski , Chad Mikkelson , William Beebee
IPC分类号： H04L12/56
CPC分类号： H04L12/18 , H04L47/12 , H04L47/22 , H04L47/2408 , H04L47/2425
摘要： A system includes a forwarding engine to schedule when replicas of a received multicast packet are forwarded towards one or more multicast recipients. The system also includes an egress interface device to replicate the multicast packet and forward the multicast packet replica towards the one or more multicast recipients when prompted by the forwarding engine based on the scheduling.
摘要翻译：系统包括转发引擎，用于调度所接收的多播分组的副本是否向一个或多个多播接收者转发。该系统还包括出口接口设备，用于复制多播分组，并且基于调度在由转发引擎提示时将多播分组副本转发到一个或多个多播接收者。

2. 发明授权

US08711752B2 Distributed multicast packet replication with centralized quality of service 有权
标题翻译：分布式组播数据包复制具有集中的服务质量
公开(公告)号：US08711752B2
公开(公告)日：2014-04-29
申请号：US12686314
申请日：2010-01-12
申请人： Tong Liu , Yie-Fong Dan , Pawel Sowinski , Chad Mikkelson , William Beebee
发明人： Tong Liu , Yie-Fong Dan , Pawel Sowinski , Chad Mikkelson , William Beebee
IPC分类号： H04H20/71
CPC分类号： H04L12/18 , H04L47/12 , H04L47/22 , H04L47/2408 , H04L47/2425
摘要： A system includes a forwarding engine to schedule when replicas of a received multicast packet are forwarded towards one or more multicast recipients. The system also includes an egress interface device to replicate the multicast packet and forward the multicast packet replica towards the one or more multicast recipients when prompted by the forwarding engine based on the scheduling.
摘要翻译：系统包括转发引擎，用于调度所接收的多播分组的副本是否向一个或多个多播接收者转发。该系统还包括出口接口设备，用于复制多播分组，并且基于调度在由转发引擎提示时将多播分组副本转发到一个或多个多播接收者。

3. 发明授权

US07346068B1 Traffic management scheme for crossbar switch 有权
标题翻译：交叉开关交通管理方案
公开(公告)号：US07346068B1
公开(公告)日：2008-03-18
申请号：US10319237
申请日：2002-12-13
申请人： Yie-Fong Dan , Sonny Tran , Rudy Klecka
发明人： Yie-Fong Dan , Sonny Tran , Rudy Klecka
IPC分类号： H04L12/56
CPC分类号： H04L49/3072 , H04L49/205 , H04L49/254 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/357
摘要： A crossbar switch is provided that can allocate output port bandwidth both among multiple classes of service and among input ports. In one implementation, there are two scheduling stages that may be implemented together. One scheduling stage can select traffic for output based on class of service whereas the other scheduling stage may perform a further selection based on destination output port. This allows greater flexibility in managing congestion and allocating limited available bandwidth.
摘要翻译：提供了一种交叉开关，其可以在多个服务类别和输入端口之间分配输出端口带宽。在一个实现中，存在可以一起实现的两个调度阶段。一个调度阶段可以基于服务等级来选择用于输出的流量，而另一个调度阶段可以基于目的地输出端口执行进一步的选择。这样可以更有弹性地管理拥塞并分配有限的可用带宽。

4. 发明授权

US06757791B1 Method and apparatus for reordering packet data units in storage queues for reading and writing memory 有权
标题翻译：用于对存储队列中的分组数据单元进行重新排序以读取和写入存储器的方法和装置
公开(公告)号：US06757791B1
公开(公告)日：2004-06-29
申请号：US09282080
申请日：1999-03-30
申请人： Robert O'Grady , Sonny N. Tran , Yie-Fong Dan , Bruce Wilford
发明人： Robert O'Grady , Sonny N. Tran , Yie-Fong Dan , Bruce Wilford
IPC分类号： G06F1300
CPC分类号： H04L49/9094 , H04L49/90
摘要： A method and system for reordering data units that are to be written to, or read from, selected locations in a memory are described herein. The data units are reordered so that an order of accessing memory is optimal for speed of reading or writing memory, not necessarily an order in which data units were received or requested. Packets that are received at input interfaces are divided into cells, with cells being allocated to independent memory banks. Many such memory banks are kept busy concurrently, so cells (and thus the packets) are read into the memory as rapidly as possible. The system may include an input queue for receiving data units in a first sequence and a set of storage queues coupled to the input queue for receiving data units from the input queue. The data units may be written from the storage queues to the memory in an order other than the first sequence. The system may also include a disassembly element for generating data units from a packet and a reassembling element for reassembling a packet from the data units.
摘要翻译：本文描述了用于对要写入或从存储器中的选定位置读取的数据单元进行重新排序的方法和系统。数据单元被重新排序，使得访问存储器的顺序对于读取或写入存储器的速度是最佳的，而不一定是接收或请求数据单元的顺序。在输入接口处接收的数据包被分为单元，单元被分配给独立的存储体。许多这样的存储体同时保持繁忙，因此单元（以及分组）被尽可能快地读入存储器。系统可以包括用于以第一序列接收数据单元的输入队列和耦合到输入队列的一组存储队列，用于从输入队列接收数据单元。数据单元可以以除第一序列之外的顺序从存储队列写入存储器。系统还可以包括用于从分组生成数据单元的反汇编元件和用于从数据单元重新组合分组的重组组件。

5. 发明授权

US07729259B1 Reducing latency jitter in a store-and-forward buffer for mixed-priority traffic 有权
标题翻译：减少混合优先流量的存储转发缓冲区中的延迟抖动
公开(公告)号：US07729259B1
公开(公告)日：2010-06-01
申请号：US10760935
申请日：2004-01-20
申请人： Steven Faulkner , Sonny Tran , Yie-Fong Dan
发明人： Steven Faulkner , Sonny Tran , Yie-Fong Dan
IPC分类号： H04L12/26
CPC分类号： H04L47/10 , H04L47/2441 , H04L47/266 , H04L47/30 , H04L47/36 , Y02D50/10
摘要： Methods and apparatus for reducing the average delay associated with sending a packet from one environment to another via a store and forward buffer are disclosed. According to one aspect of the present invention, a method for processing transmission units received over a first network connection includes receiving a first transmission unit on the first network connection, storing the first transmission unit in a buffer, and determining when contents of the buffer meet a plurality of criteria. The method also includes sending a backpressure over the first network connection when it is determined that the contents of the buffer meet the plurality of criteria. In one embodiment, determining when the contents of the buffer meet a plurality of criteria includes determining when the contents of the buffer are of an amount that exceeds a threshold and determining when the contents of the buffer include at least one full packet.
摘要翻译：公开了用于减少通过存储和转发缓冲器将分组从一个环境发送到另一个环境的平均延迟的方法和装置。根据本发明的一个方面，一种用于处理通过第一网络连接接收的传输单元的方法包括：在第一网络连接上接收第一传输单元，将第一传输单元存储在缓冲器中，以及确定缓冲器的内容何时满足多个标准。当确定缓冲器的内容符合多个标准时，该方法还包括在第一网络连接上发送背压。在一个实施例中，确定缓冲器的内容何时满足多个标准包括确定缓冲器的内容何时是超过阈值的量，以及确定缓冲器的内容何时包括至少一个完整数据包。

6. 发明授权

US08954806B2 Single event-upset controller wrapper that facilitates fault injection 有权
标题翻译：单个事件 - 不平衡控制器包装器，便于故障注入
公开(公告)号：US08954806B2
公开(公告)日：2015-02-10
申请号：US12962417
申请日：2010-12-07
申请人： Yie-Fong Dan , Shi-Jie Wen , Raymond Ng
发明人： Yie-Fong Dan , Shi-Jie Wen , Raymond Ng
IPC分类号： G06F11/00 , G06F11/24 , G11C29/10 , G11C29/56 , G11C29/50
CPC分类号： G06F11/24 , G11C29/10 , G11C29/56 , G11C2029/5002
摘要： A method that determines the system impact of single event upset (SEU) and a single event upset (SEU) wrapper that controls a SEU controller is disclosed. The method injects faults into a component (e.g. FPGA, ASIC) of an operational system that is carrying live traffic and monitors the system's response to the faults to determine the impact of SEU on the system. The SEU wrapper sends the SEU controller a pattern scheme that includes information indicating when, where, how often, and/or how long to inject bursts of one or more faults into memory of the component of the system. A burst of faults contains faults that are consecutively injected into the array of memory blocks. After each fault in a burst is injected, one or more errors in one or more memory elements are detected and/or corrected. Information regarding the detection and/or the correction of an error is updated using registers that store counters. After injecting a burst of faults, the SEU controller waits for a predetermined amount of time. While waiting for a predetermined amount of time, the system monitors the system response to the burst of faults, such as monitoring the system for failures. After waiting, the SEU controller determines whether to inject another burst of faults. Bursts of faults are injected into the plurality of memory blocks until a system failure is detected or until the pattern scheme indicates to no longer inject bursts of faults into the memory.
摘要翻译：公开了一种确定单事件不适（SEU）和控制SEU控制器的单事件不适（SEU）包装器的系统影响的方法。该方法将故障注入到承载实时流量的操作系统的组件（例如FPGA，ASIC）中，并监视系统对故障的响应，以确定SEU对系统的影响。 SEU包装器向SEU控制器发送模式方案，该模式方案包括指示何时，在哪里，多长时间和/或多长时间将一个或多个故障的突发注入到系统的组件的存储器中的信息。故障突发包含连续注入到存储块阵列中的故障。在突发中的每个故障被注入之后，一个或多个存储器元件中的一个或多个错误被检测和/或校正。关于检测和/或校正错误的信息使用存储计数器的寄存器来更新。在注入了一连串故障之后，SEU控制器等待预定的时间量。在等待预定时间的时候，系统监视系统对故障突发的响应，例如监视系统的故障。等待后，SEU控制器确定是否注入另一个故障突发。将故障突发注入到多个存储器块中，直到检测到系统故障，或直到模式方案指示不再将故障突发注入到存储器中。

7. 发明申请

US20100046519A1 Re-Ordering Segments of a Large Number of Segmented Service Flows 有权
标题翻译：重新订购大量分段服务流的细分
公开(公告)号：US20100046519A1
公开(公告)日：2010-02-25
申请号：US12196880
申请日：2008-08-22
申请人： Yie-Fong Dan , Edmund Au , Raymond Ng , Yanyan Cui
发明人： Yie-Fong Dan , Edmund Au , Raymond Ng , Yanyan Cui
IPC分类号： H04L12/56
CPC分类号： H04L47/10 , H04L47/34 , H04L49/9094
摘要： A method and network device for re-ordering segments of a segmented data stream. The method includes receiving at least two segments of a segmented data stream. A descriptor for each of the at least two segments is obtained, and the at least two segments are re-ordered to generate re-ordered segments, where the re-ordered segments are in an original order. A set of re-ordered segments are processed to obtain at least one data packet, where at least one descriptor is utilized in the processing of the set of re-ordered segments.
摘要翻译：一种用于重新排序分段数据流的段的方法和网络设备。该方法包括接收分段数据流的至少两个段。获得对于至少两个段中的每一个的描述符，并且重新排序至少两个段以产生重新排序的段，其中重新排序的段是原始顺序。一组重新排序的段被处理以获得至少一个数据分组，其中至少一个描述符被用于处理该重排序段的集合。

8. 发明申请

US20060270113A1 Method and system for reducing simultaneous switching output noise 审中-公开
标题翻译：降低同时开关输出噪声的方法和系统
公开(公告)号：US20060270113A1
公开(公告)日：2006-11-30
申请号：US11138806
申请日：2005-05-26
申请人： Yie-Fong Dan , Sonny Tran , Raymond Ng , Betty Lee , Selina Yuen
发明人： Yie-Fong Dan , Sonny Tran , Raymond Ng , Betty Lee , Selina Yuen
IPC分类号： H01L21/00
CPC分类号： G11C7/02 , G11C7/1006
摘要： A method and a system for reducing the simultaneous switching output noise in integrated circuit chips. The method includes sending a previous bit pattern and a current bit pattern consecutively on the data bus, wherein the previous bit pattern transitions to the current bit pattern and the number of bits that transition is greater than half the number of bits in the data bus; flipping the current bit pattern to obtain an intermediate bit pattern; sending the intermediate bit pattern; receiving the intermediate bit pattern; and flipping the received intermediate bit pattern, to retrieve the current bit pattern.
摘要翻译：一种降低集成电路芯片中同时开关输出噪声的方法和系统。该方法包括在数据总线上连续发送先前位模式和当前位模式，其中先前位模式转换到当前位模式，并且转换位数大于数据总线中位数的一半; 翻转当前位模式以获得中间位模式; 发送中间位模式; 接收中间位模式; 并翻转接收到的中间位模式，以检索当前的位模式。

9. 发明授权

US06687247B1 Architecture for high speed class of service enabled linecard 有权
标题翻译：架构为高速等级的服务启用了线卡
公开(公告)号：US06687247B1
公开(公告)日：2004-02-03
申请号：US09428870
申请日：1999-10-27
申请人： Bruce Wilford , Yie-Fong Dan
发明人： Bruce Wilford , Yie-Fong Dan
IPC分类号： H04L1228
CPC分类号： H04L45/302 , H04L45/00 , H04L45/40 , H04L45/502 , H04L45/583 , H04L47/50
摘要： A linecard architecture for high speed routing of data in a communications device. This architecture provides low latency routing based on packet priority: packet routing and processing occurs at line rate (wire speed) for most operations. A packet data stream is input to the inbound receiver, which uses a small packet FIFO to rapidly accumulate packet bytes. Once the header portion of the packet is received, the header alone is used to perform a high speed routing lookup and packet header modification. The queue manager then uses the class of service information in the packet header to enqueue the packet according to the required priority. Enqueued packets are buffered in a large memory space holding multiple packets prior to transmission across the device's switch fabric to the outbound linecard. On arrival at the outbound linecard, the packet is enqueued in the outbound transmitter portion of the linecard architecture. Another large, multi-packet memory structure, as employed in the inbound queue manager, provides buffering prior to transmission onto the network.
摘要翻译：用于在通信设备中高速路由数据的线卡架构。该架构基于分组优先级提供低延迟路由：分组路由和处理以大多数操作的线速率（线速度）发生。分组数据流被输入到入站接收机，其使用小分组FIFO来快速地累积分组字节。一旦接收到分组的报头部分，仅使用报头来执行高速路由查找和分组报头修改。队列管理器然后使用分组报头中的服务类别根据所需的优先级对该分组进行排队。在通过设备的交换结构传输到出站线卡之前，将入队数据包缓冲在一个容纳多个数据包的大型存储空间中。在到达出站线卡时，数据包将在线卡架构的出站发送器中排队。在入站队列管理器中使用的另一大型多分组存储器结构在传输到网络之前提供缓冲。

10. 发明授权

US08638796B2 Re-ordering segments of a large number of segmented service flows 有权
标题翻译：重新排序大量分段服务流的段
公开(公告)号：US08638796B2
公开(公告)日：2014-01-28
申请号：US12196880
申请日：2008-08-22
申请人： Yie-Fong Dan , Edmund Au , Raymond Ng , Yanyan Cui
发明人： Yie-Fong Dan , Edmund Au , Raymond Ng , Yanyan Cui
IPC分类号： H04L12/56
CPC分类号： H04L47/10 , H04L47/34 , H04L49/9094
摘要： A method and network device for re-ordering segments of a segmented data stream. The method includes receiving at least two segments of a segmented data stream. A descriptor for each of the at least two segments is obtained, and the at least two segments are re-ordered to generate re-ordered segments, where the re-ordered segments are in an original order. A set of re-ordered segments are processed to obtain at least one data packet, where at least one descriptor is utilized in the processing of the set of re-ordered segments.
摘要翻译：一种用于重新排序分段数据流的段的方法和网络设备。该方法包括接收分段数据流的至少两个段。获得对于至少两个段中的每一个的描述符，并且重新排序至少两个段以产生重新排序的段，其中重新排序的段是原始顺序。一组重新排序的段被处理以获得至少一个数据分组，其中至少一个描述符被用于处理该重排序段的集合。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式