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1. 发明申请

US20220326859A1 OBJECT MEMORY INTERFACES ACROSS SHARED LINKS 有权
公开(公告)号：US20220326859A1
公开(公告)日：2022-10-13
申请号：US17698584
申请日：2022-03-18
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06 , G06F11/00 , G06F12/0815 , G06F11/30 , G06F11/34 , G06F12/04 , G06F12/02 , G06F11/14
摘要： According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.

2. 发明申请

US20220261168A1 INFINITE MEMORY FABRIC HARDWARE IMPLEMENTATION WITH ROUTER 有权
公开(公告)号：US20220261168A1
公开(公告)日：2022-08-18
申请号：US17582416
申请日：2022-01-24
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06 , G06F16/22 , G06F12/109
摘要： Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric. The processing node may include a memory module storing and managing one or more memory objects, the one or more memory objects each include at least a first memory and a second memory, wherein: each memory object is created natively within the memory module, and each memory object is accessed using a single memory reference instruction without Input/Output (I/O) instructions; and a router configured to interface between a processor on the memory module and the one or more memory objects; wherein a set of data is stored within the first memory of the memory module; wherein the memory module dynamically determines that at least a portion of the set of data will be transferred from the first memory to the second memory; and wherein, in response to the determination that at least a portion of the set of data will be transferred from the first memory to the second memory, the router is configured to identify the portion to be transferred and to facilitate execution of the transfer.

3. 发明授权

US11269514B2 Memory fabric software implementation 有权
公开(公告)号：US11269514B2
公开(公告)日：2022-03-08
申请号：US16269833
申请日：2019-02-07
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F12/06 , G06F3/06 , G06F12/1072 , G06F16/18 , G06F13/00 , G06F12/02
摘要： A hardware-based processing node of an object memory fabric can comprise a memory module storing and managing one or more memory objects within an object-based memory space. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The memory module can provide an interface layer below an application layer of a software stack. The interface layer can comprise one or more storage managers managing hardware of a processor and controlling portions of the object-based memory space visible to a virtual address space and physical address space of the processor. The storage managers can further provide an interface between the object-based memory space and an operating system executed by the processor and an alternate object memory based storage transparent to software using the interface layer.

4. 发明授权

US11086521B2 Object memory data flow instruction execution 有权
公开(公告)号：US11086521B2
公开(公告)日：2021-08-10
申请号：US15001366
申请日：2016-01-20
申请人： ULTRATA, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06 , H04L29/08 , G06F12/0837 , G06F12/0817 , G06F12/06
摘要： Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can be used to provide a unique instruction model based on triggers defined in metadata of the memory objects. This model represents a dynamic dataflow method of execution in which processes are performed based on actual dependencies of the memory objects. This provides a high degree of memory and execution parallelism which in turn provides tolerance of variations in access delays between memory objects. In this model, sequences of instructions are executed and managed based on data access. These sequences can be of arbitrary length but short sequences are more efficient and provide greater parallelism.

5. 发明申请

US20190171373A1 OBJECT MEMORY INTERFACES ACROSS SHARED LINKS 审中-公开
公开(公告)号：US20190171373A1
公开(公告)日：2019-06-06
申请号：US16266460
申请日：2019-02-04
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06
摘要： According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.

6. 发明申请

US20190155524A1 MEMORY FABRIC OPERATIONS AND COHERENCY USING FAULT TOLERANT OBJECTS 审中-公开
公开(公告)号：US20190155524A1
公开(公告)日：2019-05-23
申请号：US16254043
申请日：2019-01-22
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06
摘要： According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can distribute and track the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes on a per-object basis. Distributing the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes can comprise storing, on a per-object basis, each memory object on two or more nodes of the plurality of hardware-based processing nodes of the object memory fabric.

7. 发明授权

US10235063B2 Memory fabric operations and coherency using fault tolerant objects 有权
公开(公告)号：US10235063B2
公开(公告)日：2019-03-19
申请号：US15371440
申请日：2016-12-07
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F12/00 , G06F3/06
摘要： According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can distribute and track the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes on a per-object basis. Distributing the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes can comprise storing, on a per-object basis, each memory object on two or more nodes of the plurality of hardware-based processing nodes of the object memory fabric.

8. 发明申请

US20180225061A1 INFINITE MEMORY FABRIC STREAMS AND APIS 审中-公开
公开(公告)号：US20180225061A1
公开(公告)日：2018-08-09
申请号：US15946860
申请日：2018-04-06
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06 , G06F9/54
CPC分类号： G06F3/0647 , G06F3/061 , G06F3/0613 , G06F3/0635 , G06F3/067 , G06F3/0683 , G06F9/543
摘要： Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.

9. 发明申请

US20180217755A1 UTILIZATION OF A DISTRIBUTED INDEX TO PROVIDE OBJECT MEMORY FABRIC COHERENCY 审中-公开
公开(公告)号：US20180217755A1
公开(公告)日：2018-08-02
申请号：US15938061
申请日：2018-03-28
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06 , G06F12/0877
CPC分类号： G06F3/0604 , G06F3/061 , G06F3/0631 , G06F3/0635 , G06F3/0638 , G06F3/064 , G06F3/0644 , G06F3/0647 , G06F3/0659 , G06F3/067 , G06F3/0683 , G06F3/0685 , G06F12/0817 , G06F12/0837 , G06F12/0877 , G06F2212/2542 , G06F2212/6012
摘要： Embodiments of the invention provide systems and methods to implement an object memory fabric. Object memory modules may include object storage storing memory objects, memory object meta-data, and a memory module object directory. Each memory object and/or memory object portion may be created natively within the object memory module and may be a managed at a memory layer. The memory module object directory may index all memory objects and/or portions within the object memory module. A hierarchy of object routers may communicatively couple the object memory modules. Each object router may maintain an object cache state for the memory objects and/or portions contained in object memory modules below the object router in the hierarchy. The hierarchy, based on the object cache state, may behave in aggregate as a single object directory communicatively coupled to all object memory modules and to process requests based on the object cache state.

10. 发明授权

US11256438B2 Infinite memory fabric hardware implementation with memory 有权
公开(公告)号：US11256438B2
公开(公告)日：2022-02-22
申请号：US16883701
申请日：2020-05-26
申请人： Ultrata, LLC
发明人： Steven J. Frank , Larry Reback
IPC分类号： G06F3/06
摘要： Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric. The processing node may include a memory module storing and managing one or more memory objects, the one or more memory objects each include at least a first memory and a second memory, wherein the first memory has a lower latency than the second memory, and wherein each memory object is created natively within the memory module, and each memory object is accessed using a single memory reference instruction without Input/Output (I/O) instructions, wherein a set of data is stored within the first memory of the memory module; wherein the memory module is configured to receive an indication of a subset of the set of data that is eligible to be transferred between the first memory and the second memory; and wherein the memory module dynamically determines which of the subset of data will be transferred to the second memory based on access patterns associated with the object memory fabric.

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