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1. 发明授权

US10262938B2 Semiconductor structure having conductive layer overlapping field oxide 有权
公开(公告)号：US10262938B2
公开(公告)日：2019-04-16
申请号：US15692641
申请日：2017-08-31
申请人： Vanguard International Semiconductor Corporation
发明人： Cheng-Tsung Wu , Shin-Cheng Lin , Yu-Hao Ho , Wen-Hsin Lin
IPC分类号： H01L23/52 , H01L29/10 , H01L29/40 , H01L29/78 , H01L29/86 , H01L23/522 , H01L23/528 , H01L49/02 , H01L29/66 , H01L29/861 , H01L21/74 , H01L23/532
摘要： A semiconductor structure including a substrate, a first well, a first doped region, a second well, a second doped region, a field oxide, a first conductive layer, a first insulating layer and a second conductive layer is provided. Each of the substrate and the second well has a first conductivity type. The first and second wells are formed in the substrate. The first well has a second conductivity type. The first doped region is formed in the first well and has the second conductivity type. The second doped region is formed in the second well and has the first conductivity type. The field oxide is disposed on the substrate and is disposed between the first and second doped regions. The first conductive layer overlaps the field oxide. The first insulating layer overlaps the first conductive layer. The second conductive layer overlaps the first insulating layer.

2. 发明授权

US10790365B2 Lateral diffused metal oxide semiconductor field effect transistor 有权
公开(公告)号：US10790365B2
公开(公告)日：2020-09-29
申请号：US15903709
申请日：2018-02-23
申请人： Vanguard International Semiconductor Corporation
发明人： Wen-Hsin Lin , Yu-Hao Ho , Shin-Cheng Lin , Cheng-Tsung Wu
IPC分类号： H01L29/40 , H01L29/78 , H01L29/06 , H01L23/66 , H01L29/10 , H01L29/423
摘要： An LDMOS includes a body region disposed in the substrate and having a first conductivity type; a drift region disposed in the substrate and having a second conductivity type; a source region disposed in the body region and having the second conductivity type; a drain region disposed in the drift region and having the second conductivity type; an isolation region disposed in the drift region between the source region and the drain region; a gate disposed on the body region and the drift region; a source field plate electrically connected to the source region; a drain field plate electrically connected to the drain region; and a first gate plate electrically connected to the gate. The first gate plate is correspondingly disposed above the gate. The shapes of the first gate plate and the gate are substantially the same when viewed from a top view.

3. 发明授权

US10205014B2 Method and apparatus for power device with multiple doped regions 有权
公开(公告)号：US10205014B2
公开(公告)日：2019-02-12
申请号：US15377590
申请日：2016-12-13
申请人： Vanguard International Semiconductor Corporation
发明人： Shang-Hui Tu , Chih-Jen Huang , Jui-Chun Chang , Shin-Cheng Lin , Yu-Hao Ho , Wen-Hsin Lin
IPC分类号： H01L29/78 , H01L29/66 , H01L29/10 , H01L29/06 , H01L29/08 , H01L21/70 , H01L21/265 , H01L21/266 , H01L29/423
摘要： A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.

4. 发明授权

US10128331B1 High-voltage semiconductor device and method for manufacturing the same 有权
公开(公告)号：US10128331B1
公开(公告)日：2018-11-13
申请号：US15666098
申请日：2017-08-01
申请人： Vanguard International Semiconductor Corporation
发明人： Cheng-Tsung Wu , Shin-Cheng Lin , Wen-Hsin Lin , Yu-Hao Ho
IPC分类号： H01L29/06 , H01L29/10 , H01L29/78 , H01L29/66 , H01L21/761
摘要： A high-voltage semiconductor device is provided. The device includes an epitaxial layer formed on a semiconductor substrate. The semiconductor substrate includes a first doping region having a first conductivity type. The epitaxial layer includes a body region that has a second conductivity type and a second doping region and a third doping region that have the first conductivity type. The second doping region and the third doping region are respectively on both opposite sides of the body region. A source region and a drain region are respectively in the body region and the second doping region. A gate structure is on the epitaxial layer. A fourth doping region having the second conductivity region is below the source region and adjacent to the bottom of the body region. The fourth doping region has a doping concentration greater than that of the body region.

5. 发明授权

US09306034B2 Method and apparatus for power device with multiple doped regions 有权
标题翻译：具有多个掺杂区域的功率器件的方法和装置
公开(公告)号：US09306034B2
公开(公告)日：2016-04-05
申请号：US14187950
申请日：2014-02-24
申请人： Vanguard International Semiconductor Corporation
发明人： Shang-Hui Tu , Chih-Jen Huang , Jui-Chun Chang , Shin-Cheng Lin , Yu-Hao Ho , Wen-Hsin Lin
IPC分类号： H01L29/78 , H01L29/66 , H01L29/10 , H01L21/70
CPC分类号： H01L29/7801 , H01L21/2652 , H01L21/266 , H01L29/0615 , H01L29/0634 , H01L29/0653 , H01L29/0847 , H01L29/086 , H01L29/0865 , H01L29/0878 , H01L29/0882 , H01L29/1045 , H01L29/105 , H01L29/1095 , H01L29/42368 , H01L29/66659 , H01L29/66674 , H01L29/66681 , H01L29/66712 , H01L29/7802 , H01L29/7816 , H01L29/7823 , H01L29/7835
摘要： A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.
摘要翻译：提供半导体器件。该器件包括具有第一导电类型的衬底。该器件还包括漏极区域，源极区域和设置在衬底中的阱区域。阱区域设置在漏极区域和源极区域之间并且具有与第一导电类型相反的第二导电类型。该器件还包括设置在阱区内的多个掺杂区域。掺杂区域彼此垂直和水平地偏移。每个掺杂区域包括具有第一导电类型的下部分和堆叠在下部区域上并具有第二导电类型的上部。

6. 发明授权

US11362085B2 High-voltage semiconductor device 有权
公开(公告)号：US11362085B2
公开(公告)日：2022-06-14
申请号：US16925622
申请日：2020-07-10
申请人： Vanguard International Semiconductor Corporation
发明人： Yu-Hao Ho , Hsiao-Ling Chiang , Yueh-Chu Chiang , Yi-Hsiang Huang
IPC分类号： H01L27/06
摘要： A high-voltage semiconductor device includes a substrate, a body region, a well region, a bulk region, a source, a drain, an isolation region, a gate structure, and a resistor. The body region and the well region are disposed in the substrate. The bulk region and the source are disposed in the body region. The drain is disposed in the well region. The isolation region is disposed on the well region. The isolation region is disposed between the drain and the source. The gate structure is disposed on the substrate. The gate structure extends onto a portion of the isolation region. The resistor is disposed on the isolation region. The resistor is electrically connected to the bulk region and the drain, or the resistor is electrically connected to the drain and/or the source.

7. 发明授权

US10033260B2 Boost devices with active diodes and switch-mode converters thereof 有权
公开(公告)号：US10033260B2
公开(公告)日：2018-07-24
申请号：US14957163
申请日：2015-12-02
申请人： VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
发明人： Yu-Lung Chin , Shin-Cheng Lin , Wen-Hsin Lin , Yu-Hao Ho
IPC分类号： H02M3/158 , H02M1/08 , G05F1/61 , G05F1/62
摘要： A switch-mode converter includes a high-side driver, a high-side transistor, a low-side driver, a low-side transistor, a capacitor, and an active diode. The high-side driver is supplied by the bootstrap voltage of the bootstrap node and a floating reference voltage of a floating reference node, and generates the high-side output signal. The high-side transistor provides an input voltage to the floating reference node according to the high-side output signal. The low-side driver generates the low-side output signal. The low-side transistor couples the floating reference node to a ground according to the low-side output signal. The capacitor is coupled between the bootstrap node and the floating reference node. The active diode provides the supply voltage to the bootstrap node. When the bootstrap voltage exceeds the supply voltage, the active diode isolates the supply voltage from the bootstrap node.

8. 发明授权

US10014408B1 Semiconductor devices and methods for forming the same 有权
公开(公告)号：US10014408B1
公开(公告)日：2018-07-03
申请号：US15608514
申请日：2017-05-30
申请人： Vanguard International Semiconductor Corporation
发明人： Shin-Cheng Lin , Yu-Hao Ho , Wen-Hsin Lin , Cheng-Tsung Wu , Manoj Kumar
IPC分类号： H01L29/78 , H01L29/06 , H01L29/66
CPC分类号： H01L29/7817 , H01L29/0634 , H01L29/0653 , H01L29/1083 , H01L29/42368 , H01L29/66681 , H01L29/7835
摘要： A semiconductor device includes a semiconductor substrate having a first conductivity type, and a first well region disposed in the semiconductor substrate, wherein the first well region has a second conductivity type opposite to the first conductivity type. The semiconductor device also includes a buried layer disposed in the semiconductor substrate and under the first well region, wherein the buried layer has the first conductivity type and is in contact with the first well region. The semiconductor device further includes a source electrode, a drain electrode and a gate structure disposed on the semiconductor substrate, wherein the gate structure is located between the source electrode and the drain electrode.

9. 发明授权

US09842896B1 Ultra-high voltage devices and method for fabricating the same 有权
公开(公告)号：US09842896B1
公开(公告)日：2017-12-12
申请号：US15436158
申请日：2017-02-17
申请人： Vanguard International Semiconductor Corporation
发明人： Yu-Hao Ho , Wen-Hsin Lin , Shin-Cheng Lin
IPC分类号： H01L29/66 , H01L29/06 , H01L29/40 , H01L21/265
CPC分类号： H01L29/0634 , H01L21/26513 , H01L29/408
摘要： An ultra-high voltage device is provided. The ultra-high voltage device includes a substrate, a first well zone formed in the substrate, a second well zone formed in the substrate adjacent to the first well zone, a gate oxide layer formed on the first well zone and the second well zone, a gate formed on the gate oxide layer, an insulation region formed on the surface of the second well zone, a first implant region formed in the second well zone underneath the insulation region, a second implant region formed below the first implant region, and a junction formed between the first implant region and the second implant region. At least one of the first implant region and the second implant region includes at least two sub-implant regions having different implant concentrations. The sub-implant region having the higher implant concentration is adjacent to the junction.

10. 发明授权

US09577506B1 High-side circuits with modified diode and layout placement thereof 有权
标题翻译：具有改性二极管的高边电路及其布局布局
公开(公告)号：US09577506B1
公开(公告)日：2017-02-21
申请号：US14981226
申请日：2015-12-28
申请人： Vanguard International Semiconductor Corporation
发明人： Yu-Lung Chin , Shin-Cheng Lin , Wen-Hsin Lin , Yu-Hao Ho
IPC分类号： H02M1/08 , H02M1/088 , H02M1/00
CPC分类号： H02M1/088 , H02M1/08 , H02M2001/0003 , H03K17/063 , H03K2217/0063 , H03K2217/0072 , H03K2217/0081
摘要： A high-side circuit, adapted for a switched-mode converter, includes a level shifter, a high-side driver, a high-side transistor, a capacitor, and an active diode. The level shifter receives a first signal to generate a set signal. The high-side driver is supplied by a bootstrap voltage of a bootstrap node and a floating reference voltage of a floating reference node, which controls the high-side transistor to provide an input voltage to the floating reference node according to the set signal. The capacitor is coupled between the bootstrap node and the floating reference node. The active diode provides a supply voltage to the bootstrap node. When the bootstrap voltage exceeds the supply voltage, the active diode isolates the supply voltage from the bootstrap node according to a control voltage. The active diode includes a first-type well coupled to the bootstrap node, where the high-side driver is disposed.
摘要翻译：适用于开关模式转换器的高边电路包括电平移位器，高侧驱动器，高侧晶体管，电容器和有源二极管。电平移位器接收第一信号以产生设置信号。高侧驱动器由自举节点的自举电压和浮动参考节点的浮动参考电压提供，其控制高侧晶体管，以根据设置的信号向浮动参考节点提供输入电压。电容器耦合在引导节点和浮动参考节点之间。有源二极管为引导节点提供电源电压。当自举电压超过电源电压时，有源二极管根据控制电压隔离引导节点的电源电压。有源二极管包括耦合到自举节点的第一类阱，其中设置了高侧驱动器。

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