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    • 1. 发明授权
    • Shift register
    • 移位寄存器
    • US07907696B2
    • 2011-03-15
    • US12429018
    • 2009-04-23
    • Wen-pin ChenLee-hsun ChangJe-hao Hsu
    • Wen-pin ChenLee-hsun ChangJe-hao Hsu
    • G11C19/00
    • G11C19/28G09G2310/0286G09G2320/0266
    • A shift register includes a plurality of stages cascade-connected with each other. Each stage includes a pull-up circuit, a pull-up driving circuit, and a pull-down circuit. The pull-up circuit coupled to a first clock signal is used for providing an output signal. The pull-up driving circuit includes a control circuit and a first transistor. The control circuit has a gate coupled to a previous stage, and a drain coupled to a second clock signal. The first transistor includes a gate coupled to the source of the control circuit, a drain coupled to a driving end of the previous stage, and a source coupled to a first input end. The pull-down circuit pulls down voltage on the first input end.
    • 移位寄存器包括彼此串联连接的多个级。 每个级包括上拉电路,上拉驱动电路和下拉电路。 耦合到第一时钟信号的上拉电路用于提供输出信号。 上拉驱动电路包括控制电路和第一晶体管。 控制电路具有耦合到前一级的栅极和耦合到第二时钟信号的漏极。 第一晶体管包括耦合到控制电路的源极的栅极,耦合到前一级的驱动端的漏极和耦合到第一输入端的源极。 下拉电路拉低第一个输入端的电压。
    • 2. 发明申请
    • SHIFT REGISTER
    • 移位寄存器
    • US20100054392A1
    • 2010-03-04
    • US12429018
    • 2009-04-23
    • Wen-pin ChenLee-hsun ChangJe-hao Hsu
    • Wen-pin ChenLee-hsun ChangJe-hao Hsu
    • G11C19/00
    • G11C19/28G09G2310/0286G09G2320/0266
    • A shift register includes a plurality of stages cascade-connected with each other. Each stage includes a pull-up circuit, a pull-up driving circuit, and a pull-down circuit. The pull-up circuit coupled to a first clock signal is used for providing an output signal. The pull-up driving circuit includes a control circuit and a first transistor. The control circuit has a gate coupled to a previous stage, and a drain coupled to a second clock signal. The first transistor includes a gate coupled to the source of the control circuit, a drain coupled to a driving end of the previous stage, and a source coupled to a first input end. The pull-down circuit pulls down voltage on the first input end.
    • 移位寄存器包括彼此串联连接的多个级。 每个级包括上拉电路,上拉驱动电路和下拉电路。 耦合到第一时钟信号的上拉电路用于提供输出信号。 上拉驱动电路包括控制电路和第一晶体管。 控制电路具有耦合到前一级的栅极和耦合到第二时钟信号的漏极。 第一晶体管包括耦合到控制电路的源极的栅极,耦合到前一级的驱动端的漏极和耦合到第一输入端的源极。 下拉电路拉低第一个输入端的电压。
    • 4. 发明申请
    • Liquid Crystal Display Panel
    • 液晶显示面板
    • US20130335308A1
    • 2013-12-19
    • US13579035
    • 2012-06-18
    • Je-hao HsuXiaohui YaoChengcai DongShyh-Feng Chen
    • Je-hao HsuXiaohui YaoChengcai DongShyh-Feng Chen
    • G09G3/36
    • G09G3/3648G09G2300/043G09G2300/0439
    • A liquid crystal display (LCD) panel is proposed. The LCD panel includes a plurality of scan lines, a plurality of data lines, and a plurality of matrix-arranged pixels. Each of the plurality of pixels includes a plurality of subpixels. Each of the plurality of subpixels is electrically connected to a corresponding scan line. The subpixels of each of the pixels are electrically connected to a data line. Each of the plurality of subpixels includes a subpixel electrode. The subpixel electrode belonging to an N+1 subpixel partially overlaps the scan line corresponding to an N subpixel for forming a storage capacitor belonging to the N+1 subpixel itself. By means of the above-mentioned method, both of the aperture ratio of the pixel and the transmittance of the LCD and are increased. Moreover, the cost of the LCD panel is reduced.
    • 提出了液晶显示(LCD)面板。 LCD面板包括多条扫描线,多条数据线和多个矩阵排列的像素。 多个像素中的每一个包括多个子像素。 多个子像素中的每一个电连接到相应的扫描线。 每个像素的子像素电连接到数据线。 多个子像素中的每一个都包括子像素电极。 属于N + 1子像素的子像素电极部分地重叠与用于形成属于N + 1子像素本身的存储电容器的N子像素相对应的扫描线。 通过上述方法,像素的开口率和LCD的透射率都增加。 此外,LCD面板的成本降低。
    • 5. 发明申请
    • PIXEL UNIT AND AN ARRAY SUBSTRATE
    • 像素单元和阵列基板
    • US20140346534A1
    • 2014-11-27
    • US13985693
    • 2013-06-27
    • Xiaohui YaoJingfeng XueJe-hao Hsu
    • Xiaohui YaoJingfeng XueJe-hao Hsu
    • H01L27/12
    • H01L27/124G02F1/134336
    • A pixel unit and an array substrate are provided. The pixel unit includes a scan line extended along a first extension direction; a data line extended along a second extension direction; a solder pad electrically connects to the scan line and the data line; an insulation layer covering the scan line and the data line, and having a through hole; and multiple strip electrodes disposed on the insulation layer and extending along a third extension direction, wherein, the multiple strip electrodes electrically connect to the solder pad by the through hole. The solder pad and the multiple strip electrodes are all made of a transparent conductive material. A shape of the solder pad is a polygon and is parallel to the third extension direction. The present invention can effectively suppress the “dark fringes” phenomenon around the solder pad.
    • 提供像素单元和阵列基板。 像素单元包括沿着第一延伸方向延伸的扫描线; 沿着第二延伸方向延伸的数据线; 焊盘电连接到扫描线和数据线; 覆盖扫描线和数据线的绝缘层,并具有通孔; 以及设置在所述绝缘层上并沿着第三延伸方向延伸的多个条状电极,其中,所述多个条状电极通过所述通孔电连接到所述焊盘。 焊盘和多条电极均由透明导电材料制成。 焊盘的形状是多边形并且平行于第三延伸方向。 本发明可以有效地抑制焊盘周围的“黑条纹”现象。
    • 6. 发明申请
    • Pixel Electrode and LCD Panel
    • 像素电极和液晶面板
    • US20130128208A1
    • 2013-05-23
    • US13378504
    • 2011-12-02
    • Xiaohui YaoJe-hao HsuJingfeng XueChengcai Dong
    • Xiaohui YaoJe-hao HsuJingfeng XueChengcai Dong
    • G02F1/1343
    • G02F1/134309G02F1/133707
    • The present invention discloses a pixel electrode and an LCD panel. The pixel electrode is provided with at least one gap which is inclined with respect to the edges of the pixel electrode, wherein both ends of each gap extend to the edges of the pixel electrode; both sides of each gap is provided with a plurality of equal slits with a constant depth; both sides of the two end zones of each gap have a plurality of edge slits of which the bottom sections are extended to the edges of the pixel electrode; the end zones of each gap are also provided with a plurality of gradual slits which are gradually decreased in depth from the outer to the inner of the pixel electrode; and the depth of each gradual slit is greater than or equal to that of each equal slit. The present invention mitigates the anomalous electric fields among the slits and that of at the slit ends on the extension structures of the common electrodes by changing the depth of the edge slits of the pixel electrode; at the same time, the gradual slits are formed on one side of each edge slit, so that the electric fields at the edges are gradually changed and transited to the electric fields within the pixels. Thus, the anomalous disclination of the liquid crystal molecules in this region can be avoided, the hidden veins herein can be reduced, and the penetration rate of pixel can be enhanced.
    • 本发明公开了一种像素电极和LCD面板。 像素电极设置有相对于像素电极的边缘倾斜的至少一个间隙,其中每个间隙的两端延伸到像素电极的边缘; 每个间隙的两侧设有多个具有恒定深度的相等狭缝; 每个间隙的两个端部区域的两侧具有多个边缘狭缝,其底部部分延伸到像素电极的边缘; 每个间隙的端部区域还设置有从像素电极的外部到内部逐渐减小的多个渐变狭缝; 并且每个渐变狭缝的深度大于或等于每个相等狭缝的深度。 本发明通过改变像素电极的边缘狭缝的深度来减轻狭缝之间的异常电场和狭缝端在公共电极的延伸结构上的异常电场; 同时,在每个边缘狭缝的一侧上形成渐变狭缝,使得边缘处的电场逐渐变化并转移到像素内的电场。 因此,可以避免该区域中的液晶分子的异常的旋错,可以减少本文的隐藏静脉,并且可以提高像素的穿透率。