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1. 发明授权

US11175983B2 Soft-decision input generation for data storage systems 有权
公开(公告)号：US11175983B2
公开(公告)日：2021-11-16
申请号：US16823235
申请日：2020-03-18
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu , Kent D. Anderson , Anantha Raman Krishnan , Shafa Dahandeh
IPC分类号： G06F11/10
摘要： An error management system for a data storage device can generate soft-decision log-likelihood ratios (LLRs) using multiple reads of memory locations. Bit patterns provided by multiple reads of reference memory locations can be counted and used to generate probability data that is used to generate possible LLR values for decoding target pages. Possible LLR values are stored in one or more look-up tables.

2. 发明授权

US11630722B2 Method and system for decoding data based on association of first memory location and second memory location 有权
公开(公告)号：US11630722B2
公开(公告)日：2023-04-18
申请号：US17503198
申请日：2021-10-15
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu , Kent D. Anderson , Anantha Raman Krishnan , Shafa Dahandeh
IPC分类号： G06F11/10
摘要： An error management system for a data storage device can generate soft-decision log-likelihood ratios (LLRs) using multiple reads of memory locations. Bit patterns provided by multiple reads of reference memory locations can be counted and used to generate probability data that is used to generate possible LLR values for decoding target pages. Possible LLR values are stored in one or more look-up tables.

3. 发明授权

US09021339B2 Data reliability schemes for data storage systems 有权
标题翻译：数据存储系统的数据可靠性方案
公开(公告)号：US09021339B2
公开(公告)日：2015-04-28
申请号：US13689673
申请日：2012-11-29
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu , Leader Ho , Radoslav Danilak , Rodney N. Mullendore , Justin Jones , Andrew J. Tomlin
IPC分类号： G11C29/00 , G06F11/10
CPC分类号： G06F11/108
摘要： A data storage system configured to implement a data reliability scheme is disclosed. In one embodiment, a data storage system controller detects uncorrectable errors using intra page parity when data units are read from a set of pages. When an uncorrectable error is detected, the data storage system controller attempts to recover user data using inter page parity without using all data from each page of the set of pages. Recovery of user data can thereby be performed without reading all data from each page. As a result, the amount of time needed to read data can be reduced in some cases and overall data storage system performance can be increased.
摘要翻译：公开了一种被配置为实现数据可靠性方案的数据存储系统。在一个实施例中，当从一组页面读取数据单元时，数据存储系统控制器使用页内奇偶校验来检测不可校正的错误。当检测到不可校正的错误时，数据存储系统控制器尝试使用页间奇偶校验来恢复用户数据，而不使用该页面页面中的每一页的所有数据。因此可以在不从每个页面读取所有数据的情况下执行用户数据的恢复。因此，在某些情况下可以减少读取数据所需的时间，并且可以提高整体数据存储系统的性能。

4. 发明授权

US11074125B2 Data storage system and method for decoding data based on extrapolated flipped-bit data 有权
公开(公告)号：US11074125B2
公开(公告)日：2021-07-27
申请号：US16716378
申请日：2019-12-16
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu
IPC分类号： G06F11/10 , G11C29/52 , G06F3/06 , G06F12/02 , G11C16/08 , H03M13/11 , H03M13/37 , H03M13/45
摘要： An error management system for a data storage device can generate soft-decision log-likelihood ratios (LLRs) using multiple reads of memory locations. 0-to-1 and 1-to-0 bit flip count data provided by multiple reads of reference memory locations can be used to generate probability data that is used to generate possible LLR values for decoding target pages. Possible LLR values are stored in one or more look-up tables.

5. 发明申请

US20140149826A1 DATA RELIABILITY SCHEMES FOR DATA STORAGE SYSTEMS 有权
标题翻译：数据存储系统的数据可靠性方案
公开(公告)号：US20140149826A1
公开(公告)日：2014-05-29
申请号：US13689673
申请日：2012-11-29
申请人： WESTERN DIGITAL TECHNOLOGIES, INC.
发明人： Guangming Lu , Leader Ho , Radoslav Danilak , Rodney N. Mullendore , Justin Jones , Andrew J. Tomlin
IPC分类号： G06F11/10
CPC分类号： G06F11/108
摘要： A data storage system configured to implement a data reliability scheme is disclosed. In one embodiment, a data storage system controller detects uncorrectable errors using intra page parity when data units are read from a set of pages. When an uncorrectable error is detected, the data storage system controller attempts to recover user data using inter page parity without using all data from each page of the set of pages. Recovery of user data can thereby be performed without reading all data from each page. As a result, the amount of time needed to read data can be reduced in some cases and overall data storage system performance can be increased.
摘要翻译：公开了一种被配置为实现数据可靠性方案的数据存储系统。在一个实施例中，当从一组页面读取数据单元时，数据存储系统控制器使用页内奇偶校验来检测不可校正的错误。当检测到不可校正的错误时，数据存储系统控制器尝试使用页间奇偶校验来恢复用户数据，而不使用该页面页面中的每一页的所有数据。因此可以在不从每个页面读取所有数据的情况下执行用户数据的恢复。因此，在某些情况下可以减少读取数据所需的时间，并且可以提高整体数据存储系统的性能。

6. 发明授权

US10545819B1 Soft-decision input generation for data storage systems 有权
公开(公告)号：US10545819B1
公开(公告)日：2020-01-28
申请号：US14584326
申请日：2014-12-29
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu
IPC分类号： G06F11/10 , G11C29/52 , G06F12/02 , G06F3/06 , G11C16/08 , H03M13/11 , H03M13/45 , H03M13/37
摘要： An error management system for a data storage device can generate soft-decision log-likelihood ratios (LLRs) using multiple reads of memory locations. 0-to-1 and 1-to-0 bit flip count data provided by multiple reads of reference memory locations can be used to generate probability data that is used to generate possible LLR values for decoding target pages. Possible LLR values are stored in one or more look-up tables.

7. 发明授权

US10216574B2 Adaptive error correction codes for data storage systems 有权
公开(公告)号：US10216574B2
公开(公告)日：2019-02-26
申请号：US14570820
申请日：2014-12-15
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu
IPC分类号： H03M13/00 , G06F11/10 , H03M13/11 , H03M13/35
摘要： A data storage system configured to adaptively code data is disclosed. In one embodiment, a data storage system controller determines a common memory page size, such as an E-page size, for a non-volatile memory array. Based on the common memory page size, the controller selects a low-density parity-check (LDPC) code word length from a plurality of pre-defined LDPC code word lengths. The controller determines LDPC coding parameters for coding data written to or read from the memory array based on the selected LDPC code word length. By using the plurality of pre-defined LDPC code word lengths, the data storage system can support multiple non-volatile memory page formats, including memory page formats in which the common memory page size does not equal any LDPC code word length of the plurality of pre-defined LDPC code word lengths. Flexibility and efficiency of data coding can thereby be achieved.

8. 发明授权

US09619317B1 Decoder having early decoding termination detection 有权
公开(公告)号：US09619317B1
公开(公告)日：2017-04-11
申请号：US13742248
申请日：2013-01-15
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu
IPC分类号： G06F11/08 , G06F11/10 , H03M13/11 , H03M13/37 , H03M13/35
CPC分类号： G06F11/1008 , G06F11/1012 , H03M13/1131 , H03M13/1137 , H03M13/114 , H03M13/35 , H03M13/3707 , H03M13/3746 , H03M13/3753
摘要： Embodiments of decoders having early decoding termination detection are disclosed. The decoders can provide for flexible and scalable decoding and early termination detection, particularly when quasi-cyclic low-density parity-check code (QC-LDPC) decoding is used. In one embodiment, a decoder iteratively decodes a data unit using a decoding matrix comprising a plurality of layers. After at least one iteration of decoding the data unit, the decoder determines whether the decoded data unit from a completed iteration and one or more layers of the plurality of layers satisfy a parity check equation. In response to determining that the decoded data unit from the completed iteration and each layer of the plurality of layers satisfy the parity check equation, the decoder terminates decoding the data unit. Advantageously, the termination of decoding of the data unit can reduce a number of iterations performed to decode the data unit.

9. 发明授权

US09542258B1 System and method for error-minimizing voltage threshold selection 有权
标题翻译：误差最小化电压阈值选择的系统和方法
公开(公告)号：US09542258B1
公开(公告)日：2017-01-10
申请号：US13842771
申请日：2013-03-15
申请人： Western Digital Technologies, Inc.
发明人： Guangming Lu , Dengtao Zhao
IPC分类号： G06F11/00 , G06F11/10 , G11C29/00 , G06F11/07
CPC分类号： G06F11/0793 , G06F11/10 , G06F11/1072
摘要： Embodiments of solid-state storage devices provided herein include a voltage threshold calculation mechanism to calculate an optimal voltage read threshold for minimizing read errors. The system may be configured to determine optimal reference voltage value(s) by interpolating a pair of reads at two different threshold levels to determine the point that generates the least number of errors. In some cases, the evaluation may be an approximation based on a Cumulative Distribution Function (CDF) of errors of a first type and a second type. In other cases, the evaluation may be a calculation of an optimal voltage threshold based on the CDF of the errors. In yet other cases, the evaluation may be based on the Probability Density Function (PDF) of the errors.
摘要翻译：本文提供的固态存储装置的实施例包括电压阈值计算机制，以计算用于最小化读取误差的最佳电压读取阈值。该系统可以被配置为通过在两个不同的阈值级别内插一对读取来确定产生最少数量的错误的点来确定最佳参考电压值。在一些情况下，评估可以是基于第一类型和第二类型的错误的累积分布函数（CDF）的近似。在其他情况下，评估可以是基于错误的CDF的最佳电压阈值的计算。在其他情况下，评估可能基于错误的概率密度函数（PDF）。

10. 发明授权

US09214963B1 Method and system for monitoring data channel to enable use of dynamically adjustable LDPC coding parameters in a data storage system 有权
标题翻译：用于监视数据信道以便在数据存储系统中使用动态可调的LDPC编码参数的方法和系统
公开(公告)号：US09214963B1
公开(公告)日：2015-12-15
申请号：US13725965
申请日：2012-12-21
申请人： Western Digital Technologies, Inc.
发明人： Shayan S. Garani , Kent D. Anderson , Anantha Raman Krishnan , Guangming Lu , Shafa Dahandeh , Andrew J. Tomlin
IPC分类号： H03M13/00 , H03M13/29
CPC分类号： H03M13/1102 , G06F11/1048 , H03M13/353 , H03M13/618 , H03M13/6516
摘要： A data storage system configured to adaptively code data and related methods are disclosed. In some embodiments of the present invention, a data storage system includes a controller and a non-volatile memory array having a plurality of memory pages. The controller includes a channel monitor that determines the quality of read signals from the pages when they are read, and provides adjustment metrics to aid in the selection of a code rate, such as a code rate for a low-density parity-check (LDPC) code. In this way, the code rate used for data encoding can be dynamically adjusted to accommodate degradation of the non-volatile memory array over its useable life.
摘要翻译：公开了一种被配置为自适应地编码数据和相关方法的数据存储系统。在本发明的一些实施例中，数据存储系统包括具有多个存储器页的控制器和非易失性存储器阵列。控制器包括一个通道监视器，用于在读取读取信号时确定读取信号的质量，并提供调整度量以帮助选择码率，例如用于低密度奇偶校验的码率（LDPC））代码。以这种方式，可以动态地调整用于数据编码的码率，以适应其易用寿命时非易失性存储器阵列的劣化。

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