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1. 发明申请

US20130135503A1 AMPLIFIER APPARATUS AND METHODS USING VARIABLE CAPACITANCE DEPENDENT ON FEEDBACK GAIN 有权
标题翻译：放大器装置和使用可变电容依赖于反馈增益的方法
公开(公告)号：US20130135503A1
公开(公告)日：2013-05-30
申请号：US13618156
申请日：2012-09-14
申请人： Yu Jin Park , Soon Hwa Kang , Min Ho Kwon , Jae Hong Kim , Kwi Sung Yoo , Seung Hyun Lim
发明人： Yu Jin Park , Soon Hwa Kang , Min Ho Kwon , Jae Hong Kim , Kwi Sung Yoo , Seung Hyun Lim
IPC分类号： G06G7/18 , H04N5/335 , H03F1/34
CPC分类号： H03F1/34 , G11C27/026 , H03F1/086 , H03F3/45188 , H03F2200/153 , H03F2203/45512 , H03F2203/45514
摘要： An apparatus includes an operational amplifier circuit comprising at least one operational amplifier and a feedback circuit coupled between the output terminal and input terminal of the operational amplifier circuit and configured to apply a feedback gain to an output signal at the output of the first operational amplifier. The apparatus further includes a variable compensation capacitor coupled to the output terminal of the operational amplifier circuit and configured to vary a capacitance thereof responsive to the feedback gain.
摘要翻译：一种装置包括运算放大器电路，其包括至少一个运算放大器和耦合在运算放大器电路的输出端和输入端之间的反馈电路，并被配置为向第一运算放大器的输出处的输出信号施加反馈增益。该装置还包括耦合到运算放大器电路的输出端并被配置成根据反馈增益来改变其电容的可变补偿电容器。

2. 发明授权

US09270232B2 Amplifier apparatus and methods using variable capacitance dependent on feedback gain 有权
标题翻译：使用可变电容的放大器装置和方法取决于反馈增益
公开(公告)号：US09270232B2
公开(公告)日：2016-02-23
申请号：US13618156
申请日：2012-09-14
申请人： Yu Jin Park , Soon Hwa Kang , Min Ho Kwon , Jae Hong Kim , Kwi Sung Yoo , Seung Hyun Lim
发明人： Yu Jin Park , Soon Hwa Kang , Min Ho Kwon , Jae Hong Kim , Kwi Sung Yoo , Seung Hyun Lim
IPC分类号： H04N5/335 , H03F1/34 , H03F1/08 , H03F3/45 , G11C27/02
CPC分类号： H03F1/34 , G11C27/026 , H03F1/086 , H03F3/45188 , H03F2200/153 , H03F2203/45512 , H03F2203/45514
摘要： An apparatus includes an operational amplifier circuit comprising at least one operational amplifier and a feedback circuit coupled between the output terminal and input terminal of the operational amplifier circuit and configured to apply a feedback gain to an output signal at the output of the first operational amplifier. The apparatus further includes a variable compensation capacitor coupled to the output terminal of the operational amplifier circuit and configured to vary a capacitance thereof responsive to the feedback gain.
摘要翻译：一种装置包括运算放大器电路，其包括至少一个运算放大器和耦合在运算放大器电路的输出端和输入端之间的反馈电路，并被配置为向第一运算放大器的输出处的输出信号施加反馈增益。该装置还包括耦合到运算放大器电路的输出端并被配置成根据反馈增益来改变其电容的可变补偿电容器。

3. 发明申请

US20120176501A1 Analog-to-Digital Converters and Related Image Sensors 有权
标题翻译：模数转换器和相关图像传感器
公开(公告)号：US20120176501A1
公开(公告)日：2012-07-12
申请号：US13348044
申请日：2012-01-11
申请人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Seung Hyun Lim , Jae Hong Kim
发明人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Seung Hyun Lim , Jae Hong Kim
IPC分类号： H04N5/225 , H04N5/335 , H03M1/12
CPC分类号： H03M1/164 , H03M1/50 , H03M3/424 , H03M3/456 , H03M3/458 , H04N5/378
摘要： An image sensor includes a pixel array including a plurality of pixels which are arranged in a matrix of a plurality of rows and columns and each of the plurality of pixels being configured to convert intensity of incident light into an electrical image signal; and an extended counting analog-to-digital converter configured to perform a first analog-to-digital conversion to provide a digital signal from an output signal of the pixel array, to obtain a residue using the output signal of the pixel array and the digital signal, and to perform a second analog-to-digital conversion using the residue.
摘要翻译：图像传感器包括：像素阵列，其包括以多个行和列的矩阵排列的多个像素，并且所述多个像素中的每一个被配置为将入射光的强度转换为电图像信号; 以及扩展计数模数转换器，其被配置为执行第一模数转换以从所述像素阵列的输出信号提供数字信号，以使用所述像素阵列的输出信号和所述数字信号，并且使用残留物进行第二模拟 - 数字转换。

4. 发明授权

US08982259B2 Analog-to-digital converters and related image sensors 有权
标题翻译：模数转换器和相关图像传感器
公开(公告)号：US08982259B2
公开(公告)日：2015-03-17
申请号：US13348044
申请日：2012-01-11
申请人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Seung Hyun Lim , Jae Hong Kim
发明人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Seung Hyun Lim , Jae Hong Kim
IPC分类号： H04N5/335 , H03M1/16 , H03M3/00 , H04N5/378 , H03M1/50
CPC分类号： H03M1/164 , H03M1/50 , H03M3/424 , H03M3/456 , H03M3/458 , H04N5/378
摘要： An image sensor includes a pixel array including a plurality of pixels which are arranged in a matrix of a plurality of rows and columns and each of the plurality of pixels being configured to convert intensity of incident light into an electrical image signal; and an extended counting analog-to-digital converter configured to perform a first analog-to-digital conversion to provide a digital signal from an output signal of the pixel array, to obtain a residue using the output signal of the pixel array and the digital signal, and to perform a second analog-to-digital conversion using the residue.
摘要翻译：图像传感器包括：像素阵列，其包括以多个行和列的矩阵排列的多个像素，并且所述多个像素中的每一个被配置为将入射光的强度转换为电图像信号; 以及扩展计数模数转换器，其被配置为执行第一模数转换以从所述像素阵列的输出信号提供数字信号，以使用所述像素阵列的输出信号和所述数字信号，并且使用残留物进行第二模拟 - 数字转换。

5. 发明授权

US08952314B2 Two-step analog-digital converting circuit and method 有权
标题翻译：两步模拟数字转换电路及方法
公开(公告)号：US08952314B2
公开(公告)日：2015-02-10
申请号：US13616205
申请日：2012-09-14
申请人： Yu Jin Park , Kwi Sung Yoo , Seung Hyun Lim
发明人： Yu Jin Park , Kwi Sung Yoo , Seung Hyun Lim
IPC分类号： H01L27/00 , H03M1/16 , H03M1/12 , H03M1/56 , H04N5/374 , H04N5/378
CPC分类号： H03M1/16 , H03M1/123 , H03M1/56 , H04N5/374 , H04N5/3742 , H04N5/378
摘要： A two-step analog-digital converting circuit includes a comparator, an upper bit counter and a pulse residue conversion unit. The comparator is configured to compare a ramp signal and an input signal, and to output a resulting comparative signal. The upper bit counter is configured to receive the comparative signal and a clock signal, and to output upper bit values corresponding to a first time interval between a generation time point of the ramp signal and a first edge of the clock signal, the first edge of the clock signal immediately preceding a state transition time point of the comparative signal. The pulse residue conversion unit is configured to receive the comparative signal and the clock signal, and to output lower bit values corresponding to a second time interval between the first edge of the clock signal and the state transition time point of the comparative signal.
摘要翻译：两步模拟数字转换电路包括比较器，高位计数器和脉冲残差转换单元。比较器被配置为比较斜坡信号和输入信号，并输出结果比较信号。高位计数器被配置为接收比较信号和时钟信号，并且输出对应于斜坡信号的生成时间点和时钟信号的第一边沿之间的第一时间间隔的高位值，紧接在比较信号的状态转变时间点之前的时钟信号。脉冲残余转换单元被配置为接收比较信号和时钟信号，并且输出与时钟信号的第一边沿和比较信号的状态转移时间点之间的第二时间间隔相对应的较低位值。

6. 发明授权

US08872938B2 Sense amplifier including negative capacitance circuit and apparatuses including same 有权
标题翻译：包括负电容电路的感应放大器及包括其的装置
公开(公告)号：US08872938B2
公开(公告)日：2014-10-28
申请号：US13345949
申请日：2012-01-09
申请人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Won Ho Choi , Jae Hong Kim
发明人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Won Ho Choi , Jae Hong Kim
IPC分类号： H04N9/64 , H04N5/378 , H04N5/3745 , H04N3/14
CPC分类号： H04N5/378 , H04N5/3745
摘要： A sense amplifier having a negative capacitance circuit receives differential input signals via a pair of data lines, and senses and amplifies a voltage difference between differential output signals corresponding to the differential input signals as loaded by the negative capacitance circuit using a differential-to-single-ended amplifier to generate a corresponding data output signal.
摘要翻译：具有负电容电路的读出放大器经由一对数据线接收差分输入信号，并且使用差分到单个的方式感测并放大与由负电容电路加载的差分输入信号相对应的差分输出信号之间的电压差用来产生相应的数据输出信号。

7. 发明申请

US20120176523A1 SENSE AMPLIFIER INCLUDING NEGATIVE CAPACITANCE CIRCUIT AND APPARATUSES INCLUDING SAME 有权
标题翻译：包括负电容电路的感应放大器和包括它们的设备
公开(公告)号：US20120176523A1
公开(公告)日：2012-07-12
申请号：US13345949
申请日：2012-01-09
申请人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Won Ho Choi , Jae Hong Kim
发明人： Kwi Sung Yoo , Min Ho Kwon , Wun-Ki Jung , Jin Ho Seo , Dong Hun Lee , Won Ho Choi , Jae Hong Kim
IPC分类号： H04N5/335 , H04N3/14 , H01L27/146 , G11C7/06 , H03F3/45
CPC分类号： H04N5/378 , H04N5/3745
摘要： A sense amplifier having a negative capacitance circuit receives differential input signals via a pair of data lines, and senses and amplifies a voltage difference between differential output signals corresponding to the differential input signals as loaded by the negative capacitance circuit using a differential-to-single-ended amplifier to generate a corresponding data output signal.
摘要翻译：具有负电容电路的读出放大器经由一对数据线接收差分输入信号，并且使用差分到单个的方式感测并放大与由负电容电路加载的差分输入信号相对应的差分输出信号之间的电压差用来产生相应的数据输出信号。

8. 发明授权

US08432471B2 CMOS image sensor and image signal detecting method 有权
标题翻译： CMOS图像传感器和图像信号检测方法
公开(公告)号：US08432471B2
公开(公告)日：2013-04-30
申请号：US12828478
申请日：2010-07-01
申请人： Seung hyun Lim , Jeong hwan Lee , Kun hee Cho , Gun Hee Han , Kwi Sung Yoo , Seog heon Ham
发明人： Seung hyun Lim , Jeong hwan Lee , Kun hee Cho , Gun Hee Han , Kwi Sung Yoo , Seog heon Ham
IPC分类号： H04N3/14
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56
摘要： A CMOS image sensor includes a photodiode, a switch configured to transfer a signal sensed by the photodiode to a sensing node, and a comparator electrically and directly connected to the sensing node and configured to compare the sensed signal of the sensing node and a ramp signal. Reset offset of the comparator is maintained at a constant offset voltage level during an initialization mode.
摘要翻译： CMOS图像传感器包括光电二极管，被配置为将由光电二极管感测的信号传送到感测节点的开关，以及比较器，电连接并直接连接到感测节点，并且被配置为将感测节点的感测信号与斜坡信号。在初始化模式期间，比较器的复位偏移保持在恒定的偏移电压电平。

9. 发明申请

US20120002093A1 CORRELATED DOUBLE SAMPLING CIRCUIT AND IMAGE SENSOR INCLUDING THE SAME 有权
标题翻译：相关的双重采样电路和包括其的图像传感器
公开(公告)号：US20120002093A1
公开(公告)日：2012-01-05
申请号：US13171958
申请日：2011-06-29
申请人： Wun-Ki Jung , Seog Heon Ham , Dong Hun Lee , Kwi Sung Yoo , Min Ho Kwon
发明人： Wun-Ki Jung , Seog Heon Ham , Dong Hun Lee , Kwi Sung Yoo , Min Ho Kwon
IPC分类号： H04N5/335 , H03M3/00
CPC分类号： H03M3/342 , H04N5/378
摘要： A correlated double sampling circuit includes a delta-sigma modulator, a selection circuit, and an accumulation circuit. The delta-sigma modulator is configured to receive an input signal, delta-sigma modulate the input signal, and output a modulation signal. The selection circuit is configured to invert the modulation signal and selectively output one of the modulation signal and an inverted modulation signal in response to a selection signal corresponding to an operation phase. The accumulation circuit is configured to generate a first accumulation result by performing an accumulation process on one of the modulation signal and the inverted modulation signal in a first operation phase, and generate a second accumulation result by performing the accumulation process on the first accumulation result and the other one of the modulation signal and the inverted modulation signal in a second operation phase.
摘要翻译：相关双采样电路包括Δ-Σ调制器，选择电路和累积电路。 Δ-Σ调制器被配置为接收输入信号，Δ-Σ调制输入信号，并输出调制信号。选择电路被配置为响应于对应于操作阶段的选择信号，反转调制信号并选择性地输出调制信号和反相调制信号中的一个。累积电路被配置为通过在第一操作阶段中对调制信号和反相调制信号之一执行累加处理来产生第一累加结果，并且通过对第一累积结果执行累积处理来生成第二累加结果，以及在第二操作阶段中的另一个调制信号和反相调制信号。

10. 发明申请

US20110069191A1 Correlated double sampling circuit, image sensor including the same, and image processing system including the image sensor 有权
标题翻译：相关的双采样电路，包括图像传感器的图像传感器和图像处理系统
公开(公告)号：US20110069191A1
公开(公告)日：2011-03-24
申请号：US12801999
申请日：2010-07-07
申请人： Wun-Ki Jung , Seog Heon Ham , Dong Hun Lee , Kwi Sung Yoo , Min Ho Kwon
发明人： Wun-Ki Jung , Seog Heon Ham , Dong Hun Lee , Kwi Sung Yoo , Min Ho Kwon
IPC分类号： H04N5/225 , H04N5/335 , H01L27/00 , H03L7/06
CPC分类号： H04N5/3575 , H04N5/374 , H04N5/378
摘要： A correlated double sampling (CDS) circuit is provided. The CDS circuit is configured to perform a CDS on a reset signal and an image signal during a CDS phase respectively. The CDS circuit includes a sampling circuit configured to output a difference between a correlated double sampled reset signal and a correlated double sampled image signal, and a feedback unit configured to feedback the difference output from the sampling circuit during a PGA phase to an input of the sampling circuit.
摘要翻译：提供了相关的双重采样（CDS）电路。 CDS电路被配置为在CDS阶段期间在复位信号和图像信号上执行CDS。 CDS电路包括：采样电路，被配置为输出相关的双采样复位信号和相关的双采样图像信号之间的差;以及反馈单元，被配置为将在PGA阶段期间从采样电路输出的差值反馈到采样电路。

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