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1. 发明申请

US20100140625A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE STRUCTURES AND FABRICATION METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列基板结构及其制造方法
公开(公告)号：US20100140625A1
公开(公告)日：2010-06-10
申请号：US12703926
申请日：2010-02-11
申请人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
发明人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
IPC分类号： H01L27/12
CPC分类号： G02F1/136209 , G02F2001/136222 , H01L27/1248 , H01L29/78633
摘要： A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
摘要翻译：薄膜晶体管阵列基板结构。阵列基板结构包括薄膜晶体管阵列基板，形成在其上的有机材料层，以及设置在有机材料层上的多个黑色矩阵和滤色器图案。本发明还提供一种制造薄膜晶体管阵列基板的方法。

2. 发明授权

US07688419B2 Thin film transistor array substrate structures and fabrication method thereof 有权
标题翻译：薄膜晶体管阵列基板结构及其制造方法
公开(公告)号：US07688419B2
公开(公告)日：2010-03-30
申请号：US11859832
申请日：2007-09-24
申请人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
发明人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
IPC分类号： G02F1/13
CPC分类号： G02F1/136209 , G02F2001/136222 , H01L27/1248 , H01L29/78633
摘要： A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
摘要翻译：薄膜晶体管阵列基板结构。阵列基板结构包括薄膜晶体管阵列基板，形成在其上的有机材料层，以及设置在有机材料层上的多个黑色矩阵和滤色器图案。本发明还提供一种制造薄膜晶体管阵列基板的方法。

3. 发明授权

US07834960B2 Thin film transistor array substrate structures 有权
标题翻译：薄膜晶体管阵列基板结构
公开(公告)号：US07834960B2
公开(公告)日：2010-11-16
申请号：US12703926
申请日：2010-02-11
申请人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
发明人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
IPC分类号： G02F1/1335
CPC分类号： G02F1/136209 , G02F2001/136222 , H01L27/1248 , H01L29/78633
摘要： A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
摘要翻译：薄膜晶体管阵列基板结构。阵列基板结构包括薄膜晶体管阵列基板，形成在其上的有机材料层，以及设置在有机材料层上的多个黑色矩阵和滤色器图案。本发明还提供一种制造薄膜晶体管阵列基板的方法。

4. 发明申请

US20080006865A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE STRUCTURES AND FABRICATION METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列基板结构及其制造方法
公开(公告)号：US20080006865A1
公开(公告)日：2008-01-10
申请号：US11859832
申请日：2007-09-24
申请人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
发明人： Yu-Wei Liu , Hui-Fen Lin , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
IPC分类号： H01L27/105 , H01L21/77
CPC分类号： G02F1/136209 , G02F2001/136222 , H01L27/1248 , H01L29/78633
摘要： A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
摘要翻译：薄膜晶体管阵列基板结构。阵列基板结构包括薄膜晶体管阵列基板，形成在其上的有机材料层，以及设置在有机材料层上的多个黑色矩阵和滤色器图案。本发明还提供一种制造薄膜晶体管阵列基板的方法。

5. 发明申请

US20070262312A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE STRUCTURES AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管阵列基板结构及其制造方法
公开(公告)号：US20070262312A1
公开(公告)日：2007-11-15
申请号：US11461015
申请日：2006-07-31
申请人： Yu-Wei Liu , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
发明人： Yu-Wei Liu , Feng-Yuan Gan , Shu-Chin Lee , Yen-Heng Huang
IPC分类号： H01L29/786 , H01L21/00
CPC分类号： G02F1/136209 , G02F2001/136222 , H01L27/1248 , H01L29/78633
摘要： A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
摘要翻译：薄膜晶体管阵列基板结构。阵列基板结构包括薄膜晶体管阵列基板，形成在其上的有机材料层，以及设置在有机材料层上的多个黑色矩阵和滤色器图案。本发明还提供一种制造薄膜晶体管阵列基板的方法。

6. 发明申请

US20080220343A1 Ink Composition and Method of Using the Same to Produce Color Filter 审中-公开
标题翻译：油墨组合物及其使用方法生产滤色片
公开(公告)号：US20080220343A1
公开(公告)日：2008-09-11
申请号：US12031058
申请日：2008-02-14
申请人： Chi-Sheng Chen , Lun Tsai , Wen-Bin Wu , Shen-Jye Shieh , Shu-Chin Lee , Feng-Yuan Gan
发明人： Chi-Sheng Chen , Lun Tsai , Wen-Bin Wu , Shen-Jye Shieh , Shu-Chin Lee , Feng-Yuan Gan
IPC分类号： G03F1/00 , C08K5/05 , C08K5/053 , C08K5/13
CPC分类号： G03F7/0007 , C08K5/06 , C08K5/103
摘要： An ink composition for producing a color filter is provided. The ink composition comprises a colorant, a binder and plural solvents. A color filter production method using the above-mentioned ink composition is also provided. The ink composition is adhered to the designated light transmitting regions on the surface of a transparent substrate. Then, the ink composition adhered to the designated light transmitting regions is solidified.
摘要翻译：提供了一种用于制造滤色器的油墨组合物。油墨组合物包含着色剂，粘合剂和多种溶剂。还提供了使用上述油墨组合物的滤色器制备方法。油墨组合物粘附在透明基板的表面上的指定透光区域上。然后，粘附到指定的透光区域上的油墨组合物被固化。

7. 发明授权

US08177989B2 Copper conducting wire structure and fabricating method thereof 有权
标题翻译：铜导线结构及其制造方法
公开(公告)号：US08177989B2
公开(公告)日：2012-05-15
申请号：US11889234
申请日：2007-08-10
申请人： Feng-Yuan Gan , Han-Tu Lin , Kuo-Yuan Tu
发明人： Feng-Yuan Gan , Han-Tu Lin , Kuo-Yuan Tu
IPC分类号： C30B33/00
CPC分类号： C23C14/185 , B32B15/00 , C03C17/36 , C03C17/3607 , C03C17/3618 , C03C17/3626 , C03C17/3649 , C03C17/3671 , C23C14/024 , C23C14/0641 , G02F1/136286 , H01L27/124 , H01L29/4908 , H05K1/0306 , H05K3/388 , Y10S438/974 , Y10T428/24917 , Y10T428/24926
摘要： A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure includes the following steps. At first, a glass substrate is provided. Next, the buffer layer is formed on the glass substrate. The buffer layer is comprised of a copper nitride. At last, the copper layer is formed on the buffer layer.
摘要翻译：铜导线结构用于薄膜晶体管液晶显示（LCD）装置。铜导线结构至少包括缓冲层和铜层。铜导线结构的制造方法包括以下步骤。首先，提供玻璃基板。接着，在玻璃基板上形成缓冲层。缓冲层由氮化铜组成。最后，在缓冲层上形成铜层。

8. 发明申请

US20080273149A1 OPTICAL COMPENSATION FILM, FABRICATING METHOD OF THE OPTICAL COMPENSATION FILM AND LIQUID CRYSTAL DISPLAY PANEL USING THE SAME 有权
标题翻译：光学补偿膜，光学补偿膜的制造方法和使用该光学补偿膜的液晶显示面板
公开(公告)号：US20080273149A1
公开(公告)日：2008-11-06
申请号：US11840993
申请日：2007-08-19
申请人： Yue-Shih Jeng , Zeng-De Chen , Kuan-Yi Hsu , Chih-Ming Chang , Feng-Yuan Gan
发明人： Yue-Shih Jeng , Zeng-De Chen , Kuan-Yi Hsu , Chih-Ming Chang , Feng-Yuan Gan
IPC分类号： G02F1/13363 , B05D5/06 , G02F1/1335
CPC分类号： G02F1/13363 , G02F1/133555 , G02F2001/133565 , G02F2001/133633 , G02F2202/40 , G02F2413/04 , G02F2413/05 , G02F2413/09 , G02F2413/11
摘要： An optical compensation film includes an optical film and a retardation film. The optical film provides a plate retardation in the direction of thickness (Rth), while the retardation film is disposed on the optical film. The retardation film includes first retarders and second retarders, wherein the first retarders are disposed on at least partial areas of the optical film and provide a first planar retardation (Ro1); the second retarders are disposed on partial areas of the optical film but outside the first retarders and provide a second planar retardation (Ro2) and the first planar retardation (Ro1) is different from the second planar retardation (Ro2). The above-mentioned optical compensation film is capable of compensating the displays for different display areas in a liquid crystal display panel. In addition, the present invention also provides a fabricating method of optical compensation film.
摘要翻译：光学补偿膜包括光学膜和延迟膜。光学膜在厚度方向（Rth）上提供板延迟，而延迟膜设置在光学膜上。延迟膜包括第一延迟器和第二延迟器，其中第一延迟器设置在光学膜的至少部分区域上并提供第一平面延迟（Ro 1）; 第二延迟器设置在光学膜的部分区域上，但位于第一延迟器的外部，并提供第二平面延迟（Ro 2），并且第一平面延迟（Ro 1）不同于第二平面延迟（Ro 2）。上述光学补偿膜能够补偿液晶显示面板中不同显示区域的显示。此外，本发明还提供了一种光学补偿膜的制造方法。

9. 发明申请

US20080135843A1 Thin Film Transistor Structure 有权
标题翻译：薄膜晶体管结构
公开(公告)号：US20080135843A1
公开(公告)日：2008-06-12
申请号：US11849593
申请日：2007-09-04
申请人： Yu-Min Lin , Feng-Yuan Gan
发明人： Yu-Min Lin , Feng-Yuan Gan
IPC分类号： H01L29/04
CPC分类号： H01L29/41733 , H01L27/12 , H01L27/124 , H01L29/42384
摘要： A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.
摘要翻译：提供薄膜晶体管（TFT）结构。 TFT包括栅极，第一电极，第二电极，电介质层和沟道层。通过重叠第一电极和栅极之间的区域，TFT结构获得不受制造偏差影响的寄生电容器。因此，TFT不需要补偿电容器，从而增加TFT的开口率。

10. 发明申请

US20060111244A1 Methods for fabricating thin film transistors 审中-公开
标题翻译：制造薄膜晶体管的方法
公开(公告)号：US20060111244A1
公开(公告)日：2006-05-25
申请号：US11143698
申请日：2005-06-02
申请人： Feng-Yuan Gan , Han-Tu Lin
发明人： Feng-Yuan Gan , Han-Tu Lin
IPC分类号： H01L39/14
CPC分类号： H01L29/66765 , H01L29/4908
摘要： A fabrication method of thin film transistor. A patterned gate is formed on an insulator substrate. A buffer layer is formed on the insulating substrate. The patterned gate is formed by plasma enhanced chemical vapor deposition (PECVD) using a mixture of silane, argon, nitrogen to serve as reactants at a temperature of approximately 20-200° C. A gate insulating layer is formed on the buffer layer. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor layer. The buffer layer protects the metal gate from damage during subsequent plasma enhanced chemical vapor deposition.
摘要翻译：薄膜晶体管的制造方法。图案化栅极形成在绝缘体基板上。在绝缘基板上形成缓冲层。图案化的栅极通过使用硅烷，氩，氮的混合物的等离子体增强化学气相沉积（PECVD）形成，以在约20-200℃的温度下用作反应物。在缓冲层上形成栅极绝缘层。在栅极绝缘层上形成半导体层。源极/漏极层形成在半导体层上。缓冲层在随后的等离子体增强化学气相沉积期间保护金属栅极免受损坏。

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