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1. 发明申请

US20130198436A1 IMPLEMENTING ENHANCED DATA PARTIAL-ERASE FOR MULTI-LEVEL CELL (MLC) MEMORY USING THRESHOLD VOLTAGE-DRIFT OR RESISTANCE DRIFT TOLERANT MOVING BASELINE MEMORY DATA ENCODING 有权
标题翻译：使用阈值电压缓冲或电阻干扰实现增强数据部分删除多电平（MLC）存储器容错移动基线存储器数据编码
公开(公告)号：US20130198436A1
公开(公告)日：2013-08-01
申请号：US13361925
申请日：2012-01-30
申请人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
发明人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
IPC分类号： G06F12/00 , G11C11/00 , G11C16/04
CPC分类号： G11C16/16 , G11C11/5635 , G11C11/5678 , G11C13/0035 , G11C13/0097 , G11C16/349 , G11C2013/0076
摘要： A method and apparatus are provided for implementing enhanced data partial erase for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, and a data re-write after the partial erase to the MLC memory is performed using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase cycle includes a duration and voltage level based upon a degradation of the MLC memory cells.
摘要翻译：提供了一种使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码来实现用于多电平单元（MLC）存储器的增强型数据部分擦除的方法和装置。执行使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码写入MLC存储器的数据的数据部分擦除，并且使用阈值电压来执行对MLC存储器的部分擦除之后的数据重写驱动或电阻漂移运动基线存储器数据编码。数据部分擦除周期包括基于MLC存储器单元的劣化的持续时间和电压电平。

2. 发明授权

US08792272B2 Implementing enhanced data partial-erase for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding 有权
标题翻译：使用阈值电压漂移或电阻漂移容限运动基线存储器数据编码来实现多电平单元（MLC）存储器的增强型数据部分擦除
公开(公告)号：US08792272B2
公开(公告)日：2014-07-29
申请号：US13361925
申请日：2012-01-30
申请人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
发明人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C16/16 , G11C11/5635 , G11C11/5678 , G11C13/0035 , G11C13/0097 , G11C16/349 , G11C2013/0076
摘要： A method and apparatus are provided for implementing enhanced data partial erase for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, and a data re-write after the partial erase to the MLC memory is performed using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase cycle includes a duration and voltage level based upon a degradation of the MLC memory cells.
摘要翻译：提供了一种使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码来实现用于多电平单元（MLC）存储器的增强型数据部分擦除的方法和装置。执行使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码写入MLC存储器的数据的数据部分擦除，并且使用阈值电压来执行对MLC存储器的部分擦除之后的数据重写驱动或电阻漂移运动基线存储器数据编码。数据部分擦除周期包括基于MLC存储器单元的劣化的持续时间和电压电平。

3. 发明授权

US08699266B2 Implementing enhanced data write for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding 有权
标题翻译：使用阈值电压漂移或电阻漂移容限移动基线存储器数据编码来实现对多电平单元（MLC）存储器的增强型数据写入
公开(公告)号：US08699266B2
公开(公告)日：2014-04-15
申请号：US13361905
申请日：2012-01-30
申请人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
发明人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
IPC分类号： G11C11/00
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5678 , G11C13/0035 , G11C13/0069 , G11C16/3418 , G11C16/349 , G11C17/146 , G11C2013/0076
摘要： A method and apparatus are provided for implementing enhanced performance for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A voltage baseline of a prior write is identified, and a data write uses the threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding for data being written to the MLC memory responsive to the identified voltage baseline.
摘要翻译：提供了一种使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码来实现多电平单元（MLC）存储器的增强性能的方法和装置。识别先前写入的电压基线，并且数据写入使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码，以响应于所识别的电压基线而写入到MLC存储器中的数据。

4. 发明申请

US20130194864A1 IMPLEMENTING ENHANCED DATA WRITE FOR MULTI-LEVEL CELL (MLC) MEMORY USING THRESHOLD VOLTAGE-DRIFT OR RESISTANCE DRIFT TOLERANT MOVING BASELINE MEMORY DATA ENCODING 有权
标题翻译：使用阈值电压缓冲或电阻干扰来实现多电平（MLC）存储器的增强数据写入容错移动基线存储器数据编码
公开(公告)号：US20130194864A1
公开(公告)日：2013-08-01
申请号：US13361905
申请日：2012-01-30
申请人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
发明人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
IPC分类号： G11C16/10
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5678 , G11C13/0035 , G11C13/0069 , G11C16/3418 , G11C16/349 , G11C17/146 , G11C2013/0076
摘要： A method and apparatus are provided for implementing enhanced performance for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A voltage baseline of a prior write is identified, and a data write uses the threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding for data being written to the MLC memory responsive to the identified voltage baseline.
摘要翻译：提供了一种使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码来实现多电平单元（MLC）存储器的增强性能的方法和装置。识别先前写入的电压基线，并且数据写入使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码，以响应于所识别的电压基线而写入到MLC存储器中的数据。

5. 发明授权

US09208871B2 Implementing enhanced data read for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding 有权
标题翻译：使用阈值电压漂移或电阻漂移容限移动基线存储器数据编码来实现对多电平单元（MLC）存储器的增强型数据读取
公开(公告)号：US09208871B2
公开(公告)日：2015-12-08
申请号：US13361918
申请日：2012-01-30
申请人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
发明人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
IPC分类号： G11C11/56 , G11C13/00 , G11C16/26 , G11C16/34
CPC分类号： G11C13/0035 , G11C11/5628 , G11C11/5642 , G11C11/5678 , G11C13/004 , G11C16/26 , G11C16/349 , G11C2013/0054
摘要： A method and apparatus are provided for implementing enhanced data read for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data read back for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, higher voltage and lower voltage levels are compared, and respective data values are identified responsive to the compared higher voltage and lower voltage levels.
摘要翻译：提供了一种用于使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码来实现用于多电平单元（MLC）存储器的增强数据读取的方法和装置。执行使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码写入MLC存储器的数据的数据读回，比较较高电压和较低电压电平，并且响应于比较的较高电压电压和低电压电平。

6. 发明申请

US20130194865A1 IMPLEMENTING ENHANCED DATA READ FOR MULTI-LEVEL CELL (MLC) MEMORY USING THRESHOLD VOLTAGE-DRIFT OR RESISTANCE DRIFT TOLERANT MOVING BASELINE MEMORY DATA ENCODING 有权
标题翻译：使用阈值电压缓冲或电阻干扰实现增强型数据读取多级存储器（MLC）存储器容错移动基线存储器数据编码
公开(公告)号：US20130194865A1
公开(公告)日：2013-08-01
申请号：US13361918
申请日：2012-01-30
申请人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
发明人： Zvonimir Z. Bandic , Luiz M. Franca-Neto , Cyril Guyot , Robert Eugeniu Mateescu
IPC分类号： G11C16/06 , G11C11/00
CPC分类号： G11C13/0035 , G11C11/5628 , G11C11/5642 , G11C11/5678 , G11C13/004 , G11C16/26 , G11C16/349 , G11C2013/0054
摘要： A method and apparatus are provided for implementing enhanced data read for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data read back for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, higher voltage and lower voltage levels are compared, and respective data values are identified responsive to the compared higher voltage and lower voltage levels.
摘要翻译：提供了一种用于使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码来实现用于多电平单元（MLC）存储器的增强数据读取的方法和装置。执行使用阈值电压漂移或电阻漂移容许移动基线存储器数据编码写入MLC存储器的数据的数据读回，比较较高电压和较低电压电平，并且响应于比较的较高电压电压和低电压电平。

7. 发明授权

US08649215B2 Data management in flash memory using probability of charge disturbances 有权
标题翻译：使用电荷扰动概率的闪存中的数据管理
公开(公告)号：US08649215B2
公开(公告)日：2014-02-11
申请号：US12930017
申请日：2010-12-22
申请人： Luiz M. Franca-Neto , Richard Leo Galbraith , Travis Roger Oenning
发明人： Luiz M. Franca-Neto , Richard Leo Galbraith , Travis Roger Oenning
IPC分类号： G11C16/34 , G11C16/06 , G11C29/00 , G11C29/44
CPC分类号： G11C16/3495 , G11C29/50 , G11C2029/5002
摘要： A Flash memory system and a method for data management using the system's sensitivity to charge-disturbing operations and the history of charge-disturbing operations executed by the system are described. In an embodiment of the invention, the sensitivity to charge-disturbing operations is embodied in a disturb-strength matrix in which selected operations have an associated numerical value that is an estimate of the relative strength of that operation to cause disturbances in charge that result in data errors. The disturb-strength matrix can also include the direction of the error which indicates either a gain or loss of charge. The disturb-strength matrix can be determined by the device conducting a self-test in which charge-disturb errors are provoked by executing a selected operation until a detectable error occurs. In alternative embodiments the disturb-strength matrix is determined by testing selected units from a homogeneous population.
摘要翻译：描述了使用系统对充电干扰操作的灵敏度和系统执行的充电干扰操作的历史的数据管理的闪存系统和方法。在本发明的一个实施例中，对电荷干扰操作的灵敏度体现在干扰强度矩阵中，其中所选择的操作具有相关联的数值，该相关数值是该操作的相对强度的估计，以引起电荷干扰，导致导致数据错误。干扰强度矩阵还可以包括指示电荷增益或损失的误差方向。扰动强度矩阵可以由进行自检的装置确定，其中通过执行所选择的操作而引起充电扰乱错误，直到出现可检测的错误。在替代实施例中，通过从均匀群体测试所选择的单位来确定干扰强度矩阵。

8. 发明授权

US08599609B2 Data management in flash memory using probability of charge disturbances 有权
标题翻译：使用电荷扰动概率的闪存中的数据管理
公开(公告)号：US08599609B2
公开(公告)日：2013-12-03
申请号：US12930013
申请日：2010-12-22
申请人： Luiz M. Franca-Neto , Richard Leo Galbraith , Travis Roger Oenning
发明人： Luiz M. Franca-Neto , Richard Leo Galbraith , Travis Roger Oenning
IPC分类号： G11C11/04 , G11C16/04
CPC分类号： G11C29/50 , G06F11/1048 , G11C2029/5002
摘要： A Flash memory system and a method for data management using the system's sensitivity to charge-disturbing operations and the history of charge-disturbing operations executed by the system are described. In an embodiment of the invention, the sensitivity to charge-disturbing operations is embodied in a disturb-strength matrix in which selected operations have an associated numerical value that is an estimate of the relative strength of that operation to cause disturbances in charge that result in data errors. The disturb-strength matrix should also include the direction of the error which indicates either a gain or loss of charge. The disturb-strength matrix can be determined by the device conducting a self-test in which changes in the measured dispersion value are provoked by executing a selected operation until a detectable change occurs. In alternative embodiments the disturb-strength matrix is determined by testing selected units from a homogeneous population.
摘要翻译：描述了使用系统对充电干扰操作的灵敏度和系统执行的充电干扰操作的历史的数据管理的闪存系统和方法。在本发明的一个实施例中，对电荷干扰操作的灵敏度体现在干扰强度矩阵中，其中所选择的操作具有相关联的数值，该相关联的数值是该操作的相对强度的估计，导致电荷干扰导致数据错误。干扰强度矩阵还应包括指示电荷增益或损失的误差方向。干扰强度矩阵可以由进行自检的装置确定，其中通过执行所选择的操作来激发测量的色散值的变化，直到发生可检测的变化。在替代实施例中，通过从均匀群体测试所选择的单位来确定干扰强度矩阵。

9. 发明授权

US08422303B2 Early degradation detection in flash memory using test cells 有权
标题翻译：使用测试单元的闪存中的早期劣化检测
公开(公告)号：US08422303B2
公开(公告)日：2013-04-16
申请号：US12930020
申请日：2010-12-22
申请人： Luiz M. Franca-Neto , Richard Leo Galbraith , Travis Roger Oenning
发明人： Luiz M. Franca-Neto , Richard Leo Galbraith , Travis Roger Oenning
IPC分类号： G11C11/34
CPC分类号： G11C11/5642 , G11C16/00 , G11C16/3418 , G11C16/349 , G11C29/24 , G11C29/50004 , G11C2211/5634
摘要： A Flash memory system and a method for data management using the embodiments of the invention use special test cells with Early Degradation Detection (EDD) circuitry instead of using the actual user-data storage cells are described. The Flash memory test cells can be made to serve as a “canary in a coal mine” by being made more sensitive than the standard cells by using experimentally determined sensitive write VT and variable read VT. Techniques for early degradation detection (EDD) in Flash memories measure the dispersion of the threshold voltages (VT's), of a set (e.g. page) of NAND Flash memory cells during read operations. In an embodiment of the invention the time-to-completion (TTC) values for the read operation for the memory cells are used as a proxy for dispersion of the threshold voltages (VT's). A Dispersion Analyzer determines the dispersion of the set of TTC values.
摘要翻译：描述使用本发明的实施例的闪存系统和数据管理方法，使用具有早期降解检测（EDD）电路的特殊测试单元而不是使用实际的用户数据存储单元。通过使用实验确定的敏感写入VT和可变读取VT，闪存测试单元可以通过使其比标准单元更敏感，作为煤矿中的金丝雀。用于闪速存储器中的早期劣化检测（EDD）的技术测量读取操作期间的一组（例如，页）NAND闪存单元的阈值电压（VT）的偏差。在本发明的一个实施例中，用于存储器单元的读取操作的完成时间（TTC）值用作阈值电压（VT）的色散的代理。色散分析仪确定一组TTC值的色散。

10. 发明授权

US08085490B2 Slider fly-height control in a hard disk drive 有权
标题翻译：滑块飞行高度控制在硬盘驱动器
公开(公告)号：US08085490B2
公开(公告)日：2011-12-27
申请号：US12646848
申请日：2009-12-23
申请人： Luiz M. Franca-Neto , Bernhard E. Knigge , Stefan Maat
发明人： Luiz M. Franca-Neto , Bernhard E. Knigge , Stefan Maat
IPC分类号： G11B21/02
CPC分类号： G11B5/6029
摘要： In fly-height control system, a slider comprises a spin torque oscillator that is configured for generating an RF carrier signal which is out-of-band of a frequency band of read data, write data, and control signals in a hard disk drive.
摘要翻译：在飞行高度控制系统中，滑块包括自旋扭矩振荡器，其被配置为产生在硬盘驱动器中的读取数据，写入数据和控制信号的频带的带外的RF载波信号。

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